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authorKukjin Kim <kgene.kim@samsung.com>2011-11-06 00:54:56 -0400
committerKukjin Kim <kgene.kim@samsung.com>2011-11-06 00:54:56 -0400
commit830145796a5c8f1ca3f87ea619063c1d99a57df5 (patch)
treee72a0ecacfcce228c46d93c946cfd65a44cc1fd3 /arch/arm/mach-exynos/mach-smdkv310.c
parente700e41d9abfbf9fee01e979a41b185695132c19 (diff)
ARM: EXYNOS: Add ARCH_EXYNOS and reorganize arch/arm/mach-exynos
The arch/arm/mach-exynos4 directory (CONFIG_ARCH_EXYNOS4) has made for plaforms based on EXYNOS4 SoCs. But since upcoming Samsung's SoCs such as EXYNOS5 (ARM Cortex A15) can reuse most codes in current mach-exynos4, one mach-exynos directory will be used for them. This patch changes to CONFIG_ARCH_EXYNOS (arch/arm/mach-exynos) but keeps original CONFIG_ARCH_EXYNOS4 in mach-exynos/Kconfig to avoid changing in driver side. Cc: Arnd Bergmann <arnd@arndb.de> Cc: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Diffstat (limited to 'arch/arm/mach-exynos/mach-smdkv310.c')
-rw-r--r--arch/arm/mach-exynos/mach-smdkv310.c390
1 files changed, 390 insertions, 0 deletions
diff --git a/arch/arm/mach-exynos/mach-smdkv310.c b/arch/arm/mach-exynos/mach-smdkv310.c
new file mode 100644
index 000000000000..cec2afabe7b4
--- /dev/null
+++ b/arch/arm/mach-exynos/mach-smdkv310.c
@@ -0,0 +1,390 @@
1/* linux/arch/arm/mach-exynos4/mach-smdkv310.c
2 *
3 * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9*/
10
11#include <linux/serial_core.h>
12#include <linux/delay.h>
13#include <linux/gpio.h>
14#include <linux/lcd.h>
15#include <linux/mmc/host.h>
16#include <linux/platform_device.h>
17#include <linux/smsc911x.h>
18#include <linux/io.h>
19#include <linux/i2c.h>
20#include <linux/input.h>
21#include <linux/pwm_backlight.h>
22
23#include <asm/mach/arch.h>
24#include <asm/mach-types.h>
25
26#include <video/platform_lcd.h>
27#include <plat/regs-serial.h>
28#include <plat/regs-srom.h>
29#include <plat/regs-fb-v4.h>
30#include <plat/exynos4.h>
31#include <plat/cpu.h>
32#include <plat/devs.h>
33#include <plat/fb.h>
34#include <plat/keypad.h>
35#include <plat/sdhci.h>
36#include <plat/iic.h>
37#include <plat/pd.h>
38#include <plat/gpio-cfg.h>
39#include <plat/backlight.h>
40#include <plat/mfc.h>
41#include <plat/ehci.h>
42#include <plat/clock.h>
43
44#include <mach/map.h>
45
46/* Following are default values for UCON, ULCON and UFCON UART registers */
47#define SMDKV310_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \
48 S3C2410_UCON_RXILEVEL | \
49 S3C2410_UCON_TXIRQMODE | \
50 S3C2410_UCON_RXIRQMODE | \
51 S3C2410_UCON_RXFIFO_TOI | \
52 S3C2443_UCON_RXERR_IRQEN)
53
54#define SMDKV310_ULCON_DEFAULT S3C2410_LCON_CS8
55
56#define SMDKV310_UFCON_DEFAULT (S3C2410_UFCON_FIFOMODE | \
57 S5PV210_UFCON_TXTRIG4 | \
58 S5PV210_UFCON_RXTRIG4)
59
60static struct s3c2410_uartcfg smdkv310_uartcfgs[] __initdata = {
61 [0] = {
62 .hwport = 0,
63 .flags = 0,
64 .ucon = SMDKV310_UCON_DEFAULT,
65 .ulcon = SMDKV310_ULCON_DEFAULT,
66 .ufcon = SMDKV310_UFCON_DEFAULT,
67 },
68 [1] = {
69 .hwport = 1,
70 .flags = 0,
71 .ucon = SMDKV310_UCON_DEFAULT,
72 .ulcon = SMDKV310_ULCON_DEFAULT,
73 .ufcon = SMDKV310_UFCON_DEFAULT,
74 },
75 [2] = {
76 .hwport = 2,
77 .flags = 0,
78 .ucon = SMDKV310_UCON_DEFAULT,
79 .ulcon = SMDKV310_ULCON_DEFAULT,
80 .ufcon = SMDKV310_UFCON_DEFAULT,
81 },
82 [3] = {
83 .hwport = 3,
84 .flags = 0,
85 .ucon = SMDKV310_UCON_DEFAULT,
86 .ulcon = SMDKV310_ULCON_DEFAULT,
87 .ufcon = SMDKV310_UFCON_DEFAULT,
88 },
89};
90
91static struct s3c_sdhci_platdata smdkv310_hsmmc0_pdata __initdata = {
92 .cd_type = S3C_SDHCI_CD_INTERNAL,
93 .clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL,
94#ifdef CONFIG_EXYNOS4_SDHCI_CH0_8BIT
95 .max_width = 8,
96 .host_caps = MMC_CAP_8_BIT_DATA,
97#endif
98};
99
100static struct s3c_sdhci_platdata smdkv310_hsmmc1_pdata __initdata = {
101 .cd_type = S3C_SDHCI_CD_GPIO,
102 .ext_cd_gpio = EXYNOS4_GPK0(2),
103 .ext_cd_gpio_invert = 1,
104 .clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL,
105};
106
107static struct s3c_sdhci_platdata smdkv310_hsmmc2_pdata __initdata = {
108 .cd_type = S3C_SDHCI_CD_INTERNAL,
109 .clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL,
110#ifdef CONFIG_EXYNOS4_SDHCI_CH2_8BIT
111 .max_width = 8,
112 .host_caps = MMC_CAP_8_BIT_DATA,
113#endif
114};
115
116static struct s3c_sdhci_platdata smdkv310_hsmmc3_pdata __initdata = {
117 .cd_type = S3C_SDHCI_CD_GPIO,
118 .ext_cd_gpio = EXYNOS4_GPK2(2),
119 .ext_cd_gpio_invert = 1,
120 .clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL,
121};
122
123static void lcd_lte480wv_set_power(struct plat_lcd_data *pd,
124 unsigned int power)
125{
126 if (power) {
127#if !defined(CONFIG_BACKLIGHT_PWM)
128 gpio_request_one(EXYNOS4_GPD0(1), GPIOF_OUT_INIT_HIGH, "GPD0");
129 gpio_free(EXYNOS4_GPD0(1));
130#endif
131 /* fire nRESET on power up */
132 gpio_request(EXYNOS4_GPX0(6), "GPX0");
133
134 gpio_direction_output(EXYNOS4_GPX0(6), 1);
135 mdelay(100);
136
137 gpio_set_value(EXYNOS4_GPX0(6), 0);
138 mdelay(10);
139
140 gpio_set_value(EXYNOS4_GPX0(6), 1);
141 mdelay(10);
142
143 gpio_free(EXYNOS4_GPX0(6));
144 } else {
145#if !defined(CONFIG_BACKLIGHT_PWM)
146 gpio_request_one(EXYNOS4_GPD0(1), GPIOF_OUT_INIT_LOW, "GPD0");
147 gpio_free(EXYNOS4_GPD0(1));
148#endif
149 }
150}
151
152static struct plat_lcd_data smdkv310_lcd_lte480wv_data = {
153 .set_power = lcd_lte480wv_set_power,
154};
155
156static struct platform_device smdkv310_lcd_lte480wv = {
157 .name = "platform-lcd",
158 .dev.parent = &s5p_device_fimd0.dev,
159 .dev.platform_data = &smdkv310_lcd_lte480wv_data,
160};
161
162static struct s3c_fb_pd_win smdkv310_fb_win0 = {
163 .win_mode = {
164 .left_margin = 13,
165 .right_margin = 8,
166 .upper_margin = 7,
167 .lower_margin = 5,
168 .hsync_len = 3,
169 .vsync_len = 1,
170 .xres = 800,
171 .yres = 480,
172 },
173 .max_bpp = 32,
174 .default_bpp = 24,
175};
176
177static struct s3c_fb_platdata smdkv310_lcd0_pdata __initdata = {
178 .win[0] = &smdkv310_fb_win0,
179 .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,
180 .vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
181 .setup_gpio = exynos4_fimd0_gpio_setup_24bpp,
182};
183
184static struct resource smdkv310_smsc911x_resources[] = {
185 [0] = {
186 .start = EXYNOS4_PA_SROM_BANK(1),
187 .end = EXYNOS4_PA_SROM_BANK(1) + SZ_64K - 1,
188 .flags = IORESOURCE_MEM,
189 },
190 [1] = {
191 .start = IRQ_EINT(5),
192 .end = IRQ_EINT(5),
193 .flags = IORESOURCE_IRQ | IRQF_TRIGGER_LOW,
194 },
195};
196
197static struct smsc911x_platform_config smsc9215_config = {
198 .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
199 .irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL,
200 .flags = SMSC911X_USE_16BIT | SMSC911X_FORCE_INTERNAL_PHY,
201 .phy_interface = PHY_INTERFACE_MODE_MII,
202 .mac = {0x00, 0x80, 0x00, 0x23, 0x45, 0x67},
203};
204
205static struct platform_device smdkv310_smsc911x = {
206 .name = "smsc911x",
207 .id = -1,
208 .num_resources = ARRAY_SIZE(smdkv310_smsc911x_resources),
209 .resource = smdkv310_smsc911x_resources,
210 .dev = {
211 .platform_data = &smsc9215_config,
212 },
213};
214
215static uint32_t smdkv310_keymap[] __initdata = {
216 /* KEY(row, col, keycode) */
217 KEY(0, 3, KEY_1), KEY(0, 4, KEY_2), KEY(0, 5, KEY_3),
218 KEY(0, 6, KEY_4), KEY(0, 7, KEY_5),
219 KEY(1, 3, KEY_A), KEY(1, 4, KEY_B), KEY(1, 5, KEY_C),
220 KEY(1, 6, KEY_D), KEY(1, 7, KEY_E)
221};
222
223static struct matrix_keymap_data smdkv310_keymap_data __initdata = {
224 .keymap = smdkv310_keymap,
225 .keymap_size = ARRAY_SIZE(smdkv310_keymap),
226};
227
228static struct samsung_keypad_platdata smdkv310_keypad_data __initdata = {
229 .keymap_data = &smdkv310_keymap_data,
230 .rows = 2,
231 .cols = 8,
232};
233
234static struct i2c_board_info i2c_devs1[] __initdata = {
235 {I2C_BOARD_INFO("wm8994", 0x1a),},
236};
237
238/* USB EHCI */
239static struct s5p_ehci_platdata smdkv310_ehci_pdata;
240
241static void __init smdkv310_ehci_init(void)
242{
243 struct s5p_ehci_platdata *pdata = &smdkv310_ehci_pdata;
244
245 s5p_ehci_set_platdata(pdata);
246}
247
248static struct platform_device *smdkv310_devices[] __initdata = {
249 &s3c_device_hsmmc0,
250 &s3c_device_hsmmc1,
251 &s3c_device_hsmmc2,
252 &s3c_device_hsmmc3,
253 &s3c_device_i2c1,
254 &s5p_device_i2c_hdmiphy,
255 &s3c_device_rtc,
256 &s3c_device_wdt,
257 &s5p_device_ehci,
258 &s5p_device_fimc0,
259 &s5p_device_fimc1,
260 &s5p_device_fimc2,
261 &s5p_device_fimc3,
262 &exynos4_device_ac97,
263 &exynos4_device_i2s0,
264 &samsung_device_keypad,
265 &s5p_device_mfc,
266 &s5p_device_mfc_l,
267 &s5p_device_mfc_r,
268 &exynos4_device_pd[PD_MFC],
269 &exynos4_device_pd[PD_G3D],
270 &exynos4_device_pd[PD_LCD0],
271 &exynos4_device_pd[PD_LCD1],
272 &exynos4_device_pd[PD_CAM],
273 &exynos4_device_pd[PD_TV],
274 &exynos4_device_pd[PD_GPS],
275 &exynos4_device_spdif,
276 &exynos4_device_sysmmu,
277 &samsung_asoc_dma,
278 &samsung_asoc_idma,
279 &s5p_device_fimd0,
280 &smdkv310_lcd_lte480wv,
281 &smdkv310_smsc911x,
282 &exynos4_device_ahci,
283 &s5p_device_hdmi,
284 &s5p_device_mixer,
285};
286
287static void __init smdkv310_smsc911x_init(void)
288{
289 u32 cs1;
290
291 /* configure nCS1 width to 16 bits */
292 cs1 = __raw_readl(S5P_SROM_BW) &
293 ~(S5P_SROM_BW__CS_MASK << S5P_SROM_BW__NCS1__SHIFT);
294 cs1 |= ((1 << S5P_SROM_BW__DATAWIDTH__SHIFT) |
295 (1 << S5P_SROM_BW__WAITENABLE__SHIFT) |
296 (1 << S5P_SROM_BW__BYTEENABLE__SHIFT)) <<
297 S5P_SROM_BW__NCS1__SHIFT;
298 __raw_writel(cs1, S5P_SROM_BW);
299
300 /* set timing for nCS1 suitable for ethernet chip */
301 __raw_writel((0x1 << S5P_SROM_BCX__PMC__SHIFT) |
302 (0x9 << S5P_SROM_BCX__TACP__SHIFT) |
303 (0xc << S5P_SROM_BCX__TCAH__SHIFT) |
304 (0x1 << S5P_SROM_BCX__TCOH__SHIFT) |
305 (0x6 << S5P_SROM_BCX__TACC__SHIFT) |
306 (0x1 << S5P_SROM_BCX__TCOS__SHIFT) |
307 (0x1 << S5P_SROM_BCX__TACS__SHIFT), S5P_SROM_BC1);
308}
309
310/* LCD Backlight data */
311static struct samsung_bl_gpio_info smdkv310_bl_gpio_info = {
312 .no = EXYNOS4_GPD0(1),
313 .func = S3C_GPIO_SFN(2),
314};
315
316static struct platform_pwm_backlight_data smdkv310_bl_data = {
317 .pwm_id = 1,
318 .pwm_period_ns = 1000,
319};
320
321static void s5p_tv_setup(void)
322{
323 /* direct HPD to HDMI chip */
324 WARN_ON(gpio_request_one(EXYNOS4_GPX3(7), GPIOF_IN, "hpd-plug"));
325 s3c_gpio_cfgpin(EXYNOS4_GPX3(7), S3C_GPIO_SFN(0x3));
326 s3c_gpio_setpull(EXYNOS4_GPX3(7), S3C_GPIO_PULL_NONE);
327
328 /* setup dependencies between TV devices */
329 s5p_device_hdmi.dev.parent = &exynos4_device_pd[PD_TV].dev;
330 s5p_device_mixer.dev.parent = &exynos4_device_pd[PD_TV].dev;
331}
332
333static void __init smdkv310_map_io(void)
334{
335 s5p_init_io(NULL, 0, S5P_VA_CHIPID);
336 s3c24xx_init_clocks(24000000);
337 s3c24xx_init_uarts(smdkv310_uartcfgs, ARRAY_SIZE(smdkv310_uartcfgs));
338}
339
340static void __init smdkv310_reserve(void)
341{
342 s5p_mfc_reserve_mem(0x43000000, 8 << 20, 0x51000000, 8 << 20);
343}
344
345static void __init smdkv310_machine_init(void)
346{
347 s3c_i2c1_set_platdata(NULL);
348 i2c_register_board_info(1, i2c_devs1, ARRAY_SIZE(i2c_devs1));
349
350 smdkv310_smsc911x_init();
351
352 s3c_sdhci0_set_platdata(&smdkv310_hsmmc0_pdata);
353 s3c_sdhci1_set_platdata(&smdkv310_hsmmc1_pdata);
354 s3c_sdhci2_set_platdata(&smdkv310_hsmmc2_pdata);
355 s3c_sdhci3_set_platdata(&smdkv310_hsmmc3_pdata);
356
357 s5p_tv_setup();
358 s5p_i2c_hdmiphy_set_platdata(NULL);
359
360 samsung_keypad_set_platdata(&smdkv310_keypad_data);
361
362 samsung_bl_set(&smdkv310_bl_gpio_info, &smdkv310_bl_data);
363 s5p_fimd0_set_platdata(&smdkv310_lcd0_pdata);
364
365 smdkv310_ehci_init();
366 clk_xusbxti.rate = 24000000;
367
368 platform_add_devices(smdkv310_devices, ARRAY_SIZE(smdkv310_devices));
369 s5p_device_mfc.dev.parent = &exynos4_device_pd[PD_MFC].dev;
370}
371
372MACHINE_START(SMDKV310, "SMDKV310")
373 /* Maintainer: Kukjin Kim <kgene.kim@samsung.com> */
374 /* Maintainer: Changhwan Youn <chaos.youn@samsung.com> */
375 .atag_offset = 0x100,
376 .init_irq = exynos4_init_irq,
377 .map_io = smdkv310_map_io,
378 .init_machine = smdkv310_machine_init,
379 .timer = &exynos4_timer,
380 .reserve = &smdkv310_reserve,
381MACHINE_END
382
383MACHINE_START(SMDKC210, "SMDKC210")
384 /* Maintainer: Kukjin Kim <kgene.kim@samsung.com> */
385 .atag_offset = 0x100,
386 .init_irq = exynos4_init_irq,
387 .map_io = smdkv310_map_io,
388 .init_machine = smdkv310_machine_init,
389 .timer = &exynos4_timer,
390MACHINE_END
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