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authorKukjin Kim <kgene.kim@samsung.com>2011-12-27 02:18:36 -0500
committerRussell King <rmk+kernel@arm.linux.org.uk>2012-01-03 05:25:04 -0500
commitcc511b8d84d88ab788cddbfe8d21485b1c387493 (patch)
tree982ddc62c44ad8c2bd2bd43fd87d0b5c61c61201 /arch/arm/mach-exynos/mach-smdk4x12.c
parent3fa754c298b7e6fcbdbe615d6b609117fa7e0de9 (diff)
ARM: 7257/1: EXYNOS: introduce arch/arm/mach-exynos/common.[ch]
This patch introduces common.[ch] which are used only in the arch/arm/mach-exynos/ directory. The common.c file merges the cpu.c, init.c, irq-combiner.c and irq-eint.c files which are used commonly on EXYNOS SoCs and the common.h file replaces with plat/exynos4.h file. Cc: Ben Dooks <ben-linux@fluff.org> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/mach-exynos/mach-smdk4x12.c')
-rw-r--r--arch/arm/mach-exynos/mach-smdk4x12.c5
1 files changed, 3 insertions, 2 deletions
diff --git a/arch/arm/mach-exynos/mach-smdk4x12.c b/arch/arm/mach-exynos/mach-smdk4x12.c
index fcf2e0e23d53..2f4cb89aadbb 100644
--- a/arch/arm/mach-exynos/mach-smdk4x12.c
+++ b/arch/arm/mach-exynos/mach-smdk4x12.c
@@ -27,7 +27,6 @@
27#include <plat/clock.h> 27#include <plat/clock.h>
28#include <plat/cpu.h> 28#include <plat/cpu.h>
29#include <plat/devs.h> 29#include <plat/devs.h>
30#include <plat/exynos4.h>
31#include <plat/gpio-cfg.h> 30#include <plat/gpio-cfg.h>
32#include <plat/iic.h> 31#include <plat/iic.h>
33#include <plat/keypad.h> 32#include <plat/keypad.h>
@@ -36,6 +35,8 @@
36 35
37#include <mach/map.h> 36#include <mach/map.h>
38 37
38#include "common.h"
39
39/* Following are default values for UCON, ULCON and UFCON UART registers */ 40/* Following are default values for UCON, ULCON and UFCON UART registers */
40#define SMDK4X12_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \ 41#define SMDK4X12_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \
41 S3C2410_UCON_RXILEVEL | \ 42 S3C2410_UCON_RXILEVEL | \
@@ -249,7 +250,7 @@ static void __init smdk4x12_map_io(void)
249{ 250{
250 clk_xusbxti.rate = 24000000; 251 clk_xusbxti.rate = 24000000;
251 252
252 s5p_init_io(NULL, 0, S5P_VA_CHIPID); 253 exynos_init_io(NULL, 0);
253 s3c24xx_init_clocks(clk_xusbxti.rate); 254 s3c24xx_init_clocks(clk_xusbxti.rate);
254 s3c24xx_init_uarts(smdk4x12_uartcfgs, ARRAY_SIZE(smdk4x12_uartcfgs)); 255 s3c24xx_init_uarts(smdk4x12_uartcfgs, ARRAY_SIZE(smdk4x12_uartcfgs));
255} 256}