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authorKukjin Kim <kgene.kim@samsung.com>2012-02-11 08:15:45 -0500
committerKukjin Kim <kgene.kim@samsung.com>2012-03-14 05:13:06 -0400
commit94c7ca71c40ffcde28388a712cab524d636bec60 (patch)
treebaf9c7efd2326a8b936e16cebd1aa3e2f1be2217 /arch/arm/mach-exynos/include
parent171c067c1a3f903fca78f2610794441a7d1e64f3 (diff)
ARM: EXYNOS: add support for EXYNOS5250 SoC
This patch add support for EXYNOS5250 SoC has two Cortex-A15 cores. Since actually, most codes in mach-exynos/ are used commonly for EXYNOS4 and EXYNOS5 the EXYNOS5/EXYNOS5250 has been implemented in mach-exynos/. Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Diffstat (limited to 'arch/arm/mach-exynos/include')
-rw-r--r--arch/arm/mach-exynos/include/mach/map.h21
-rw-r--r--arch/arm/mach-exynos/include/mach/regs-pmu.h1
2 files changed, 20 insertions, 2 deletions
diff --git a/arch/arm/mach-exynos/include/mach/map.h b/arch/arm/mach-exynos/include/mach/map.h
index ea513c626b12..bf90bb0ab2b8 100644
--- a/arch/arm/mach-exynos/include/mach/map.h
+++ b/arch/arm/mach-exynos/include/mach/map.h
@@ -25,6 +25,7 @@
25 25
26#define EXYNOS4_PA_SYSRAM0 0x02025000 26#define EXYNOS4_PA_SYSRAM0 0x02025000
27#define EXYNOS4_PA_SYSRAM1 0x02020000 27#define EXYNOS4_PA_SYSRAM1 0x02020000
28#define EXYNOS5_PA_SYSRAM 0x02020000
28 29
29#define EXYNOS4_PA_FIMC0 0x11800000 30#define EXYNOS4_PA_FIMC0 0x11800000
30#define EXYNOS4_PA_FIMC1 0x11810000 31#define EXYNOS4_PA_FIMC1 0x11810000
@@ -44,14 +45,23 @@
44#define EXYNOS4_PA_ONENAND 0x0C000000 45#define EXYNOS4_PA_ONENAND 0x0C000000
45#define EXYNOS4_PA_ONENAND_DMA 0x0C600000 46#define EXYNOS4_PA_ONENAND_DMA 0x0C600000
46 47
47#define EXYNOS4_PA_CHIPID 0x10000000 48#define EXYNOS_PA_CHIPID 0x10000000
48 49
49#define EXYNOS4_PA_SYSCON 0x10010000 50#define EXYNOS4_PA_SYSCON 0x10010000
51#define EXYNOS5_PA_SYSCON 0x10050100
52
50#define EXYNOS4_PA_PMU 0x10020000 53#define EXYNOS4_PA_PMU 0x10020000
54#define EXYNOS5_PA_PMU 0x10040000
55
51#define EXYNOS4_PA_CMU 0x10030000 56#define EXYNOS4_PA_CMU 0x10030000
57#define EXYNOS5_PA_CMU 0x10010000
52 58
53#define EXYNOS4_PA_SYSTIMER 0x10050000 59#define EXYNOS4_PA_SYSTIMER 0x10050000
60#define EXYNOS5_PA_SYSTIMER 0x101C0000
61
54#define EXYNOS4_PA_WATCHDOG 0x10060000 62#define EXYNOS4_PA_WATCHDOG 0x10060000
63#define EXYNOS5_PA_WATCHDOG 0x101D0000
64
55#define EXYNOS4_PA_RTC 0x10070000 65#define EXYNOS4_PA_RTC 0x10070000
56 66
57#define EXYNOS4_PA_KEYPAD 0x100A0000 67#define EXYNOS4_PA_KEYPAD 0x100A0000
@@ -59,9 +69,12 @@
59#define EXYNOS4_PA_DMC0 0x10400000 69#define EXYNOS4_PA_DMC0 0x10400000
60 70
61#define EXYNOS4_PA_COMBINER 0x10440000 71#define EXYNOS4_PA_COMBINER 0x10440000
72#define EXYNOS5_PA_COMBINER 0x10440000
62 73
63#define EXYNOS4_PA_GIC_CPU 0x10480000 74#define EXYNOS4_PA_GIC_CPU 0x10480000
64#define EXYNOS4_PA_GIC_DIST 0x10490000 75#define EXYNOS4_PA_GIC_DIST 0x10490000
76#define EXYNOS5_PA_GIC_CPU 0x10480000
77#define EXYNOS5_PA_GIC_DIST 0x10490000
65 78
66#define EXYNOS4_PA_COREPERI 0x10500000 79#define EXYNOS4_PA_COREPERI 0x10500000
67#define EXYNOS4_PA_TWD 0x10500600 80#define EXYNOS4_PA_TWD 0x10500600
@@ -92,7 +105,6 @@
92#define EXYNOS4_PA_SPI1 0x13930000 105#define EXYNOS4_PA_SPI1 0x13930000
93#define EXYNOS4_PA_SPI2 0x13940000 106#define EXYNOS4_PA_SPI2 0x13940000
94 107
95
96#define EXYNOS4_PA_GPIO1 0x11400000 108#define EXYNOS4_PA_GPIO1 0x11400000
97#define EXYNOS4_PA_GPIO2 0x11000000 109#define EXYNOS4_PA_GPIO2 0x11000000
98#define EXYNOS4_PA_GPIO3 0x03860000 110#define EXYNOS4_PA_GPIO3 0x03860000
@@ -110,6 +122,7 @@
110#define EXYNOS4_PA_SATAPHY_CTRL 0x126B0000 122#define EXYNOS4_PA_SATAPHY_CTRL 0x126B0000
111 123
112#define EXYNOS4_PA_SROMC 0x12570000 124#define EXYNOS4_PA_SROMC 0x12570000
125#define EXYNOS5_PA_SROMC 0x12250000
113 126
114#define EXYNOS4_PA_EHCI 0x12580000 127#define EXYNOS4_PA_EHCI 0x12580000
115#define EXYNOS4_PA_OHCI 0x12590000 128#define EXYNOS4_PA_OHCI 0x12590000
@@ -117,6 +130,7 @@
117#define EXYNOS4_PA_MFC 0x13400000 130#define EXYNOS4_PA_MFC 0x13400000
118 131
119#define EXYNOS4_PA_UART 0x13800000 132#define EXYNOS4_PA_UART 0x13800000
133#define EXYNOS5_PA_UART 0x12C00000
120 134
121#define EXYNOS4_PA_VP 0x12C00000 135#define EXYNOS4_PA_VP 0x12C00000
122#define EXYNOS4_PA_MIXER 0x12C10000 136#define EXYNOS4_PA_MIXER 0x12C10000
@@ -125,6 +139,7 @@
125#define EXYNOS4_PA_IIC_HDMIPHY 0x138E0000 139#define EXYNOS4_PA_IIC_HDMIPHY 0x138E0000
126 140
127#define EXYNOS4_PA_IIC(x) (0x13860000 + ((x) * 0x10000)) 141#define EXYNOS4_PA_IIC(x) (0x13860000 + ((x) * 0x10000))
142#define EXYNOS5_PA_IIC(x) (0x12C60000 + ((x) * 0x10000))
128 143
129#define EXYNOS4_PA_ADC 0x13910000 144#define EXYNOS4_PA_ADC 0x13910000
130#define EXYNOS4_PA_ADC1 0x13911000 145#define EXYNOS4_PA_ADC1 0x13911000
@@ -134,8 +149,10 @@
134#define EXYNOS4_PA_SPDIF 0x139B0000 149#define EXYNOS4_PA_SPDIF 0x139B0000
135 150
136#define EXYNOS4_PA_TIMER 0x139D0000 151#define EXYNOS4_PA_TIMER 0x139D0000
152#define EXYNOS5_PA_TIMER 0x12DD0000
137 153
138#define EXYNOS4_PA_SDRAM 0x40000000 154#define EXYNOS4_PA_SDRAM 0x40000000
155#define EXYNOS5_PA_SDRAM 0x40000000
139 156
140/* Compatibiltiy Defines */ 157/* Compatibiltiy Defines */
141 158
diff --git a/arch/arm/mach-exynos/include/mach/regs-pmu.h b/arch/arm/mach-exynos/include/mach/regs-pmu.h
index 4fff8e938fec..4c53f38b5a9e 100644
--- a/arch/arm/mach-exynos/include/mach/regs-pmu.h
+++ b/arch/arm/mach-exynos/include/mach/regs-pmu.h
@@ -31,6 +31,7 @@
31#define S5P_USE_STANDBYWFE_ISP_ARM (1 << 26) 31#define S5P_USE_STANDBYWFE_ISP_ARM (1 << 26)
32 32
33#define S5P_SWRESET S5P_PMUREG(0x0400) 33#define S5P_SWRESET S5P_PMUREG(0x0400)
34#define EXYNOS_SWRESET S5P_PMUREG(0x0400)
34 35
35#define S5P_WAKEUP_STAT S5P_PMUREG(0x0600) 36#define S5P_WAKEUP_STAT S5P_PMUREG(0x0600)
36#define S5P_EINT_WAKEUP_MASK S5P_PMUREG(0x0604) 37#define S5P_EINT_WAKEUP_MASK S5P_PMUREG(0x0604)