ARM: EXYNOS: Enable PMUs for exynos4

This patch defines irq numbers of ARM performance monitoring unit for exynos4.
Firs of all, we need to fix IRQ_PMU correctly and to split pmu initialization
of exynos from plat-samsung for easily defining it.

The number of CPU cores and PMU irq numbers are vary according to soc types.
So, we need to identify each soc type using soc_is_xxx function and to define
the pmu irqs dynamically. For example, the exynos4412 has 4 cpu cores and pmus.

Signed-off-by: Chanho Park <chanho61.park@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>

1 files changed, 6 insertions, 2 deletions

diff --git a/arch/arm/mach-exynos/include/mach/irqs.h b/arch/arm/mach-exynos/include/mach/irqs.h
index 387490661403..35fe6d52d230 100644
--- a/arch/arm/mach-exynos/include/mach/irqs.h
+++ b/arch/arm/mach-exynos/include/mach/irqs.h
@@ -126,7 +126,7 @@
 #define EXYNOS4_IRQ_ADC1                IRQ_SPI(107)
 #define EXYNOS4_IRQ_PEN1                IRQ_SPI(108)
 #define EXYNOS4_IRQ_KEYPAD              IRQ_SPI(109)
-#define EXYNOS4_IRQ_PMU                 IRQ_SPI(110)
+#define EXYNOS4_IRQ_POWER_PMU           IRQ_SPI(110)
 #define EXYNOS4_IRQ_GPS                 IRQ_SPI(111)
 #define EXYNOS4_IRQ_INTFEEDCTRL_SSS     IRQ_SPI(112)
 #define EXYNOS4_IRQ_SLIMBUS             IRQ_SPI(113)
@@ -134,6 +134,11 @@
 #define EXYNOS4_IRQ_TSI                 IRQ_SPI(115)
 #define EXYNOS4_IRQ_SATA                IRQ_SPI(116)
 
+#define EXYNOS4_IRQ_PMU                 COMBINER_IRQ(2, 2)
+#define EXYNOS4_IRQ_PMU_CPU1            COMBINER_IRQ(3, 2)
+#define EXYNOS4_IRQ_PMU_CPU2            COMBINER_IRQ(18, 2)
+#define EXYNOS4_IRQ_PMU_CPU3            COMBINER_IRQ(19, 2)
+
 #define EXYNOS4_IRQ_TMU_TRIG0           COMBINER_IRQ(2, 4)
 #define EXYNOS4_IRQ_TMU_TRIG1           COMBINER_IRQ(3, 4)
 
@@ -234,7 +239,6 @@
 #define IRQ_TC                          EXYNOS4_IRQ_PEN0
 
 #define IRQ_KEYPAD                      EXYNOS4_IRQ_KEYPAD
-#define IRQ_PMU                         EXYNOS4_IRQ_PMU
 
 #define IRQ_FIMD0_FIFO                  EXYNOS4_IRQ_FIMD0_FIFO
 #define IRQ_FIMD0_VSYNC                 EXYNOS4_IRQ_FIMD0_VSYNC