diff options
author | Abhilash Kesavan <a.kesavan@samsung.com> | 2012-11-22 00:46:17 -0500 |
---|---|---|
committer | Kukjin Kim <kgene.kim@samsung.com> | 2012-11-27 17:42:04 -0500 |
commit | 756e46dbaacf1d6d3cbefcef725e0f969afcb1e5 (patch) | |
tree | 23d182022b10128f5c154c8469c7149bcd8c3a59 /arch/arm/mach-exynos/hotplug.c | |
parent | f4a75d2eb7b1e2206094b901be09adb31ba63681 (diff) |
ARM: EXYNOS: fix the hotplug for Cortex-A15
The sequence of cpu_enter_lowpower() for Cortex-A15 is
different from the sequence for Cortex-A9. This patch
implements cpu_enter_lowpower() for EXYNOS5 SoC which
has Cortex-A15 cores.
Basded on original patch has been submitted by Changhwan Youn
Signed-off-by: Changhwan Youn <chaos.youn@samsung.com>
Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com>
Cc: Russell King <rmk+kernel@arm.linux.org.uk>
[kgene.kim@samsung.com: use flush_cache_louis() instead of
flush_cache_all() as per Lorenzo and Santosh's suggestion]
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Diffstat (limited to 'arch/arm/mach-exynos/hotplug.c')
-rw-r--r-- | arch/arm/mach-exynos/hotplug.c | 45 |
1 files changed, 42 insertions, 3 deletions
diff --git a/arch/arm/mach-exynos/hotplug.c b/arch/arm/mach-exynos/hotplug.c index f4d7dd20cdac..c3f825b27947 100644 --- a/arch/arm/mach-exynos/hotplug.c +++ b/arch/arm/mach-exynos/hotplug.c | |||
@@ -20,10 +20,11 @@ | |||
20 | #include <asm/smp_plat.h> | 20 | #include <asm/smp_plat.h> |
21 | 21 | ||
22 | #include <mach/regs-pmu.h> | 22 | #include <mach/regs-pmu.h> |
23 | #include <plat/cpu.h> | ||
23 | 24 | ||
24 | #include "common.h" | 25 | #include "common.h" |
25 | 26 | ||
26 | static inline void cpu_enter_lowpower(void) | 27 | static inline void cpu_enter_lowpower_a9(void) |
27 | { | 28 | { |
28 | unsigned int v; | 29 | unsigned int v; |
29 | 30 | ||
@@ -45,6 +46,35 @@ static inline void cpu_enter_lowpower(void) | |||
45 | : "cc"); | 46 | : "cc"); |
46 | } | 47 | } |
47 | 48 | ||
49 | static inline void cpu_enter_lowpower_a15(void) | ||
50 | { | ||
51 | unsigned int v; | ||
52 | |||
53 | asm volatile( | ||
54 | " mrc p15, 0, %0, c1, c0, 0\n" | ||
55 | " bic %0, %0, %1\n" | ||
56 | " mcr p15, 0, %0, c1, c0, 0\n" | ||
57 | : "=&r" (v) | ||
58 | : "Ir" (CR_C) | ||
59 | : "cc"); | ||
60 | |||
61 | flush_cache_louis(); | ||
62 | |||
63 | asm volatile( | ||
64 | /* | ||
65 | * Turn off coherency | ||
66 | */ | ||
67 | " mrc p15, 0, %0, c1, c0, 1\n" | ||
68 | " bic %0, %0, %1\n" | ||
69 | " mcr p15, 0, %0, c1, c0, 1\n" | ||
70 | : "=&r" (v) | ||
71 | : "Ir" (0x40) | ||
72 | : "cc"); | ||
73 | |||
74 | isb(); | ||
75 | dsb(); | ||
76 | } | ||
77 | |||
48 | static inline void cpu_leave_lowpower(void) | 78 | static inline void cpu_leave_lowpower(void) |
49 | { | 79 | { |
50 | unsigned int v; | 80 | unsigned int v; |
@@ -103,11 +133,20 @@ static inline void platform_do_lowpower(unsigned int cpu, int *spurious) | |||
103 | void __ref exynos_cpu_die(unsigned int cpu) | 133 | void __ref exynos_cpu_die(unsigned int cpu) |
104 | { | 134 | { |
105 | int spurious = 0; | 135 | int spurious = 0; |
136 | int primary_part = 0; | ||
106 | 137 | ||
107 | /* | 138 | /* |
108 | * we're ready for shutdown now, so do it | 139 | * we're ready for shutdown now, so do it. |
140 | * Exynos4 is A9 based while Exynos5 is A15; check the CPU part | ||
141 | * number by reading the Main ID register and then perform the | ||
142 | * appropriate sequence for entering low power. | ||
109 | */ | 143 | */ |
110 | cpu_enter_lowpower(); | 144 | asm("mrc p15, 0, %0, c0, c0, 0" : "=r"(primary_part) : : "cc"); |
145 | if ((primary_part & 0xfff0) == 0xc0f0) | ||
146 | cpu_enter_lowpower_a15(); | ||
147 | else | ||
148 | cpu_enter_lowpower_a9(); | ||
149 | |||
111 | platform_do_lowpower(cpu, &spurious); | 150 | platform_do_lowpower(cpu, &spurious); |
112 | 151 | ||
113 | /* | 152 | /* |