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authorRussell King <rmk+kernel@arm.linux.org.uk>2012-03-27 06:30:31 -0400
committerRussell King <rmk+kernel@arm.linux.org.uk>2012-03-27 06:30:31 -0400
commitb0df89868006517417251e02cc4ce5d4b0165885 (patch)
tree6800388c633a13f64fd1f7845ce026ca2606522f /arch/arm/mach-exynos/dma.c
parent4ba21e868f4b6e2ce5432055e206edadc6319533 (diff)
parent6c634726352f0d796a4b5e6aa9849ee5b45712ce (diff)
Merge branch 'devel-stable' into for-linus
Conflicts: arch/arm/Kconfig.debug arch/arm/plat-versatile/Kconfig Merge fixes: arch/arm/mach-integrator/Kconfig drivers/clocksource/Kconfig
Diffstat (limited to 'arch/arm/mach-exynos/dma.c')
-rw-r--r--arch/arm/mach-exynos/dma.c38
1 files changed, 6 insertions, 32 deletions
diff --git a/arch/arm/mach-exynos/dma.c b/arch/arm/mach-exynos/dma.c
index b10fcd270f07..91370def4a70 100644
--- a/arch/arm/mach-exynos/dma.c
+++ b/arch/arm/mach-exynos/dma.c
@@ -74,21 +74,8 @@ struct dma_pl330_platdata exynos4_pdma0_pdata = {
74 .peri_id = pdma0_peri, 74 .peri_id = pdma0_peri,
75}; 75};
76 76
77struct amba_device exynos4_device_pdma0 = { 77AMBA_AHB_DEVICE(exynos4_pdma0, "dma-pl330.0", 0x00041330, EXYNOS4_PA_PDMA0,
78 .dev = { 78 {IRQ_PDMA0}, &exynos4_pdma0_pdata);
79 .init_name = "dma-pl330.0",
80 .dma_mask = &dma_dmamask,
81 .coherent_dma_mask = DMA_BIT_MASK(32),
82 .platform_data = &exynos4_pdma0_pdata,
83 },
84 .res = {
85 .start = EXYNOS4_PA_PDMA0,
86 .end = EXYNOS4_PA_PDMA0 + SZ_4K,
87 .flags = IORESOURCE_MEM,
88 },
89 .irq = {IRQ_PDMA0, NO_IRQ},
90 .periphid = 0x00041330,
91};
92 79
93u8 pdma1_peri[] = { 80u8 pdma1_peri[] = {
94 DMACH_PCM0_RX, 81 DMACH_PCM0_RX,
@@ -123,21 +110,8 @@ struct dma_pl330_platdata exynos4_pdma1_pdata = {
123 .peri_id = pdma1_peri, 110 .peri_id = pdma1_peri,
124}; 111};
125 112
126struct amba_device exynos4_device_pdma1 = { 113AMBA_AHB_DEVICE(exynos4_pdma1, "dma-pl330.1", 0x00041330, EXYNOS4_PA_PDMA1,
127 .dev = { 114 {IRQ_PDMA1}, &exynos4_pdma1_pdata);
128 .init_name = "dma-pl330.1",
129 .dma_mask = &dma_dmamask,
130 .coherent_dma_mask = DMA_BIT_MASK(32),
131 .platform_data = &exynos4_pdma1_pdata,
132 },
133 .res = {
134 .start = EXYNOS4_PA_PDMA1,
135 .end = EXYNOS4_PA_PDMA1 + SZ_4K,
136 .flags = IORESOURCE_MEM,
137 },
138 .irq = {IRQ_PDMA1, NO_IRQ},
139 .periphid = 0x00041330,
140};
141 115
142static int __init exynos4_dma_init(void) 116static int __init exynos4_dma_init(void)
143{ 117{
@@ -146,11 +120,11 @@ static int __init exynos4_dma_init(void)
146 120
147 dma_cap_set(DMA_SLAVE, exynos4_pdma0_pdata.cap_mask); 121 dma_cap_set(DMA_SLAVE, exynos4_pdma0_pdata.cap_mask);
148 dma_cap_set(DMA_CYCLIC, exynos4_pdma0_pdata.cap_mask); 122 dma_cap_set(DMA_CYCLIC, exynos4_pdma0_pdata.cap_mask);
149 amba_device_register(&exynos4_device_pdma0, &iomem_resource); 123 amba_device_register(&exynos4_pdma0_device, &iomem_resource);
150 124
151 dma_cap_set(DMA_SLAVE, exynos4_pdma1_pdata.cap_mask); 125 dma_cap_set(DMA_SLAVE, exynos4_pdma1_pdata.cap_mask);
152 dma_cap_set(DMA_CYCLIC, exynos4_pdma1_pdata.cap_mask); 126 dma_cap_set(DMA_CYCLIC, exynos4_pdma1_pdata.cap_mask);
153 amba_device_register(&exynos4_device_pdma1, &iomem_resource); 127 amba_device_register(&exynos4_pdma1_device, &iomem_resource);
154 128
155 return 0; 129 return 0;
156} 130}