diff options
author | Linus Torvalds <torvalds@linux-foundation.org> | 2012-01-09 17:21:03 -0500 |
---|---|---|
committer | Linus Torvalds <torvalds@linux-foundation.org> | 2012-01-09 17:21:03 -0500 |
commit | acc952c1f373bf3f66cc7a10680eee1762bed40b (patch) | |
tree | de1135ffe304f4d8e53d282e5bb1bde5db04e0ae /arch/arm/mach-exynos/common.c | |
parent | 57e964e1ae9bd4f699ae1074430bcf81a9a11377 (diff) | |
parent | 40ba95fdf158713377d47736b1b3a9d75f4f2515 (diff) |
Merge tag 'cleanup' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Cleanups on various subarchitectures
Cleanup patches for various ARM platforms and some of their associated
drivers, the bulk of these is for mach-91.
Arnd ended up pulling in the restart branch from Russell in order to
fix up some simple but annoying merge conflicts.
* tag 'cleanup' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (44 commits)
arm/at91: fix build of stamp9g20
ARM: u300: delete memory.h
MAINTAINERS: add maintainer entry for Picochip picoxcell
ARM: picoxcell: move io mappings to common.c
ARM: picoxcell: don't reserve irq_descs
ARM: picoxcell: remove mach/memory.h
ARM: at91: delete the pcontrol_g20_defconfig
arm/tegra: Remove code that's ifndef CONFIG_ARM_GIC
arm/tegra: remove unused defines
arm/tegra: fix variable formatting in makefile
ARM: davinci: vpif: move code to driver core header from platform
ARM: at91/gpio: fix display of number of irq setuped
ARM: at91/gpio: drop PIN_BASE
ARM: at91/udc: use gpio_is_valid to check the gpio
ARM: at91/ohci: use gpio_is_valid to check the gpio
ARM: at91/nand: use gpio_is_valid to check the gpio
ARM: at91/mmc: use gpio_is_valid to check the gpio
ARM: at91/ide: use gpio_is_valid to check the gpio
ARM: at91/pata: use gpio_is_valid to check the gpio
ARM: at91/soc: use gpio_is_valid to check the gpio
...
Diffstat (limited to 'arch/arm/mach-exynos/common.c')
-rw-r--r-- | arch/arm/mach-exynos/common.c | 20 |
1 files changed, 3 insertions, 17 deletions
diff --git a/arch/arm/mach-exynos/common.c b/arch/arm/mach-exynos/common.c index b6ac6ee658c0..647c8434610c 100644 --- a/arch/arm/mach-exynos/common.c +++ b/arch/arm/mach-exynos/common.c | |||
@@ -19,6 +19,7 @@ | |||
19 | #include <linux/serial_core.h> | 19 | #include <linux/serial_core.h> |
20 | 20 | ||
21 | #include <asm/proc-fns.h> | 21 | #include <asm/proc-fns.h> |
22 | #include <asm/exception.h> | ||
22 | #include <asm/hardware/cache-l2x0.h> | 23 | #include <asm/hardware/cache-l2x0.h> |
23 | #include <asm/hardware/gic.h> | 24 | #include <asm/hardware/gic.h> |
24 | #include <asm/mach/map.h> | 25 | #include <asm/mach/map.h> |
@@ -43,8 +44,6 @@ | |||
43 | 44 | ||
44 | #include "common.h" | 45 | #include "common.h" |
45 | 46 | ||
46 | unsigned int gic_bank_offset __read_mostly; | ||
47 | |||
48 | static const char name_exynos4210[] = "EXYNOS4210"; | 47 | static const char name_exynos4210[] = "EXYNOS4210"; |
49 | static const char name_exynos4212[] = "EXYNOS4212"; | 48 | static const char name_exynos4212[] = "EXYNOS4212"; |
50 | static const char name_exynos4412[] = "EXYNOS4412"; | 49 | static const char name_exynos4412[] = "EXYNOS4412"; |
@@ -386,27 +385,14 @@ static void __init combiner_init(unsigned int combiner_nr, void __iomem *base, | |||
386 | } | 385 | } |
387 | } | 386 | } |
388 | 387 | ||
389 | static void exynos4_gic_irq_fix_base(struct irq_data *d) | ||
390 | { | ||
391 | struct gic_chip_data *gic_data = irq_data_get_irq_chip_data(d); | ||
392 | |||
393 | gic_data->cpu_base = S5P_VA_GIC_CPU + | ||
394 | (gic_bank_offset * smp_processor_id()); | ||
395 | |||
396 | gic_data->dist_base = S5P_VA_GIC_DIST + | ||
397 | (gic_bank_offset * smp_processor_id()); | ||
398 | } | ||
399 | |||
400 | void __init exynos4_init_irq(void) | 388 | void __init exynos4_init_irq(void) |
401 | { | 389 | { |
402 | int irq; | 390 | int irq; |
391 | unsigned int gic_bank_offset; | ||
403 | 392 | ||
404 | gic_bank_offset = soc_is_exynos4412() ? 0x4000 : 0x8000; | 393 | gic_bank_offset = soc_is_exynos4412() ? 0x4000 : 0x8000; |
405 | 394 | ||
406 | gic_init(0, IRQ_PPI(0), S5P_VA_GIC_DIST, S5P_VA_GIC_CPU); | 395 | gic_init_bases(0, IRQ_PPI(0), S5P_VA_GIC_DIST, S5P_VA_GIC_CPU, gic_bank_offset); |
407 | gic_arch_extn.irq_eoi = exynos4_gic_irq_fix_base; | ||
408 | gic_arch_extn.irq_unmask = exynos4_gic_irq_fix_base; | ||
409 | gic_arch_extn.irq_mask = exynos4_gic_irq_fix_base; | ||
410 | 396 | ||
411 | for (irq = 0; irq < MAX_COMBINER_NR; irq++) { | 397 | for (irq = 0; irq < MAX_COMBINER_NR; irq++) { |
412 | 398 | ||