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authorRyan Mallon <rmallon@gmail.com>2012-01-10 17:29:26 -0500
committerRyan Mallon <rmallon@gmail.com>2012-03-13 20:42:27 -0400
commita05baf335b8bc25e0fab0fd1821e796174f98ea1 (patch)
treef6cea3047979b47024b2d2dbbf700cee8861beaa /arch/arm/mach-ep93xx/include/mach
parent73303d129201de7af7fa837597e9c470c5efa71f (diff)
ep93xx: Move peripheral defines to local SoC header
Move the AHB/APB peripheral defines to local SoC header since they are only needed by the core SoC code. The UART defines are not moved because they are used by the mach/uncompress.h header. Signed-off-by: Ryan Mallon <rmallon@gmail.com> Reviewed-by: Mika Westerberg <mika.westerberg@iki.fi> Acked-by: Hartley Sweeten <hsweeten@visionengravers.com> Acked-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'arch/arm/mach-ep93xx/include/mach')
-rw-r--r--arch/arm/mach-ep93xx/include/mach/ep93xx-regs.h61
1 files changed, 1 insertions, 60 deletions
diff --git a/arch/arm/mach-ep93xx/include/mach/ep93xx-regs.h b/arch/arm/mach-ep93xx/include/mach/ep93xx-regs.h
index f28afcf29fc1..fbda7b4d2158 100644
--- a/arch/arm/mach-ep93xx/include/mach/ep93xx-regs.h
+++ b/arch/arm/mach-ep93xx/include/mach/ep93xx-regs.h
@@ -28,50 +28,7 @@
28#define EP93XX_APB_PHYS(x) (EP93XX_APB_PHYS_BASE + (x)) 28#define EP93XX_APB_PHYS(x) (EP93XX_APB_PHYS_BASE + (x))
29#define EP93XX_APB_IOMEM(x) IOMEM(EP93XX_APB_VIRT_BASE + (x)) 29#define EP93XX_APB_IOMEM(x) IOMEM(EP93XX_APB_VIRT_BASE + (x))
30 30
31 31/* APB UARTs */
32/* AHB peripherals */
33#define EP93XX_DMA_BASE EP93XX_AHB_IOMEM(0x00000000)
34
35#define EP93XX_ETHERNET_PHYS_BASE EP93XX_AHB_PHYS(0x00010000)
36#define EP93XX_ETHERNET_BASE EP93XX_AHB_IOMEM(0x00010000)
37
38#define EP93XX_USB_PHYS_BASE EP93XX_AHB_PHYS(0x00020000)
39#define EP93XX_USB_BASE EP93XX_AHB_IOMEM(0x00020000)
40
41#define EP93XX_RASTER_PHYS_BASE EP93XX_AHB_PHYS(0x00030000)
42#define EP93XX_RASTER_BASE EP93XX_AHB_IOMEM(0x00030000)
43
44#define EP93XX_GRAPHICS_ACCEL_BASE EP93XX_AHB_IOMEM(0x00040000)
45
46#define EP93XX_SDRAM_CONTROLLER_BASE EP93XX_AHB_IOMEM(0x00060000)
47
48#define EP93XX_PCMCIA_CONTROLLER_BASE EP93XX_AHB_IOMEM(0x00080000)
49
50#define EP93XX_BOOT_ROM_BASE EP93XX_AHB_IOMEM(0x00090000)
51
52#define EP93XX_IDE_BASE EP93XX_AHB_IOMEM(0x000a0000)
53
54#define EP93XX_VIC1_BASE EP93XX_AHB_IOMEM(0x000b0000)
55
56#define EP93XX_VIC2_BASE EP93XX_AHB_IOMEM(0x000c0000)
57
58
59/* APB peripherals */
60#define EP93XX_TIMER_BASE EP93XX_APB_IOMEM(0x00010000)
61
62#define EP93XX_I2S_PHYS_BASE EP93XX_APB_PHYS(0x00020000)
63#define EP93XX_I2S_BASE EP93XX_APB_IOMEM(0x00020000)
64
65#define EP93XX_SECURITY_BASE EP93XX_APB_IOMEM(0x00030000)
66
67#define EP93XX_AAC_PHYS_BASE EP93XX_APB_PHYS(0x00080000)
68#define EP93XX_AAC_BASE EP93XX_APB_IOMEM(0x00080000)
69
70#define EP93XX_SPI_PHYS_BASE EP93XX_APB_PHYS(0x000a0000)
71#define EP93XX_SPI_BASE EP93XX_APB_IOMEM(0x000a0000)
72
73#define EP93XX_IRDA_BASE EP93XX_APB_IOMEM(0x000b0000)
74
75#define EP93XX_UART1_PHYS_BASE EP93XX_APB_PHYS(0x000c0000) 32#define EP93XX_UART1_PHYS_BASE EP93XX_APB_PHYS(0x000c0000)
76#define EP93XX_UART1_BASE EP93XX_APB_IOMEM(0x000c0000) 33#define EP93XX_UART1_BASE EP93XX_APB_IOMEM(0x000c0000)
77 34
@@ -81,18 +38,6 @@
81#define EP93XX_UART3_PHYS_BASE EP93XX_APB_PHYS(0x000e0000) 38#define EP93XX_UART3_PHYS_BASE EP93XX_APB_PHYS(0x000e0000)
82#define EP93XX_UART3_BASE EP93XX_APB_IOMEM(0x000e0000) 39#define EP93XX_UART3_BASE EP93XX_APB_IOMEM(0x000e0000)
83 40
84#define EP93XX_KEY_MATRIX_PHYS_BASE EP93XX_APB_PHYS(0x000f0000)
85#define EP93XX_KEY_MATRIX_BASE EP93XX_APB_IOMEM(0x000f0000)
86
87#define EP93XX_ADC_BASE EP93XX_APB_IOMEM(0x00100000)
88#define EP93XX_TOUCHSCREEN_BASE EP93XX_APB_IOMEM(0x00100000)
89
90#define EP93XX_PWM_PHYS_BASE EP93XX_APB_PHYS(0x00110000)
91#define EP93XX_PWM_BASE EP93XX_APB_IOMEM(0x00110000)
92
93#define EP93XX_RTC_PHYS_BASE EP93XX_APB_PHYS(0x00120000)
94#define EP93XX_RTC_BASE EP93XX_APB_IOMEM(0x00120000)
95
96#define EP93XX_SYSCON_BASE EP93XX_APB_IOMEM(0x00130000) 41#define EP93XX_SYSCON_BASE EP93XX_APB_IOMEM(0x00130000)
97#define EP93XX_SYSCON_REG(x) (EP93XX_SYSCON_BASE + (x)) 42#define EP93XX_SYSCON_REG(x) (EP93XX_SYSCON_BASE + (x))
98#define EP93XX_SYSCON_POWER_STATE EP93XX_SYSCON_REG(0x00) 43#define EP93XX_SYSCON_POWER_STATE EP93XX_SYSCON_REG(0x00)
@@ -182,8 +127,4 @@
182#define EP93XX_SYSCON_SYSCFG_LCSN1 (1<<0) 127#define EP93XX_SYSCON_SYSCFG_LCSN1 (1<<0)
183#define EP93XX_SYSCON_SWLOCK EP93XX_SYSCON_REG(0xc0) 128#define EP93XX_SYSCON_SWLOCK EP93XX_SYSCON_REG(0xc0)
184 129
185#define EP93XX_WATCHDOG_PHYS_BASE EP93XX_APB_PHYS(0x00140000)
186#define EP93XX_WATCHDOG_BASE EP93XX_APB_IOMEM(0x00140000)
187
188
189#endif 130#endif