Merge branch 'master' of /home/davem/src/GIT/linux-2.6/

Conflicts:
	drivers/staging/Kconfig
	drivers/staging/Makefile
	drivers/staging/cpc-usb/TODO
	drivers/staging/cpc-usb/cpc-usb_drv.c
	drivers/staging/cpc-usb/cpc.h
	drivers/staging/cpc-usb/cpc_int.h
	drivers/staging/cpc-usb/cpcusb.h

1 files changed, 75 insertions, 34 deletions

diff --git a/arch/arm/mach-ep93xx/include/mach/ep93xx-regs.h b/arch/arm/mach-ep93xx/include/mach/ep93xx-regs.h
index 967c079180db..0fbf87b16338 100644
--- a/arch/arm/mach-ep93xx/include/mach/ep93xx-regs.h
+++ b/arch/arm/mach-ep93xx/include/mach/ep93xx-regs.h
@@ -52,40 +52,44 @@
 #define EP93XX_AHB_VIRT_BASE            0xfef00000
 #define EP93XX_AHB_SIZE                 0x00100000
 
+#define EP93XX_AHB_IOMEM(x)             IOMEM(EP93XX_AHB_VIRT_BASE + (x))
+
 #define EP93XX_APB_PHYS_BASE            0x80800000
 #define EP93XX_APB_VIRT_BASE            0xfed00000
 #define EP93XX_APB_SIZE                 0x00200000
 
+#define EP93XX_APB_IOMEM(x)             IOMEM(EP93XX_APB_VIRT_BASE + (x))
+
 
 /* AHB peripherals */
-#define EP93XX_DMA_BASE                 ((void __iomem *)               \
-                                         (EP93XX_AHB_VIRT_BASE + 0x00000000))
+#define EP93XX_DMA_BASE                 EP93XX_AHB_IOMEM(0x00000000)
 
-#define EP93XX_ETHERNET_BASE            (EP93XX_AHB_VIRT_BASE + 0x00010000)
 #define EP93XX_ETHERNET_PHYS_BASE       (EP93XX_AHB_PHYS_BASE + 0x00010000)
+#define EP93XX_ETHERNET_BASE            EP93XX_AHB_IOMEM(0x00010000)
 
-#define EP93XX_USB_BASE                 (EP93XX_AHB_VIRT_BASE + 0x00020000)
 #define EP93XX_USB_PHYS_BASE            (EP93XX_AHB_PHYS_BASE + 0x00020000)
+#define EP93XX_USB_BASE                 EP93XX_AHB_IOMEM(0x00020000)
 
-#define EP93XX_RASTER_BASE              (EP93XX_AHB_VIRT_BASE + 0x00030000)
+#define EP93XX_RASTER_PHYS_BASE         (EP93XX_AHB_PHYS_BASE + 0x00030000)
+#define EP93XX_RASTER_BASE              EP93XX_AHB_IOMEM(0x00030000)
 
-#define EP93XX_GRAPHICS_ACCEL_BASE      (EP93XX_AHB_VIRT_BASE + 0x00040000)
+#define EP93XX_GRAPHICS_ACCEL_BASE      EP93XX_AHB_IOMEM(0x00040000)
 
-#define EP93XX_SDRAM_CONTROLLER_BASE    (EP93XX_AHB_VIRT_BASE + 0x00060000)
+#define EP93XX_SDRAM_CONTROLLER_BASE    EP93XX_AHB_IOMEM(0x00060000)
 
-#define EP93XX_PCMCIA_CONTROLLER_BASE   (EP93XX_AHB_VIRT_BASE + 0x00080000)
+#define EP93XX_PCMCIA_CONTROLLER_BASE   EP93XX_AHB_IOMEM(0x00080000)
 
-#define EP93XX_BOOT_ROM_BASE            (EP93XX_AHB_VIRT_BASE + 0x00090000)
+#define EP93XX_BOOT_ROM_BASE            EP93XX_AHB_IOMEM(0x00090000)
 
-#define EP93XX_IDE_BASE                 (EP93XX_AHB_VIRT_BASE + 0x000a0000)
+#define EP93XX_IDE_BASE                 EP93XX_AHB_IOMEM(0x000a0000)
 
-#define EP93XX_VIC1_BASE                (EP93XX_AHB_VIRT_BASE + 0x000b0000)
+#define EP93XX_VIC1_BASE                EP93XX_AHB_IOMEM(0x000b0000)
 
-#define EP93XX_VIC2_BASE                (EP93XX_AHB_VIRT_BASE + 0x000c0000)
+#define EP93XX_VIC2_BASE                EP93XX_AHB_IOMEM(0x000c0000)
 
 
 /* APB peripherals */
-#define EP93XX_TIMER_BASE               (EP93XX_APB_VIRT_BASE + 0x00010000)
+#define EP93XX_TIMER_BASE               EP93XX_APB_IOMEM(0x00010000)
 #define EP93XX_TIMER_REG(x)             (EP93XX_TIMER_BASE + (x))
 #define EP93XX_TIMER1_LOAD              EP93XX_TIMER_REG(0x00)
 #define EP93XX_TIMER1_VALUE             EP93XX_TIMER_REG(0x04)
@@ -102,11 +106,11 @@
 #define EP93XX_TIMER3_CONTROL           EP93XX_TIMER_REG(0x88)
 #define EP93XX_TIMER3_CLEAR             EP93XX_TIMER_REG(0x8c)
 
-#define EP93XX_I2S_BASE                 (EP93XX_APB_VIRT_BASE + 0x00020000)
+#define EP93XX_I2S_BASE                 EP93XX_APB_IOMEM(0x00020000)
 
-#define EP93XX_SECURITY_BASE            (EP93XX_APB_VIRT_BASE + 0x00030000)
+#define EP93XX_SECURITY_BASE            EP93XX_APB_IOMEM(0x00030000)
 
-#define EP93XX_GPIO_BASE                (EP93XX_APB_VIRT_BASE + 0x00040000)
+#define EP93XX_GPIO_BASE                EP93XX_APB_IOMEM(0x00040000)
 #define EP93XX_GPIO_REG(x)              (EP93XX_GPIO_BASE + (x))
 #define EP93XX_GPIO_F_INT_TYPE1         EP93XX_GPIO_REG(0x4c)
 #define EP93XX_GPIO_F_INT_TYPE2         EP93XX_GPIO_REG(0x50)
@@ -124,32 +128,33 @@
 #define EP93XX_GPIO_B_INT_ENABLE        EP93XX_GPIO_REG(0xb8)
 #define EP93XX_GPIO_B_INT_STATUS        EP93XX_GPIO_REG(0xbc)
 
-#define EP93XX_AAC_BASE                 (EP93XX_APB_VIRT_BASE + 0x00080000)
+#define EP93XX_AAC_BASE                 EP93XX_APB_IOMEM(0x00080000)
 
-#define EP93XX_SPI_BASE                 (EP93XX_APB_VIRT_BASE + 0x000a0000)
+#define EP93XX_SPI_BASE                 EP93XX_APB_IOMEM(0x000a0000)
 
-#define EP93XX_IRDA_BASE                (EP93XX_APB_VIRT_BASE + 0x000b0000)
+#define EP93XX_IRDA_BASE                EP93XX_APB_IOMEM(0x000b0000)
 
-#define EP93XX_UART1_BASE               (EP93XX_APB_VIRT_BASE + 0x000c0000)
 #define EP93XX_UART1_PHYS_BASE          (EP93XX_APB_PHYS_BASE + 0x000c0000)
+#define EP93XX_UART1_BASE               EP93XX_APB_IOMEM(0x000c0000)
 
-#define EP93XX_UART2_BASE               (EP93XX_APB_VIRT_BASE + 0x000d0000)
 #define EP93XX_UART2_PHYS_BASE          (EP93XX_APB_PHYS_BASE + 0x000d0000)
+#define EP93XX_UART2_BASE               EP93XX_APB_IOMEM(0x000d0000)
 
-#define EP93XX_UART3_BASE               (EP93XX_APB_VIRT_BASE + 0x000e0000)
 #define EP93XX_UART3_PHYS_BASE          (EP93XX_APB_PHYS_BASE + 0x000e0000)
+#define EP93XX_UART3_BASE               EP93XX_APB_IOMEM(0x000e0000)
 
-#define EP93XX_KEY_MATRIX_BASE          (EP93XX_APB_VIRT_BASE + 0x000f0000)
+#define EP93XX_KEY_MATRIX_BASE          EP93XX_APB_IOMEM(0x000f0000)
 
-#define EP93XX_ADC_BASE                 (EP93XX_APB_VIRT_BASE + 0x00100000)
-#define EP93XX_TOUCHSCREEN_BASE         (EP93XX_APB_VIRT_BASE + 0x00100000)
+#define EP93XX_ADC_BASE                 EP93XX_APB_IOMEM(0x00100000)
+#define EP93XX_TOUCHSCREEN_BASE         EP93XX_APB_IOMEM(0x00100000)
 
-#define EP93XX_PWM_BASE                 (EP93XX_APB_VIRT_BASE + 0x00110000)
+#define EP93XX_PWM_PHYS_BASE            (EP93XX_APB_PHYS_BASE + 0x00110000)
+#define EP93XX_PWM_BASE                 EP93XX_APB_IOMEM(0x00110000)
 
-#define EP93XX_RTC_BASE                 (EP93XX_APB_VIRT_BASE + 0x00120000)
 #define EP93XX_RTC_PHYS_BASE            (EP93XX_APB_PHYS_BASE + 0x00120000)
+#define EP93XX_RTC_BASE                 EP93XX_APB_IOMEM(0x00120000)
 
-#define EP93XX_SYSCON_BASE              (EP93XX_APB_VIRT_BASE + 0x00130000)
+#define EP93XX_SYSCON_BASE              EP93XX_APB_IOMEM(0x00130000)
 #define EP93XX_SYSCON_REG(x)            (EP93XX_SYSCON_BASE + (x))
 #define EP93XX_SYSCON_POWER_STATE       EP93XX_SYSCON_REG(0x00)
 #define EP93XX_SYSCON_PWRCNT            EP93XX_SYSCON_REG(0x04)
@@ -172,14 +177,50 @@
 #define EP93XX_SYSCON_STANDBY           EP93XX_SYSCON_REG(0x0c)
 #define EP93XX_SYSCON_CLOCK_SET1        EP93XX_SYSCON_REG(0x20)
 #define EP93XX_SYSCON_CLOCK_SET2        EP93XX_SYSCON_REG(0x24)
-#define EP93XX_SYSCON_DEVICE_CONFIG     EP93XX_SYSCON_REG(0x80)
-#define EP93XX_SYSCON_DEVICE_CONFIG_U3EN                (1<<24)
-#define EP93XX_SYSCON_DEVICE_CONFIG_CRUNCH_ENABLE       (1<<23)
-#define EP93XX_SYSCON_DEVICE_CONFIG_U2EN                (1<<20)
-#define EP93XX_SYSCON_DEVICE_CONFIG_U1EN                (1<<18)
+#define EP93XX_SYSCON_DEVCFG            EP93XX_SYSCON_REG(0x80)
+#define EP93XX_SYSCON_DEVCFG_SWRST      (1<<31)
+#define EP93XX_SYSCON_DEVCFG_D1ONG      (1<<30)
+#define EP93XX_SYSCON_DEVCFG_D0ONG      (1<<29)
+#define EP93XX_SYSCON_DEVCFG_IONU2      (1<<28)
+#define EP93XX_SYSCON_DEVCFG_GONK       (1<<27)
+#define EP93XX_SYSCON_DEVCFG_TONG       (1<<26)
+#define EP93XX_SYSCON_DEVCFG_MONG       (1<<25)
+#define EP93XX_SYSCON_DEVCFG_U3EN       (1<<24)
+#define EP93XX_SYSCON_DEVCFG_CPENA      (1<<23)
+#define EP93XX_SYSCON_DEVCFG_A2ONG      (1<<22)
+#define EP93XX_SYSCON_DEVCFG_A1ONG      (1<<21)
+#define EP93XX_SYSCON_DEVCFG_U2EN       (1<<20)
+#define EP93XX_SYSCON_DEVCFG_EXVC       (1<<19)
+#define EP93XX_SYSCON_DEVCFG_U1EN       (1<<18)
+#define EP93XX_SYSCON_DEVCFG_TIN        (1<<17)
+#define EP93XX_SYSCON_DEVCFG_HC3IN      (1<<15)
+#define EP93XX_SYSCON_DEVCFG_HC3EN      (1<<14)
+#define EP93XX_SYSCON_DEVCFG_HC1IN      (1<<13)
+#define EP93XX_SYSCON_DEVCFG_HC1EN      (1<<12)
+#define EP93XX_SYSCON_DEVCFG_HONIDE     (1<<11)
+#define EP93XX_SYSCON_DEVCFG_GONIDE     (1<<10)
+#define EP93XX_SYSCON_DEVCFG_PONG       (1<<9)
+#define EP93XX_SYSCON_DEVCFG_EONIDE     (1<<8)
+#define EP93XX_SYSCON_DEVCFG_I2SONSSP   (1<<7)
+#define EP93XX_SYSCON_DEVCFG_I2SONAC97  (1<<6)
+#define EP93XX_SYSCON_DEVCFG_RASONP3    (1<<4)
+#define EP93XX_SYSCON_DEVCFG_RAS        (1<<3)
+#define EP93XX_SYSCON_DEVCFG_ADCPD      (1<<2)
+#define EP93XX_SYSCON_DEVCFG_KEYS       (1<<1)
+#define EP93XX_SYSCON_DEVCFG_SHENA      (1<<0)
+#define EP93XX_SYSCON_VIDCLKDIV         EP93XX_SYSCON_REG(0x84)
+#define EP93XX_SYSCON_CLKDIV_ENABLE     (1<<15)
+#define EP93XX_SYSCON_CLKDIV_ESEL       (1<<14)
+#define EP93XX_SYSCON_CLKDIV_PSEL       (1<<13)
+#define EP93XX_SYSCON_CLKDIV_PDIV_SHIFT 8
+#define EP93XX_SYSCON_KEYTCHCLKDIV      EP93XX_SYSCON_REG(0x90)
+#define EP93XX_SYSCON_KEYTCHCLKDIV_TSEN (1<<31)
+#define EP93XX_SYSCON_KEYTCHCLKDIV_ADIV (1<<16)
+#define EP93XX_SYSCON_KEYTCHCLKDIV_KEN  (1<<15)
+#define EP93XX_SYSCON_KEYTCHCLKDIV_KDIV (1<<0)
 #define EP93XX_SYSCON_SWLOCK            EP93XX_SYSCON_REG(0xc0)
 
-#define EP93XX_WATCHDOG_BASE            (EP93XX_APB_VIRT_BASE + 0x00140000)
+#define EP93XX_WATCHDOG_BASE            EP93XX_APB_IOMEM(0x00140000)
 
 
 #endif