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authorIngo Molnar <mingo@kernel.org>2012-03-26 11:18:44 -0400
committerIngo Molnar <mingo@kernel.org>2012-03-26 11:19:03 -0400
commit7fd52392c56361a40f0c630a82b36b95ca31eac6 (patch)
tree14091de24c6b28ea4cae9826f98aeedb7be091f5 /arch/arm/mach-ep93xx/core.c
parentb01c3a0010aabadf745f3e7fdb9cab682e0a28a2 (diff)
parente22057c8599373e5caef0bc42bdb95d2a361ab0d (diff)
Merge branch 'linus' into perf/urgent
Merge reason: we need to fix a non-trivial merge conflict. Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'arch/arm/mach-ep93xx/core.c')
-rw-r--r--arch/arm/mach-ep93xx/core.c65
1 files changed, 10 insertions, 55 deletions
diff --git a/arch/arm/mach-ep93xx/core.c b/arch/arm/mach-ep93xx/core.c
index 24203f9a6796..41f0d680c5e1 100644
--- a/arch/arm/mach-ep93xx/core.c
+++ b/arch/arm/mach-ep93xx/core.c
@@ -279,48 +279,14 @@ static struct amba_pl010_data ep93xx_uart_data = {
279 .set_mctrl = ep93xx_uart_set_mctrl, 279 .set_mctrl = ep93xx_uart_set_mctrl,
280}; 280};
281 281
282static struct amba_device uart1_device = { 282static AMBA_APB_DEVICE(uart1, "apb:uart1", 0x00041010, EP93XX_UART1_PHYS_BASE,
283 .dev = { 283 { IRQ_EP93XX_UART1 }, &ep93xx_uart_data);
284 .init_name = "apb:uart1",
285 .platform_data = &ep93xx_uart_data,
286 },
287 .res = {
288 .start = EP93XX_UART1_PHYS_BASE,
289 .end = EP93XX_UART1_PHYS_BASE + 0x0fff,
290 .flags = IORESOURCE_MEM,
291 },
292 .irq = { IRQ_EP93XX_UART1, NO_IRQ },
293 .periphid = 0x00041010,
294};
295 284
296static struct amba_device uart2_device = { 285static AMBA_APB_DEVICE(uart2, "apb:uart2", 0x00041010, EP93XX_UART2_PHYS_BASE,
297 .dev = { 286 { IRQ_EP93XX_UART2 }, &ep93xx_uart_data);
298 .init_name = "apb:uart2",
299 .platform_data = &ep93xx_uart_data,
300 },
301 .res = {
302 .start = EP93XX_UART2_PHYS_BASE,
303 .end = EP93XX_UART2_PHYS_BASE + 0x0fff,
304 .flags = IORESOURCE_MEM,
305 },
306 .irq = { IRQ_EP93XX_UART2, NO_IRQ },
307 .periphid = 0x00041010,
308};
309
310static struct amba_device uart3_device = {
311 .dev = {
312 .init_name = "apb:uart3",
313 .platform_data = &ep93xx_uart_data,
314 },
315 .res = {
316 .start = EP93XX_UART3_PHYS_BASE,
317 .end = EP93XX_UART3_PHYS_BASE + 0x0fff,
318 .flags = IORESOURCE_MEM,
319 },
320 .irq = { IRQ_EP93XX_UART3, NO_IRQ },
321 .periphid = 0x00041010,
322};
323 287
288static AMBA_APB_DEVICE(uart3, "apb:uart3", 0x00041010, EP93XX_UART3_PHYS_BASE,
289 { IRQ_EP93XX_UART3 }, &ep93xx_uart_data);
324 290
325static struct resource ep93xx_rtc_resource[] = { 291static struct resource ep93xx_rtc_resource[] = {
326 { 292 {
@@ -817,23 +783,12 @@ void __init ep93xx_register_i2s(void)
817#define EP93XX_I2SCLKDIV_MASK (EP93XX_SYSCON_I2SCLKDIV_ORIDE | \ 783#define EP93XX_I2SCLKDIV_MASK (EP93XX_SYSCON_I2SCLKDIV_ORIDE | \
818 EP93XX_SYSCON_I2SCLKDIV_SPOL) 784 EP93XX_SYSCON_I2SCLKDIV_SPOL)
819 785
820int ep93xx_i2s_acquire(unsigned i2s_pins, unsigned i2s_config) 786int ep93xx_i2s_acquire(void)
821{ 787{
822 unsigned val; 788 unsigned val;
823 789
824 /* Sanity check */ 790 ep93xx_devcfg_set_clear(EP93XX_SYSCON_DEVCFG_I2SONAC97,
825 if (i2s_pins & ~EP93XX_SYSCON_DEVCFG_I2S_MASK) 791 EP93XX_SYSCON_DEVCFG_I2S_MASK);
826 return -EINVAL;
827 if (i2s_config & ~EP93XX_I2SCLKDIV_MASK)
828 return -EINVAL;
829
830 /* Must have only one of I2SONSSP/I2SONAC97 set */
831 if ((i2s_pins & EP93XX_SYSCON_DEVCFG_I2SONSSP) ==
832 (i2s_pins & EP93XX_SYSCON_DEVCFG_I2SONAC97))
833 return -EINVAL;
834
835 ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_I2S_MASK);
836 ep93xx_devcfg_set_bits(i2s_pins);
837 792
838 /* 793 /*
839 * This is potentially racy with the clock api for i2s_mclk, sclk and 794 * This is potentially racy with the clock api for i2s_mclk, sclk and
@@ -843,7 +798,7 @@ int ep93xx_i2s_acquire(unsigned i2s_pins, unsigned i2s_config)
843 */ 798 */
844 val = __raw_readl(EP93XX_SYSCON_I2SCLKDIV); 799 val = __raw_readl(EP93XX_SYSCON_I2SCLKDIV);
845 val &= ~EP93XX_I2SCLKDIV_MASK; 800 val &= ~EP93XX_I2SCLKDIV_MASK;
846 val |= i2s_config; 801 val |= EP93XX_SYSCON_I2SCLKDIV_ORIDE | EP93XX_SYSCON_I2SCLKDIV_SPOL;
847 ep93xx_syscon_swlocked_write(val, EP93XX_SYSCON_I2SCLKDIV); 802 ep93xx_syscon_swlocked_write(val, EP93XX_SYSCON_I2SCLKDIV);
848 803
849 return 0; 804 return 0;