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authorNicolas Pitre <nicolas.pitre@linaro.org>2011-08-02 12:52:48 -0400
committerNicolas Pitre <nico@fluxnic.net>2012-01-20 18:55:11 -0500
commit1b7f72fc395d3d2b498fee5ecfb9e46497f55cdd (patch)
tree8fefa3bde9652f8acb8bda177f3b38149d53a0be /arch/arm/mach-ebsa110/include
parent71e256c54d67f55536bae184bb579c682714a95a (diff)
ARM: mach-ebsa110: move special idle code out of line
... and hook it to arm_pm_idle. Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
Diffstat (limited to 'arch/arm/mach-ebsa110/include')
-rw-r--r--arch/arm/mach-ebsa110/include/mach/system.h21
1 files changed, 1 insertions, 20 deletions
diff --git a/arch/arm/mach-ebsa110/include/mach/system.h b/arch/arm/mach-ebsa110/include/mach/system.h
index 2e4af65edb6f..b4601699b3be 100644
--- a/arch/arm/mach-ebsa110/include/mach/system.h
+++ b/arch/arm/mach-ebsa110/include/mach/system.h
@@ -10,28 +10,9 @@
10#ifndef __ASM_ARCH_SYSTEM_H 10#ifndef __ASM_ARCH_SYSTEM_H
11#define __ASM_ARCH_SYSTEM_H 11#define __ASM_ARCH_SYSTEM_H
12 12
13/*
14 * EBSA110 idling methodology:
15 *
16 * We can not execute the "wait for interrupt" instruction since that
17 * will stop our MCLK signal (which provides the clock for the glue
18 * logic, and therefore the timer interrupt).
19 *
20 * Instead, we spin, polling the IRQ_STAT register for the occurrence
21 * of any interrupt with core clock down to the memory clock.
22 */
23static inline void arch_idle(void) 13static inline void arch_idle(void)
24{ 14{
25 const char *irq_stat = (char *)0xff000000; 15 cpu_do_idle();
26
27 /* disable clock switching */
28 asm volatile ("mcr p15, 0, ip, c15, c2, 2" : : : "cc");
29
30 /* wait for an interrupt to occur */
31 while (!*irq_stat);
32
33 /* enable clock switching */
34 asm volatile ("mcr p15, 0, ip, c15, c1, 2" : : : "cc");
35} 16}
36 17
37#endif 18#endif