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authorIngo Molnar <mingo@kernel.org>2012-12-08 09:25:06 -0500
committerIngo Molnar <mingo@kernel.org>2012-12-08 09:25:06 -0500
commitf0b9abfb044649bc452fb2fb975ff2fd599cc6a3 (patch)
tree7800081c5cb16a4dfee1e57a70f3be90f7b50d9a /arch/arm/mach-dove/irq.c
parentadc1ef1e37358d3c17d1a74a58b2e104fc0bda15 (diff)
parent1b3c393cd43f22ead8a6a2f839efc6df8ebd7465 (diff)
Merge branch 'linus' into perf/core
Conflicts: tools/perf/Makefile tools/perf/builtin-test.c tools/perf/perf.h tools/perf/tests/parse-events.c tools/perf/util/evsel.h Signed-off-by: Ingo Molnar <mingo@kernel.org>
Diffstat (limited to 'arch/arm/mach-dove/irq.c')
-rw-r--r--arch/arm/mach-dove/irq.c14
1 files changed, 13 insertions, 1 deletions
diff --git a/arch/arm/mach-dove/irq.c b/arch/arm/mach-dove/irq.c
index 087711524e8a..bc4344aa1009 100644
--- a/arch/arm/mach-dove/irq.c
+++ b/arch/arm/mach-dove/irq.c
@@ -46,8 +46,20 @@ static void pmu_irq_ack(struct irq_data *d)
46 int pin = irq_to_pmu(d->irq); 46 int pin = irq_to_pmu(d->irq);
47 u32 u; 47 u32 u;
48 48
49 /*
50 * The PMU mask register is not RW0C: it is RW. This means that
51 * the bits take whatever value is written to them; if you write
52 * a '1', you will set the interrupt.
53 *
54 * Unfortunately this means there is NO race free way to clear
55 * these interrupts.
56 *
57 * So, let's structure the code so that the window is as small as
58 * possible.
59 */
49 u = ~(1 << (pin & 31)); 60 u = ~(1 << (pin & 31));
50 writel(u, PMU_INTERRUPT_CAUSE); 61 u &= readl_relaxed(PMU_INTERRUPT_CAUSE);
62 writel_relaxed(u, PMU_INTERRUPT_CAUSE);
51} 63}
52 64
53static struct irq_chip pmu_irq_chip = { 65static struct irq_chip pmu_irq_chip = {