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authorKevin Hilman <khilman@deeprootsystems.com>2008-09-15 07:09:14 -0400
committerKevin Hilman <khilman@deeprootsystems.com>2008-09-17 03:31:30 -0400
commitac7643e4d36c63b190709777d9e03392a7d20477 (patch)
tree0cff0ecd0c224df2867670f64e41ba294bdfdcb4 /arch/arm/mach-davinci
parent45e9c0de2e86485f8b6633fd64ab19cfbff167f6 (diff)
ARM: DaVinci: Update IO address pointer typechecking
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
Diffstat (limited to 'arch/arm/mach-davinci')
-rw-r--r--arch/arm/mach-davinci/board-evm.c2
-rw-r--r--arch/arm/mach-davinci/include/mach/io.h43
2 files changed, 14 insertions, 31 deletions
diff --git a/arch/arm/mach-davinci/board-evm.c b/arch/arm/mach-davinci/board-evm.c
index 134355787814..2db7b7850fb5 100644
--- a/arch/arm/mach-davinci/board-evm.c
+++ b/arch/arm/mach-davinci/board-evm.c
@@ -124,7 +124,7 @@ static __init void davinci_evm_irq_init(void)
124MACHINE_START(DAVINCI_EVM, "DaVinci EVM") 124MACHINE_START(DAVINCI_EVM, "DaVinci EVM")
125 /* Maintainer: MontaVista Software <source@mvista.com> */ 125 /* Maintainer: MontaVista Software <source@mvista.com> */
126 .phys_io = IO_PHYS, 126 .phys_io = IO_PHYS,
127 .io_pg_offst = (io_p2v(IO_PHYS) >> 18) & 0xfffc, 127 .io_pg_offst = (__IO_ADDRESS(IO_PHYS) >> 18) & 0xfffc,
128 .boot_params = (DAVINCI_DDR_BASE + 0x100), 128 .boot_params = (DAVINCI_DDR_BASE + 0x100),
129 .map_io = davinci_evm_map_io, 129 .map_io = davinci_evm_map_io,
130 .init_irq = davinci_evm_irq_init, 130 .init_irq = davinci_evm_irq_init,
diff --git a/arch/arm/mach-davinci/include/mach/io.h b/arch/arm/mach-davinci/include/mach/io.h
index e7accb910864..b78ee9140496 100644
--- a/arch/arm/mach-davinci/include/mach/io.h
+++ b/arch/arm/mach-davinci/include/mach/io.h
@@ -22,9 +22,8 @@
22#define IO_OFFSET 0xfd000000 /* Virtual IO = 0xfec00000 */ 22#define IO_OFFSET 0xfd000000 /* Virtual IO = 0xfec00000 */
23#define IO_SIZE 0x00400000 23#define IO_SIZE 0x00400000
24#define IO_VIRT (IO_PHYS + IO_OFFSET) 24#define IO_VIRT (IO_PHYS + IO_OFFSET)
25#define io_p2v(pa) ((pa) + IO_OFFSET)
26#define io_v2p(va) ((va) - IO_OFFSET) 25#define io_v2p(va) ((va) - IO_OFFSET)
27#define IO_ADDRESS(x) io_p2v(x) 26#define __IO_ADDRESS(x) ((x) + IO_OFFSET)
28 27
29/* 28/*
30 * We don't actually have real ISA nor PCI buses, but there is so many 29 * We don't actually have real ISA nor PCI buses, but there is so many
@@ -35,7 +34,12 @@
35#define __mem_pci(a) (a) 34#define __mem_pci(a) (a)
36#define __mem_isa(a) (a) 35#define __mem_isa(a) (a)
37 36
38#ifndef __ASSEMBLER__ 37#define IO_ADDRESS(pa) IOMEM(__IO_ADDRESS(pa))
38
39#ifdef __ASSEMBLER__
40#define IOMEM(x) x
41#else
42#define IOMEM(x) ((void __force __iomem *)(x))
39 43
40/* 44/*
41 * Functions to access the DaVinci IO region 45 * Functions to access the DaVinci IO region
@@ -46,34 +50,13 @@
46 * - DO NOT use hardcoded virtual addresses to allow changing the 50 * - DO NOT use hardcoded virtual addresses to allow changing the
47 * IO address space again if needed 51 * IO address space again if needed
48 */ 52 */
49#define davinci_readb(a) (*(volatile unsigned char *)IO_ADDRESS(a)) 53#define davinci_readb(a) __raw_readb(IO_ADDRESS(a))
50#define davinci_readw(a) (*(volatile unsigned short *)IO_ADDRESS(a)) 54#define davinci_readw(a) __raw_readw(IO_ADDRESS(a))
51#define davinci_readl(a) (*(volatile unsigned int *)IO_ADDRESS(a)) 55#define davinci_readl(a) __raw_readl(IO_ADDRESS(a))
52
53#define davinci_writeb(v,a) (*(volatile unsigned char *)IO_ADDRESS(a) = (v))
54#define davinci_writew(v,a) (*(volatile unsigned short *)IO_ADDRESS(a) = (v))
55#define davinci_writel(v,a) (*(volatile unsigned int *)IO_ADDRESS(a) = (v))
56
57/* 16 bit uses LDRH/STRH, base +/- offset_8 */
58typedef struct { volatile u16 offset[256]; } __regbase16;
59#define __REGV16(vaddr) ((__regbase16 *)((vaddr)&~0xff)) \
60 ->offset[((vaddr)&0xff)>>1]
61#define __REG16(paddr) __REGV16(io_p2v(paddr))
62
63/* 8/32 bit uses LDR/STR, base +/- offset_12 */
64typedef struct { volatile u8 offset[4096]; } __regbase8;
65#define __REGV8(vaddr) ((__regbase8 *)((vaddr)&~4095)) \
66 ->offset[((vaddr)&4095)>>0]
67#define __REG8(paddr) __REGV8(io_p2v(paddr))
68
69typedef struct { volatile u32 offset[4096]; } __regbase32;
70#define __REGV32(vaddr) ((__regbase32 *)((vaddr)&~4095)) \
71 ->offset[((vaddr)&4095)>>2]
72
73#define __REG(paddr) __REGV32(io_p2v(paddr))
74#else
75 56
76#define __REG(x) (*((volatile unsigned long *)io_p2v(x))) 57#define davinci_writeb(v, a) __raw_writeb(v, IO_ADDRESS(a))
58#define davinci_writew(v, a) __raw_writew(v, IO_ADDRESS(a))
59#define davinci_writel(v, a) __raw_writel(v, IO_ADDRESS(a))
77 60
78#endif /* __ASSEMBLER__ */ 61#endif /* __ASSEMBLER__ */
79#endif /* __ASM_ARCH_IO_H */ 62#endif /* __ASM_ARCH_IO_H */