diff options
author | Takashi Iwai <tiwai@suse.de> | 2009-05-29 05:46:10 -0400 |
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committer | Takashi Iwai <tiwai@suse.de> | 2009-05-29 05:46:10 -0400 |
commit | e93721a70263afefbac781f575bfe851c6f95d84 (patch) | |
tree | ab359f12a0688802aa99339bae82c51763dae9f6 /arch/arm/mach-davinci/mux.c | |
parent | ae1ec5e1e97f67d41e641a73380129e5905e41cc (diff) | |
parent | c87d9732004b3f8fd82d729f12ccfb96c0df279e (diff) |
Merge branch 'fix/pcm-jiffies-check' into topic/pcm-jiffies-check
Diffstat (limited to 'arch/arm/mach-davinci/mux.c')
-rw-r--r-- | arch/arm/mach-davinci/mux.c | 100 |
1 files changed, 81 insertions, 19 deletions
diff --git a/arch/arm/mach-davinci/mux.c b/arch/arm/mach-davinci/mux.c index 8ff9d8aca60b..bbba0b247a44 100644 --- a/arch/arm/mach-davinci/mux.c +++ b/arch/arm/mach-davinci/mux.c | |||
@@ -1,41 +1,103 @@ | |||
1 | /* | 1 | /* |
2 | * DaVinci pin multiplexing configurations | 2 | * Utility to set the DAVINCI MUX register from a table in mux.h |
3 | * | 3 | * |
4 | * Author: Vladimir Barinov, MontaVista Software, Inc. <source@mvista.com> | 4 | * Author: Vladimir Barinov, MontaVista Software, Inc. <source@mvista.com> |
5 | * | 5 | * |
6 | * Based on linux/arch/arm/plat-omap/mux.c: | ||
7 | * Copyright (C) 2003 - 2005 Nokia Corporation | ||
8 | * | ||
9 | * Written by Tony Lindgren | ||
10 | * | ||
6 | * 2007 (c) MontaVista Software, Inc. This file is licensed under | 11 | * 2007 (c) MontaVista Software, Inc. This file is licensed under |
7 | * the terms of the GNU General Public License version 2. This program | 12 | * the terms of the GNU General Public License version 2. This program |
8 | * is licensed "as is" without any warranty of any kind, whether express | 13 | * is licensed "as is" without any warranty of any kind, whether express |
9 | * or implied. | 14 | * or implied. |
15 | * | ||
16 | * Copyright (C) 2008 Texas Instruments. | ||
10 | */ | 17 | */ |
11 | #include <linux/io.h> | 18 | #include <linux/io.h> |
19 | #include <linux/module.h> | ||
12 | #include <linux/spinlock.h> | 20 | #include <linux/spinlock.h> |
13 | 21 | ||
14 | #include <mach/hardware.h> | 22 | #include <mach/hardware.h> |
15 | |||
16 | #include <mach/mux.h> | 23 | #include <mach/mux.h> |
17 | 24 | ||
18 | /* System control register offsets */ | 25 | static const struct mux_config *mux_table; |
19 | #define PINMUX0 0x00 | 26 | static unsigned long pin_table_sz; |
20 | #define PINMUX1 0x04 | 27 | |
28 | int __init davinci_mux_register(const struct mux_config *pins, | ||
29 | unsigned long size) | ||
30 | { | ||
31 | mux_table = pins; | ||
32 | pin_table_sz = size; | ||
21 | 33 | ||
22 | static DEFINE_SPINLOCK(mux_lock); | 34 | return 0; |
35 | } | ||
23 | 36 | ||
24 | void davinci_mux_peripheral(unsigned int mux, unsigned int enable) | 37 | /* |
38 | * Sets the DAVINCI MUX register based on the table | ||
39 | */ | ||
40 | int __init_or_module davinci_cfg_reg(const unsigned long index) | ||
25 | { | 41 | { |
26 | u32 pinmux, muxreg = PINMUX0; | 42 | static DEFINE_SPINLOCK(mux_spin_lock); |
43 | void __iomem *base = IO_ADDRESS(DAVINCI_SYSTEM_MODULE_BASE); | ||
44 | unsigned long flags; | ||
45 | const struct mux_config *cfg; | ||
46 | unsigned int reg_orig = 0, reg = 0; | ||
47 | unsigned int mask, warn = 0; | ||
48 | |||
49 | if (!mux_table) | ||
50 | BUG(); | ||
51 | |||
52 | if (index >= pin_table_sz) { | ||
53 | printk(KERN_ERR "Invalid pin mux index: %lu (%lu)\n", | ||
54 | index, pin_table_sz); | ||
55 | dump_stack(); | ||
56 | return -ENODEV; | ||
57 | } | ||
58 | |||
59 | cfg = &mux_table[index]; | ||
60 | |||
61 | if (cfg->name == NULL) { | ||
62 | printk(KERN_ERR "No entry for the specified index\n"); | ||
63 | return -ENODEV; | ||
64 | } | ||
65 | |||
66 | /* Update the mux register in question */ | ||
67 | if (cfg->mask) { | ||
68 | unsigned tmp1, tmp2; | ||
69 | |||
70 | spin_lock_irqsave(&mux_spin_lock, flags); | ||
71 | reg_orig = __raw_readl(base + cfg->mux_reg); | ||
72 | |||
73 | mask = (cfg->mask << cfg->mask_offset); | ||
74 | tmp1 = reg_orig & mask; | ||
75 | reg = reg_orig & ~mask; | ||
76 | |||
77 | tmp2 = (cfg->mode << cfg->mask_offset); | ||
78 | reg |= tmp2; | ||
79 | |||
80 | if (tmp1 != tmp2) | ||
81 | warn = 1; | ||
82 | |||
83 | __raw_writel(reg, base + cfg->mux_reg); | ||
84 | spin_unlock_irqrestore(&mux_spin_lock, flags); | ||
85 | } | ||
86 | |||
87 | if (warn) { | ||
88 | #ifdef CONFIG_DAVINCI_MUX_WARNINGS | ||
89 | printk(KERN_WARNING "MUX: initialized %s\n", cfg->name); | ||
90 | #endif | ||
91 | } | ||
27 | 92 | ||
28 | if (mux >= DAVINCI_MUX_LEVEL2) { | 93 | #ifdef CONFIG_DAVINCI_MUX_DEBUG |
29 | muxreg = PINMUX1; | 94 | if (cfg->debug || warn) { |
30 | mux -= DAVINCI_MUX_LEVEL2; | 95 | printk(KERN_WARNING "MUX: Setting register %s\n", cfg->name); |
96 | printk(KERN_WARNING " %s (0x%08x) = 0x%08x -> 0x%08x\n", | ||
97 | cfg->mux_reg_name, cfg->mux_reg, reg_orig, reg); | ||
31 | } | 98 | } |
99 | #endif | ||
32 | 100 | ||
33 | spin_lock(&mux_lock); | 101 | return 0; |
34 | pinmux = davinci_readl(DAVINCI_SYSTEM_MODULE_BASE + muxreg); | ||
35 | if (enable) | ||
36 | pinmux |= (1 << mux); | ||
37 | else | ||
38 | pinmux &= ~(1 << mux); | ||
39 | davinci_writel(pinmux, DAVINCI_SYSTEM_MODULE_BASE + muxreg); | ||
40 | spin_unlock(&mux_lock); | ||
41 | } | 102 | } |
103 | EXPORT_SYMBOL(davinci_cfg_reg); | ||