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authorMurali Karicheri <m-karicheri2@ti.com>2012-04-04 10:38:37 -0400
committerSekhar Nori <nsekhar@ti.com>2012-04-18 16:12:28 -0400
commit4a6e6a5eb3f8309273b389ca74538f65af203f6c (patch)
treeec13041f56b8cfad75daec6e08f667dfcf70a6a2 /arch/arm/mach-davinci/include/mach
parent0034102808e0dbbf3a2394b82b1bb40b5778de9e (diff)
ARM: davinci: fix incorrect pdctl next bit position
The PDCTL NEXT bit is incorrectly set to bit 1 instead of bit 0. This patch fixes this issue Signed-off-by: Murali Karicheri <m-karicheri2@ti.com> Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Diffstat (limited to 'arch/arm/mach-davinci/include/mach')
-rw-r--r--arch/arm/mach-davinci/include/mach/psc.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/mach-davinci/include/mach/psc.h b/arch/arm/mach-davinci/include/mach/psc.h
index 8bc3fc256171..405318e35bf6 100644
--- a/arch/arm/mach-davinci/include/mach/psc.h
+++ b/arch/arm/mach-davinci/include/mach/psc.h
@@ -246,7 +246,7 @@
246#define MDSTAT_STATE_MASK 0x3f 246#define MDSTAT_STATE_MASK 0x3f
247#define PDSTAT_STATE_MASK 0x1f 247#define PDSTAT_STATE_MASK 0x1f
248#define MDCTL_FORCE BIT(31) 248#define MDCTL_FORCE BIT(31)
249#define PDCTL_NEXT BIT(1) 249#define PDCTL_NEXT BIT(0)
250#define PDCTL_EPCGOOD BIT(8) 250#define PDCTL_EPCGOOD BIT(8)
251 251
252#ifndef __ASSEMBLER__ 252#ifndef __ASSEMBLER__