davinci: Adding DM365 SOC Support

The patch adds base support for new TI SOC DM365, which s
similar to the dm355.

Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>

1 files changed, 81 insertions, 0 deletions

diff --git a/arch/arm/mach-davinci/include/mach/mux.h b/arch/arm/mach-davinci/include/mach/mux.h
index 27378458542f..c182bd458d73 100644
--- a/arch/arm/mach-davinci/include/mach/mux.h
+++ b/arch/arm/mach-davinci/include/mach/mux.h
@@ -156,6 +156,87 @@ enum davinci_dm355_index {
         DM355_EVT26_MMC0_RX,
 };
 
+enum davinci_dm365_index {
+        /* MMC/SD 0 */
+        DM365_MMCSD0,
+
+        /* MMC/SD 1 */
+        DM365_SD1_CLK,
+        DM365_SD1_CMD,
+        DM365_SD1_DATA3,
+        DM365_SD1_DATA2,
+        DM365_SD1_DATA1,
+        DM365_SD1_DATA0,
+
+        /* I2C */
+        DM365_I2C_SDA,
+        DM365_I2C_SCL,
+
+        /* AEMIF */
+        DM365_AEMIF_AR,
+        DM365_AEMIF_A3,
+        DM365_AEMIF_A7,
+        DM365_AEMIF_D15_8,
+        DM365_AEMIF_CE0,
+
+        /* ASP0 function */
+        DM365_MCBSP0_BDX,
+        DM365_MCBSP0_X,
+        DM365_MCBSP0_BFSX,
+        DM365_MCBSP0_BDR,
+        DM365_MCBSP0_R,
+        DM365_MCBSP0_BFSR,
+
+        /* SPI0 */
+        DM365_SPI0_SCLK,
+        DM365_SPI0_SDI,
+        DM365_SPI0_SDO,
+        DM365_SPI0_SDENA0,
+        DM365_SPI0_SDENA1,
+
+        /* UART */
+        DM365_UART0_RXD,
+        DM365_UART0_TXD,
+        DM365_UART1_RXD,
+        DM365_UART1_TXD,
+        DM365_UART1_RTS,
+        DM365_UART1_CTS,
+
+        /* EMAC */
+        DM365_EMAC_TX_EN,
+        DM365_EMAC_TX_CLK,
+        DM365_EMAC_COL,
+        DM365_EMAC_TXD3,
+        DM365_EMAC_TXD2,
+        DM365_EMAC_TXD1,
+        DM365_EMAC_TXD0,
+        DM365_EMAC_RXD3,
+        DM365_EMAC_RXD2,
+        DM365_EMAC_RXD1,
+        DM365_EMAC_RXD0,
+        DM365_EMAC_RX_CLK,
+        DM365_EMAC_RX_DV,
+        DM365_EMAC_RX_ER,
+        DM365_EMAC_CRS,
+        DM365_EMAC_MDIO,
+        DM365_EMAC_MDCLK,
+
+        /* IRQ muxing */
+        DM365_INT_EDMA_CC,
+        DM365_INT_EDMA_TC0_ERR,
+        DM365_INT_EDMA_TC1_ERR,
+        DM365_INT_PRTCSS,
+        DM365_INT_EMAC_RXTHRESH,
+        DM365_INT_EMAC_RXPULSE,
+        DM365_INT_EMAC_TXPULSE,
+        DM365_INT_EMAC_MISCPULSE,
+
+        /* EDMA event muxing */
+        DM365_EVT2_ASP_TX,
+        DM365_EVT3_ASP_RX,
+        DM365_EVT26_MMC0_RX,
+};
+
 #ifdef CONFIG_DAVINCI_MUX
 /* setup pin muxing */
 extern int davinci_cfg_reg(unsigned long reg_cfg);