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authorSekhar Nori <nsekhar@ti.com>2011-07-06 02:01:23 -0400
committerSekhar Nori <nsekhar@ti.com>2011-07-08 01:43:08 -0400
commitcbb2c9617ae80c99a7b290dbe5cf48ebf9a36ad9 (patch)
treece7c6593adeac4044b5875a04d0ccae648791a6b /arch/arm/mach-davinci/include/mach/da8xx.h
parentaad70de20fc69970a3080e7e8f02b54a4a3fe3e6 (diff)
davinci: da850: add support for SATA interface
Add support for SATA controller on the DA850/OMAP-L138/AM18x devices. The patch adds the necessary clocks, platform resources and a routine to initialize the SATA controller. The PHY configuration in this patch is courtesy the work done by Zegeye Alemu, Swaminathan and Mansoor Ahamed from TI. While testing this patch, enable port multiplier support iff you are actually using one. The reasons of this behaviour are discussed here: http://patchwork.ozlabs.org/patch/78163/ ChangeLog: v3: Removed fields which were being initialized to zero in PHY configuration. Moved SATA base address definition to the top of the file to make it inline with what is done for the rest of the modules. v2: Addressed comments from Sergei. Removed unnecessary braces and removed unnecessary else after goto. Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Diffstat (limited to 'arch/arm/mach-davinci/include/mach/da8xx.h')
-rw-r--r--arch/arm/mach-davinci/include/mach/da8xx.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/arm/mach-davinci/include/mach/da8xx.h b/arch/arm/mach-davinci/include/mach/da8xx.h
index ad64da713fc8..eaca7d8b9d68 100644
--- a/arch/arm/mach-davinci/include/mach/da8xx.h
+++ b/arch/arm/mach-davinci/include/mach/da8xx.h
@@ -57,6 +57,7 @@ extern unsigned int da850_max_speed;
57#define DA8XX_SYSCFG1_BASE (IO_PHYS + 0x22C000) 57#define DA8XX_SYSCFG1_BASE (IO_PHYS + 0x22C000)
58#define DA8XX_SYSCFG1_VIRT(x) (da8xx_syscfg1_base + (x)) 58#define DA8XX_SYSCFG1_VIRT(x) (da8xx_syscfg1_base + (x))
59#define DA8XX_DEEPSLEEP_REG 0x8 59#define DA8XX_DEEPSLEEP_REG 0x8
60#define DA8XX_PWRDN_REG 0x18
60 61
61#define DA8XX_PSC0_BASE 0x01c10000 62#define DA8XX_PSC0_BASE 0x01c10000
62#define DA8XX_PLL0_BASE 0x01c11000 63#define DA8XX_PLL0_BASE 0x01c11000
@@ -89,6 +90,7 @@ int da850_register_cpufreq(char *async_clk);
89int da8xx_register_cpuidle(void); 90int da8xx_register_cpuidle(void);
90void __iomem * __init da8xx_get_mem_ctlr(void); 91void __iomem * __init da8xx_get_mem_ctlr(void);
91int da850_register_pm(struct platform_device *pdev); 92int da850_register_pm(struct platform_device *pdev);
93int __init da850_register_sata(unsigned long refclkpn);
92 94
93extern struct platform_device da8xx_serial_device; 95extern struct platform_device da8xx_serial_device;
94extern struct emac_platform_data da8xx_emac_pdata; 96extern struct emac_platform_data da8xx_emac_pdata;