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authorLinus Walleij <linus.walleij@linaro.org>2012-11-11 13:12:33 -0500
committerLinus Walleij <linus.walleij@linaro.org>2012-11-11 13:12:33 -0500
commite59d969f441fb8e25b30125bdf201153adc5a7e3 (patch)
treee18250fbc1bc9e2ca864292d2390325f8ac84c80 /arch/arm/mach-at91
parent4ddb1c295752252f61670e35c791bf16e58bbce6 (diff)
parentf6f94f6660dbe34039e5c86a46c7845589e7ee0c (diff)
Merge branch 'at91' into devel
Diffstat (limited to 'arch/arm/mach-at91')
-rw-r--r--arch/arm/mach-at91/at91rm9200.c4
-rw-r--r--arch/arm/mach-at91/at91sam9260.c7
-rw-r--r--arch/arm/mach-at91/at91sam9261.c4
-rw-r--r--arch/arm/mach-at91/at91sam9263.c9
-rw-r--r--arch/arm/mach-at91/at91sam9g45.c10
-rw-r--r--arch/arm/mach-at91/at91sam9n12.c15
-rw-r--r--arch/arm/mach-at91/at91sam9rl.c4
-rw-r--r--arch/arm/mach-at91/at91sam9x5.c19
-rw-r--r--arch/arm/mach-at91/board-dt.c2
-rw-r--r--arch/arm/mach-at91/gpio.c190
-rw-r--r--arch/arm/mach-at91/setup.c6
-rw-r--r--arch/arm/mach-at91/soc.h12
12 files changed, 83 insertions, 199 deletions
diff --git a/arch/arm/mach-at91/at91rm9200.c b/arch/arm/mach-at91/at91rm9200.c
index 5269825194a8..a3e4710d7352 100644
--- a/arch/arm/mach-at91/at91rm9200.c
+++ b/arch/arm/mach-at91/at91rm9200.c
@@ -361,10 +361,10 @@ static unsigned int at91rm9200_default_irq_priority[NR_AIC_IRQS] __initdata = {
361 0 /* Advanced Interrupt Controller (IRQ6) */ 361 0 /* Advanced Interrupt Controller (IRQ6) */
362}; 362};
363 363
364struct at91_init_soc __initdata at91rm9200_soc = { 364AT91_SOC_START(rm9200)
365 .map_io = at91rm9200_map_io, 365 .map_io = at91rm9200_map_io,
366 .default_irq_priority = at91rm9200_default_irq_priority, 366 .default_irq_priority = at91rm9200_default_irq_priority,
367 .ioremap_registers = at91rm9200_ioremap_registers, 367 .ioremap_registers = at91rm9200_ioremap_registers,
368 .register_clocks = at91rm9200_register_clocks, 368 .register_clocks = at91rm9200_register_clocks,
369 .init = at91rm9200_initialize, 369 .init = at91rm9200_initialize,
370}; 370AT91_SOC_END
diff --git a/arch/arm/mach-at91/at91sam9260.c b/arch/arm/mach-at91/at91sam9260.c
index f8202615f4a8..7aaa62cef4ac 100644
--- a/arch/arm/mach-at91/at91sam9260.c
+++ b/arch/arm/mach-at91/at91sam9260.c
@@ -235,6 +235,9 @@ static struct clk_lookup periph_clocks_lookups[] = {
235 CLKDEV_CON_ID("pioA", &pioA_clk), 235 CLKDEV_CON_ID("pioA", &pioA_clk),
236 CLKDEV_CON_ID("pioB", &pioB_clk), 236 CLKDEV_CON_ID("pioB", &pioB_clk),
237 CLKDEV_CON_ID("pioC", &pioC_clk), 237 CLKDEV_CON_ID("pioC", &pioC_clk),
238 CLKDEV_CON_DEV_ID(NULL, "fffff400.gpio", &pioA_clk),
239 CLKDEV_CON_DEV_ID(NULL, "fffff600.gpio", &pioB_clk),
240 CLKDEV_CON_DEV_ID(NULL, "fffff800.gpio", &pioC_clk),
238}; 241};
239 242
240static struct clk_lookup usart_clocks_lookups[] = { 243static struct clk_lookup usart_clocks_lookups[] = {
@@ -390,10 +393,10 @@ static unsigned int at91sam9260_default_irq_priority[NR_AIC_IRQS] __initdata = {
390 0, /* Advanced Interrupt Controller */ 393 0, /* Advanced Interrupt Controller */
391}; 394};
392 395
393struct at91_init_soc __initdata at91sam9260_soc = { 396AT91_SOC_START(sam9260)
394 .map_io = at91sam9260_map_io, 397 .map_io = at91sam9260_map_io,
395 .default_irq_priority = at91sam9260_default_irq_priority, 398 .default_irq_priority = at91sam9260_default_irq_priority,
396 .ioremap_registers = at91sam9260_ioremap_registers, 399 .ioremap_registers = at91sam9260_ioremap_registers,
397 .register_clocks = at91sam9260_register_clocks, 400 .register_clocks = at91sam9260_register_clocks,
398 .init = at91sam9260_initialize, 401 .init = at91sam9260_initialize,
399}; 402AT91_SOC_END
diff --git a/arch/arm/mach-at91/at91sam9261.c b/arch/arm/mach-at91/at91sam9261.c
index 04295c04b3e0..4d262f346fd9 100644
--- a/arch/arm/mach-at91/at91sam9261.c
+++ b/arch/arm/mach-at91/at91sam9261.c
@@ -334,10 +334,10 @@ static unsigned int at91sam9261_default_irq_priority[NR_AIC_IRQS] __initdata = {
334 0, /* Advanced Interrupt Controller */ 334 0, /* Advanced Interrupt Controller */
335}; 335};
336 336
337struct at91_init_soc __initdata at91sam9261_soc = { 337AT91_SOC_START(sam9261)
338 .map_io = at91sam9261_map_io, 338 .map_io = at91sam9261_map_io,
339 .default_irq_priority = at91sam9261_default_irq_priority, 339 .default_irq_priority = at91sam9261_default_irq_priority,
340 .ioremap_registers = at91sam9261_ioremap_registers, 340 .ioremap_registers = at91sam9261_ioremap_registers,
341 .register_clocks = at91sam9261_register_clocks, 341 .register_clocks = at91sam9261_register_clocks,
342 .init = at91sam9261_initialize, 342 .init = at91sam9261_initialize,
343}; 343AT91_SOC_END
diff --git a/arch/arm/mach-at91/at91sam9263.c b/arch/arm/mach-at91/at91sam9263.c
index d6f9c23927c4..448fce1ada15 100644
--- a/arch/arm/mach-at91/at91sam9263.c
+++ b/arch/arm/mach-at91/at91sam9263.c
@@ -212,6 +212,11 @@ static struct clk_lookup periph_clocks_lookups[] = {
212 CLKDEV_CON_DEV_ID("spi_clk", "fffa4000.spi", &spi0_clk), 212 CLKDEV_CON_DEV_ID("spi_clk", "fffa4000.spi", &spi0_clk),
213 CLKDEV_CON_DEV_ID("spi_clk", "fffa8000.spi", &spi1_clk), 213 CLKDEV_CON_DEV_ID("spi_clk", "fffa8000.spi", &spi1_clk),
214 CLKDEV_CON_DEV_ID(NULL, "fff88000.i2c", &twi_clk), 214 CLKDEV_CON_DEV_ID(NULL, "fff88000.i2c", &twi_clk),
215 CLKDEV_CON_DEV_ID(NULL, "fffff200.gpio", &pioA_clk),
216 CLKDEV_CON_DEV_ID(NULL, "fffff400.gpio", &pioB_clk),
217 CLKDEV_CON_DEV_ID(NULL, "fffff600.gpio", &pioCDE_clk),
218 CLKDEV_CON_DEV_ID(NULL, "fffff800.gpio", &pioCDE_clk),
219 CLKDEV_CON_DEV_ID(NULL, "fffffa00.gpio", &pioCDE_clk),
215}; 220};
216 221
217static struct clk_lookup usart_clocks_lookups[] = { 222static struct clk_lookup usart_clocks_lookups[] = {
@@ -365,10 +370,10 @@ static unsigned int at91sam9263_default_irq_priority[NR_AIC_IRQS] __initdata = {
365 0, /* Advanced Interrupt Controller (IRQ1) */ 370 0, /* Advanced Interrupt Controller (IRQ1) */
366}; 371};
367 372
368struct at91_init_soc __initdata at91sam9263_soc = { 373AT91_SOC_START(sam9263)
369 .map_io = at91sam9263_map_io, 374 .map_io = at91sam9263_map_io,
370 .default_irq_priority = at91sam9263_default_irq_priority, 375 .default_irq_priority = at91sam9263_default_irq_priority,
371 .ioremap_registers = at91sam9263_ioremap_registers, 376 .ioremap_registers = at91sam9263_ioremap_registers,
372 .register_clocks = at91sam9263_register_clocks, 377 .register_clocks = at91sam9263_register_clocks,
373 .init = at91sam9263_initialize, 378 .init = at91sam9263_initialize,
374}; 379AT91_SOC_END
diff --git a/arch/arm/mach-at91/at91sam9g45.c b/arch/arm/mach-at91/at91sam9g45.c
index 84af1b506d92..e6dd371d9f56 100644
--- a/arch/arm/mach-at91/at91sam9g45.c
+++ b/arch/arm/mach-at91/at91sam9g45.c
@@ -260,6 +260,12 @@ static struct clk_lookup periph_clocks_lookups[] = {
260 CLKDEV_CON_DEV_ID(NULL, "fff88000.i2c", &twi1_clk), 260 CLKDEV_CON_DEV_ID(NULL, "fff88000.i2c", &twi1_clk),
261 /* fake hclk clock */ 261 /* fake hclk clock */
262 CLKDEV_CON_DEV_ID("hclk", "at91_ohci", &uhphs_clk), 262 CLKDEV_CON_DEV_ID("hclk", "at91_ohci", &uhphs_clk),
263 CLKDEV_CON_DEV_ID(NULL, "fffff200.gpio", &pioA_clk),
264 CLKDEV_CON_DEV_ID(NULL, "fffff400.gpio", &pioB_clk),
265 CLKDEV_CON_DEV_ID(NULL, "fffff600.gpio", &pioC_clk),
266 CLKDEV_CON_DEV_ID(NULL, "fffff800.gpio", &pioDE_clk),
267 CLKDEV_CON_DEV_ID(NULL, "fffffa00.gpio", &pioDE_clk),
268
263 CLKDEV_CON_ID("pioA", &pioA_clk), 269 CLKDEV_CON_ID("pioA", &pioA_clk),
264 CLKDEV_CON_ID("pioB", &pioB_clk), 270 CLKDEV_CON_ID("pioB", &pioB_clk),
265 CLKDEV_CON_ID("pioC", &pioC_clk), 271 CLKDEV_CON_ID("pioC", &pioC_clk),
@@ -409,10 +415,10 @@ static unsigned int at91sam9g45_default_irq_priority[NR_AIC_IRQS] __initdata = {
409 0, /* Advanced Interrupt Controller (IRQ0) */ 415 0, /* Advanced Interrupt Controller (IRQ0) */
410}; 416};
411 417
412struct at91_init_soc __initdata at91sam9g45_soc = { 418AT91_SOC_START(sam9g45)
413 .map_io = at91sam9g45_map_io, 419 .map_io = at91sam9g45_map_io,
414 .default_irq_priority = at91sam9g45_default_irq_priority, 420 .default_irq_priority = at91sam9g45_default_irq_priority,
415 .ioremap_registers = at91sam9g45_ioremap_registers, 421 .ioremap_registers = at91sam9g45_ioremap_registers,
416 .register_clocks = at91sam9g45_register_clocks, 422 .register_clocks = at91sam9g45_register_clocks,
417 .init = at91sam9g45_initialize, 423 .init = at91sam9g45_initialize,
418}; 424AT91_SOC_END
diff --git a/arch/arm/mach-at91/at91sam9n12.c b/arch/arm/mach-at91/at91sam9n12.c
index 732d3d3f4ec5..bf8a083a02ab 100644
--- a/arch/arm/mach-at91/at91sam9n12.c
+++ b/arch/arm/mach-at91/at91sam9n12.c
@@ -171,10 +171,10 @@ static struct clk_lookup periph_clocks_lookups[] = {
171 CLKDEV_CON_DEV_ID("dma_clk", "ffffec00.dma-controller", &dma_clk), 171 CLKDEV_CON_DEV_ID("dma_clk", "ffffec00.dma-controller", &dma_clk),
172 CLKDEV_CON_DEV_ID(NULL, "f8010000.i2c", &twi0_clk), 172 CLKDEV_CON_DEV_ID(NULL, "f8010000.i2c", &twi0_clk),
173 CLKDEV_CON_DEV_ID(NULL, "f8014000.i2c", &twi1_clk), 173 CLKDEV_CON_DEV_ID(NULL, "f8014000.i2c", &twi1_clk),
174 CLKDEV_CON_ID("pioA", &pioAB_clk), 174 CLKDEV_CON_DEV_ID(NULL, "fffff400.gpio", &pioAB_clk),
175 CLKDEV_CON_ID("pioB", &pioAB_clk), 175 CLKDEV_CON_DEV_ID(NULL, "fffff600.gpio", &pioAB_clk),
176 CLKDEV_CON_ID("pioC", &pioCD_clk), 176 CLKDEV_CON_DEV_ID(NULL, "fffff800.gpio", &pioCD_clk),
177 CLKDEV_CON_ID("pioD", &pioCD_clk), 177 CLKDEV_CON_DEV_ID(NULL, "fffffa00.gpio", &pioCD_clk),
178 /* additional fake clock for macb_hclk */ 178 /* additional fake clock for macb_hclk */
179 CLKDEV_CON_DEV_ID("hclk", "500000.ohci", &uhp_clk), 179 CLKDEV_CON_DEV_ID("hclk", "500000.ohci", &uhp_clk),
180 CLKDEV_CON_DEV_ID("ohci_clk", "500000.ohci", &uhp_clk), 180 CLKDEV_CON_DEV_ID("ohci_clk", "500000.ohci", &uhp_clk),
@@ -223,13 +223,10 @@ static void __init at91sam9n12_map_io(void)
223void __init at91sam9n12_initialize(void) 223void __init at91sam9n12_initialize(void)
224{ 224{
225 at91_extern_irq = (1 << AT91SAM9N12_ID_IRQ0); 225 at91_extern_irq = (1 << AT91SAM9N12_ID_IRQ0);
226
227 /* Register GPIO subsystem (using DT) */
228 at91_gpio_init(NULL, 0);
229} 226}
230 227
231struct at91_init_soc __initdata at91sam9n12_soc = { 228AT91_SOC_START(sam9n12)
232 .map_io = at91sam9n12_map_io, 229 .map_io = at91sam9n12_map_io,
233 .register_clocks = at91sam9n12_register_clocks, 230 .register_clocks = at91sam9n12_register_clocks,
234 .init = at91sam9n12_initialize, 231 .init = at91sam9n12_initialize,
235}; 232AT91_SOC_END
diff --git a/arch/arm/mach-at91/at91sam9rl.c b/arch/arm/mach-at91/at91sam9rl.c
index 72e908412222..cbe72e44c13f 100644
--- a/arch/arm/mach-at91/at91sam9rl.c
+++ b/arch/arm/mach-at91/at91sam9rl.c
@@ -338,10 +338,10 @@ static unsigned int at91sam9rl_default_irq_priority[NR_AIC_IRQS] __initdata = {
338 0, /* Advanced Interrupt Controller */ 338 0, /* Advanced Interrupt Controller */
339}; 339};
340 340
341struct at91_init_soc __initdata at91sam9rl_soc = { 341AT91_SOC_START(sam9rl)
342 .map_io = at91sam9rl_map_io, 342 .map_io = at91sam9rl_map_io,
343 .default_irq_priority = at91sam9rl_default_irq_priority, 343 .default_irq_priority = at91sam9rl_default_irq_priority,
344 .ioremap_registers = at91sam9rl_ioremap_registers, 344 .ioremap_registers = at91sam9rl_ioremap_registers,
345 .register_clocks = at91sam9rl_register_clocks, 345 .register_clocks = at91sam9rl_register_clocks,
346 .init = at91sam9rl_initialize, 346 .init = at91sam9rl_initialize,
347}; 347AT91_SOC_END
diff --git a/arch/arm/mach-at91/at91sam9x5.c b/arch/arm/mach-at91/at91sam9x5.c
index e5035380dcbc..56d13a4950a7 100644
--- a/arch/arm/mach-at91/at91sam9x5.c
+++ b/arch/arm/mach-at91/at91sam9x5.c
@@ -234,10 +234,10 @@ static struct clk_lookup periph_clocks_lookups[] = {
234 CLKDEV_CON_DEV_ID(NULL, "f8010000.i2c", &twi0_clk), 234 CLKDEV_CON_DEV_ID(NULL, "f8010000.i2c", &twi0_clk),
235 CLKDEV_CON_DEV_ID(NULL, "f8014000.i2c", &twi1_clk), 235 CLKDEV_CON_DEV_ID(NULL, "f8014000.i2c", &twi1_clk),
236 CLKDEV_CON_DEV_ID(NULL, "f8018000.i2c", &twi2_clk), 236 CLKDEV_CON_DEV_ID(NULL, "f8018000.i2c", &twi2_clk),
237 CLKDEV_CON_ID("pioA", &pioAB_clk), 237 CLKDEV_CON_DEV_ID(NULL, "fffff400.gpio", &pioAB_clk),
238 CLKDEV_CON_ID("pioB", &pioAB_clk), 238 CLKDEV_CON_DEV_ID(NULL, "fffff600.gpio", &pioAB_clk),
239 CLKDEV_CON_ID("pioC", &pioCD_clk), 239 CLKDEV_CON_DEV_ID(NULL, "fffff800.gpio", &pioCD_clk),
240 CLKDEV_CON_ID("pioD", &pioCD_clk), 240 CLKDEV_CON_DEV_ID(NULL, "fffffa00.gpio", &pioCD_clk),
241 /* additional fake clock for macb_hclk */ 241 /* additional fake clock for macb_hclk */
242 CLKDEV_CON_DEV_ID("hclk", "f802c000.ethernet", &macb0_clk), 242 CLKDEV_CON_DEV_ID("hclk", "f802c000.ethernet", &macb0_clk),
243 CLKDEV_CON_DEV_ID("hclk", "f8030000.ethernet", &macb1_clk), 243 CLKDEV_CON_DEV_ID("hclk", "f8030000.ethernet", &macb1_clk),
@@ -313,18 +313,11 @@ static void __init at91sam9x5_map_io(void)
313 at91_init_sram(0, AT91SAM9X5_SRAM_BASE, AT91SAM9X5_SRAM_SIZE); 313 at91_init_sram(0, AT91SAM9X5_SRAM_BASE, AT91SAM9X5_SRAM_SIZE);
314} 314}
315 315
316void __init at91sam9x5_initialize(void)
317{
318 /* Register GPIO subsystem (using DT) */
319 at91_gpio_init(NULL, 0);
320}
321
322/* -------------------------------------------------------------------- 316/* --------------------------------------------------------------------
323 * Interrupt initialization 317 * Interrupt initialization
324 * -------------------------------------------------------------------- */ 318 * -------------------------------------------------------------------- */
325 319
326struct at91_init_soc __initdata at91sam9x5_soc = { 320AT91_SOC_START(sam9x5)
327 .map_io = at91sam9x5_map_io, 321 .map_io = at91sam9x5_map_io,
328 .register_clocks = at91sam9x5_register_clocks, 322 .register_clocks = at91sam9x5_register_clocks,
329 .init = at91sam9x5_initialize, 323AT91_SOC_END
330};
diff --git a/arch/arm/mach-at91/board-dt.c b/arch/arm/mach-at91/board-dt.c
index e8f45c4e0ea8..3b6a94820fa0 100644
--- a/arch/arm/mach-at91/board-dt.c
+++ b/arch/arm/mach-at91/board-dt.c
@@ -30,8 +30,6 @@
30static const struct of_device_id irq_of_match[] __initconst = { 30static const struct of_device_id irq_of_match[] __initconst = {
31 31
32 { .compatible = "atmel,at91rm9200-aic", .data = at91_aic_of_init }, 32 { .compatible = "atmel,at91rm9200-aic", .data = at91_aic_of_init },
33 { .compatible = "atmel,at91rm9200-gpio", .data = at91_gpio_of_irq_setup },
34 { .compatible = "atmel,at91sam9x5-gpio", .data = at91_gpio_of_irq_setup },
35 { /*sentinel*/ } 33 { /*sentinel*/ }
36}; 34};
37 35
diff --git a/arch/arm/mach-at91/gpio.c b/arch/arm/mach-at91/gpio.c
index be42cf0e74bd..c5d7e1e9d757 100644
--- a/arch/arm/mach-at91/gpio.c
+++ b/arch/arm/mach-at91/gpio.c
@@ -23,8 +23,6 @@
23#include <linux/io.h> 23#include <linux/io.h>
24#include <linux/irqdomain.h> 24#include <linux/irqdomain.h>
25#include <linux/of_address.h> 25#include <linux/of_address.h>
26#include <linux/of_irq.h>
27#include <linux/of_gpio.h>
28 26
29#include <asm/mach/irq.h> 27#include <asm/mach/irq.h>
30 28
@@ -33,6 +31,8 @@
33 31
34#include "generic.h" 32#include "generic.h"
35 33
34#define MAX_NB_GPIO_PER_BANK 32
35
36struct at91_gpio_chip { 36struct at91_gpio_chip {
37 struct gpio_chip chip; 37 struct gpio_chip chip;
38 struct at91_gpio_chip *next; /* Bank sharing same clock */ 38 struct at91_gpio_chip *next; /* Bank sharing same clock */
@@ -46,6 +46,7 @@ struct at91_gpio_chip {
46 46
47#define to_at91_gpio_chip(c) container_of(c, struct at91_gpio_chip, chip) 47#define to_at91_gpio_chip(c) container_of(c, struct at91_gpio_chip, chip)
48 48
49static int at91_gpiolib_request(struct gpio_chip *chip, unsigned offset);
49static void at91_gpiolib_dbg_show(struct seq_file *s, struct gpio_chip *chip); 50static void at91_gpiolib_dbg_show(struct seq_file *s, struct gpio_chip *chip);
50static void at91_gpiolib_set(struct gpio_chip *chip, unsigned offset, int val); 51static void at91_gpiolib_set(struct gpio_chip *chip, unsigned offset, int val);
51static int at91_gpiolib_get(struct gpio_chip *chip, unsigned offset); 52static int at91_gpiolib_get(struct gpio_chip *chip, unsigned offset);
@@ -55,26 +56,27 @@ static int at91_gpiolib_direction_input(struct gpio_chip *chip,
55 unsigned offset); 56 unsigned offset);
56static int at91_gpiolib_to_irq(struct gpio_chip *chip, unsigned offset); 57static int at91_gpiolib_to_irq(struct gpio_chip *chip, unsigned offset);
57 58
58#define AT91_GPIO_CHIP(name, nr_gpio) \ 59#define AT91_GPIO_CHIP(name) \
59 { \ 60 { \
60 .chip = { \ 61 .chip = { \
61 .label = name, \ 62 .label = name, \
63 .request = at91_gpiolib_request, \
62 .direction_input = at91_gpiolib_direction_input, \ 64 .direction_input = at91_gpiolib_direction_input, \
63 .direction_output = at91_gpiolib_direction_output, \ 65 .direction_output = at91_gpiolib_direction_output, \
64 .get = at91_gpiolib_get, \ 66 .get = at91_gpiolib_get, \
65 .set = at91_gpiolib_set, \ 67 .set = at91_gpiolib_set, \
66 .dbg_show = at91_gpiolib_dbg_show, \ 68 .dbg_show = at91_gpiolib_dbg_show, \
67 .to_irq = at91_gpiolib_to_irq, \ 69 .to_irq = at91_gpiolib_to_irq, \
68 .ngpio = nr_gpio, \ 70 .ngpio = MAX_NB_GPIO_PER_BANK, \
69 }, \ 71 }, \
70 } 72 }
71 73
72static struct at91_gpio_chip gpio_chip[] = { 74static struct at91_gpio_chip gpio_chip[] = {
73 AT91_GPIO_CHIP("pioA", 32), 75 AT91_GPIO_CHIP("pioA"),
74 AT91_GPIO_CHIP("pioB", 32), 76 AT91_GPIO_CHIP("pioB"),
75 AT91_GPIO_CHIP("pioC", 32), 77 AT91_GPIO_CHIP("pioC"),
76 AT91_GPIO_CHIP("pioD", 32), 78 AT91_GPIO_CHIP("pioD"),
77 AT91_GPIO_CHIP("pioE", 32), 79 AT91_GPIO_CHIP("pioE"),
78}; 80};
79 81
80static int gpio_banks; 82static int gpio_banks;
@@ -89,7 +91,7 @@ static unsigned long at91_gpio_caps;
89 91
90static inline void __iomem *pin_to_controller(unsigned pin) 92static inline void __iomem *pin_to_controller(unsigned pin)
91{ 93{
92 pin /= 32; 94 pin /= MAX_NB_GPIO_PER_BANK;
93 if (likely(pin < gpio_banks)) 95 if (likely(pin < gpio_banks))
94 return gpio_chip[pin].regbase; 96 return gpio_chip[pin].regbase;
95 97
@@ -98,7 +100,7 @@ static inline void __iomem *pin_to_controller(unsigned pin)
98 100
99static inline unsigned pin_to_mask(unsigned pin) 101static inline unsigned pin_to_mask(unsigned pin)
100{ 102{
101 return 1 << (pin % 32); 103 return 1 << (pin % MAX_NB_GPIO_PER_BANK);
102} 104}
103 105
104 106
@@ -713,80 +715,6 @@ postcore_initcall(at91_gpio_debugfs_init);
713 */ 715 */
714static struct lock_class_key gpio_lock_class; 716static struct lock_class_key gpio_lock_class;
715 717
716#if defined(CONFIG_OF)
717static int at91_gpio_irq_map(struct irq_domain *h, unsigned int virq,
718 irq_hw_number_t hw)
719{
720 struct at91_gpio_chip *at91_gpio = h->host_data;
721
722 irq_set_lockdep_class(virq, &gpio_lock_class);
723
724 /*
725 * Can use the "simple" and not "edge" handler since it's
726 * shorter, and the AIC handles interrupts sanely.
727 */
728 irq_set_chip_and_handler(virq, &gpio_irqchip,
729 handle_simple_irq);
730 set_irq_flags(virq, IRQF_VALID);
731 irq_set_chip_data(virq, at91_gpio);
732
733 return 0;
734}
735
736static struct irq_domain_ops at91_gpio_ops = {
737 .map = at91_gpio_irq_map,
738 .xlate = irq_domain_xlate_twocell,
739};
740
741int __init at91_gpio_of_irq_setup(struct device_node *node,
742 struct device_node *parent)
743{
744 struct at91_gpio_chip *prev = NULL;
745 int alias_idx = of_alias_get_id(node, "gpio");
746 struct at91_gpio_chip *at91_gpio = &gpio_chip[alias_idx];
747
748 /* Setup proper .irq_set_type function */
749 if (has_pio3())
750 gpio_irqchip.irq_set_type = alt_gpio_irq_type;
751 else
752 gpio_irqchip.irq_set_type = gpio_irq_type;
753
754 /* Disable irqs of this PIO controller */
755 __raw_writel(~0, at91_gpio->regbase + PIO_IDR);
756
757 /* Setup irq domain */
758 at91_gpio->domain = irq_domain_add_linear(node, at91_gpio->chip.ngpio,
759 &at91_gpio_ops, at91_gpio);
760 if (!at91_gpio->domain)
761 panic("at91_gpio.%d: couldn't allocate irq domain (DT).\n",
762 at91_gpio->pioc_idx);
763
764 /* Setup chained handler */
765 if (at91_gpio->pioc_idx)
766 prev = &gpio_chip[at91_gpio->pioc_idx - 1];
767
768 /* The toplevel handler handles one bank of GPIOs, except
769 * on some SoC it can handles up to three...
770 * We only set up the handler for the first of the list.
771 */
772 if (prev && prev->next == at91_gpio)
773 return 0;
774
775 at91_gpio->pioc_virq = irq_create_mapping(irq_find_host(parent),
776 at91_gpio->pioc_hwirq);
777 irq_set_chip_data(at91_gpio->pioc_virq, at91_gpio);
778 irq_set_chained_handler(at91_gpio->pioc_virq, gpio_irq_handler);
779
780 return 0;
781}
782#else
783int __init at91_gpio_of_irq_setup(struct device_node *node,
784 struct device_node *parent)
785{
786 return -EINVAL;
787}
788#endif
789
790/* 718/*
791 * irqdomain initialization: pile up irqdomains on top of AIC range 719 * irqdomain initialization: pile up irqdomains on top of AIC range
792 */ 720 */
@@ -862,6 +790,16 @@ void __init at91_gpio_irq_setup(void)
862} 790}
863 791
864/* gpiolib support */ 792/* gpiolib support */
793static int at91_gpiolib_request(struct gpio_chip *chip, unsigned offset)
794{
795 struct at91_gpio_chip *at91_gpio = to_at91_gpio_chip(chip);
796 void __iomem *pio = at91_gpio->regbase;
797 unsigned mask = 1 << offset;
798
799 __raw_writel(mask, pio + PIO_PER);
800 return 0;
801}
802
865static int at91_gpiolib_direction_input(struct gpio_chip *chip, 803static int at91_gpiolib_direction_input(struct gpio_chip *chip,
866 unsigned offset) 804 unsigned offset)
867{ 805{
@@ -975,81 +913,11 @@ err:
975 return -EINVAL; 913 return -EINVAL;
976} 914}
977 915
978#ifdef CONFIG_OF_GPIO
979static void __init of_at91_gpio_init_one(struct device_node *np)
980{
981 int alias_idx;
982 struct at91_gpio_chip *at91_gpio;
983
984 if (!np)
985 return;
986
987 alias_idx = of_alias_get_id(np, "gpio");
988 if (alias_idx >= MAX_GPIO_BANKS) {
989 pr_err("at91_gpio, failed alias idx(%d) > MAX_GPIO_BANKS(%d), ignoring.\n",
990 alias_idx, MAX_GPIO_BANKS);
991 return;
992 }
993
994 at91_gpio = &gpio_chip[alias_idx];
995 at91_gpio->chip.base = alias_idx * at91_gpio->chip.ngpio;
996
997 at91_gpio->regbase = of_iomap(np, 0);
998 if (!at91_gpio->regbase) {
999 pr_err("at91_gpio.%d, failed to map registers, ignoring.\n",
1000 alias_idx);
1001 return;
1002 }
1003
1004 /* Get the interrupts property */
1005 if (of_property_read_u32(np, "interrupts", &at91_gpio->pioc_hwirq)) {
1006 pr_err("at91_gpio.%d, failed to get interrupts property, ignoring.\n",
1007 alias_idx);
1008 goto ioremap_err;
1009 }
1010
1011 /* Get capabilities from compatibility property */
1012 if (of_device_is_compatible(np, "atmel,at91sam9x5-gpio"))
1013 at91_gpio_caps |= AT91_GPIO_CAP_PIO3;
1014
1015 /* Setup clock */
1016 if (at91_gpio_setup_clk(alias_idx))
1017 goto ioremap_err;
1018
1019 at91_gpio->chip.of_node = np;
1020 gpio_banks = max(gpio_banks, alias_idx + 1);
1021 at91_gpio->pioc_idx = alias_idx;
1022 return;
1023
1024ioremap_err:
1025 iounmap(at91_gpio->regbase);
1026}
1027
1028static int __init of_at91_gpio_init(void)
1029{
1030 struct device_node *np = NULL;
1031
1032 /*
1033 * This isn't ideal, but it gets things hooked up until this
1034 * driver is converted into a platform_device
1035 */
1036 for_each_compatible_node(np, NULL, "atmel,at91rm9200-gpio")
1037 of_at91_gpio_init_one(np);
1038
1039 return gpio_banks > 0 ? 0 : -EINVAL;
1040}
1041#else
1042static int __init of_at91_gpio_init(void)
1043{
1044 return -EINVAL;
1045}
1046#endif
1047
1048static void __init at91_gpio_init_one(int idx, u32 regbase, int pioc_hwirq) 916static void __init at91_gpio_init_one(int idx, u32 regbase, int pioc_hwirq)
1049{ 917{
1050 struct at91_gpio_chip *at91_gpio = &gpio_chip[idx]; 918 struct at91_gpio_chip *at91_gpio = &gpio_chip[idx];
1051 919
1052 at91_gpio->chip.base = idx * at91_gpio->chip.ngpio; 920 at91_gpio->chip.base = idx * MAX_NB_GPIO_PER_BANK;
1053 at91_gpio->pioc_hwirq = pioc_hwirq; 921 at91_gpio->pioc_hwirq = pioc_hwirq;
1054 at91_gpio->pioc_idx = idx; 922 at91_gpio->pioc_idx = idx;
1055 923
@@ -1079,11 +947,11 @@ void __init at91_gpio_init(struct at91_gpio_bank *data, int nr_banks)
1079 947
1080 BUG_ON(nr_banks > MAX_GPIO_BANKS); 948 BUG_ON(nr_banks > MAX_GPIO_BANKS);
1081 949
1082 if (of_at91_gpio_init() < 0) { 950 if (of_have_populated_dt())
1083 /* No GPIO controller found in device tree */ 951 return;
1084 for (i = 0; i < nr_banks; i++) 952
1085 at91_gpio_init_one(i, data[i].regbase, data[i].id); 953 for (i = 0; i < nr_banks; i++)
1086 } 954 at91_gpio_init_one(i, data[i].regbase, data[i].id);
1087 955
1088 for (i = 0; i < gpio_banks; i++) { 956 for (i = 0; i < gpio_banks; i++) {
1089 at91_gpio = &gpio_chip[i]; 957 at91_gpio = &gpio_chip[i];
diff --git a/arch/arm/mach-at91/setup.c b/arch/arm/mach-at91/setup.c
index 0b32c81730a5..80f4bfd913b3 100644
--- a/arch/arm/mach-at91/setup.c
+++ b/arch/arm/mach-at91/setup.c
@@ -10,6 +10,7 @@
10#include <linux/mm.h> 10#include <linux/mm.h>
11#include <linux/pm.h> 11#include <linux/pm.h>
12#include <linux/of_address.h> 12#include <linux/of_address.h>
13#include <linux/pinctrl/machine.h>
13 14
14#include <asm/system_misc.h> 15#include <asm/system_misc.h>
15#include <asm/mach/map.h> 16#include <asm/mach/map.h>
@@ -448,7 +449,8 @@ void __init at91_dt_initialize(void)
448 /* Register the processor-specific clocks */ 449 /* Register the processor-specific clocks */
449 at91_boot_soc.register_clocks(); 450 at91_boot_soc.register_clocks();
450 451
451 at91_boot_soc.init(); 452 if (at91_boot_soc.init)
453 at91_boot_soc.init();
452} 454}
453#endif 455#endif
454 456
@@ -463,4 +465,6 @@ void __init at91_initialize(unsigned long main_clock)
463 at91_boot_soc.register_clocks(); 465 at91_boot_soc.register_clocks();
464 466
465 at91_boot_soc.init(); 467 at91_boot_soc.init();
468
469 pinctrl_provide_dummies();
466} 470}
diff --git a/arch/arm/mach-at91/soc.h b/arch/arm/mach-at91/soc.h
index a9cfeb153719..9c6d3d4f9a23 100644
--- a/arch/arm/mach-at91/soc.h
+++ b/arch/arm/mach-at91/soc.h
@@ -5,6 +5,7 @@
5 */ 5 */
6 6
7struct at91_init_soc { 7struct at91_init_soc {
8 int builtin;
8 unsigned int *default_irq_priority; 9 unsigned int *default_irq_priority;
9 void (*map_io)(void); 10 void (*map_io)(void);
10 void (*ioremap_registers)(void); 11 void (*ioremap_registers)(void);
@@ -22,9 +23,18 @@ extern struct at91_init_soc at91sam9rl_soc;
22extern struct at91_init_soc at91sam9x5_soc; 23extern struct at91_init_soc at91sam9x5_soc;
23extern struct at91_init_soc at91sam9n12_soc; 24extern struct at91_init_soc at91sam9n12_soc;
24 25
26#define AT91_SOC_START(_name) \
27struct at91_init_soc __initdata at91##_name##_soc \
28 __used \
29 = { \
30 .builtin = 1, \
31
32#define AT91_SOC_END \
33};
34
25static inline int at91_soc_is_enabled(void) 35static inline int at91_soc_is_enabled(void)
26{ 36{
27 return at91_boot_soc.init != NULL; 37 return at91_boot_soc.builtin;
28} 38}
29 39
30#if !defined(CONFIG_SOC_AT91RM9200) 40#if !defined(CONFIG_SOC_AT91RM9200)