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authorArnd Bergmann <arnd@arndb.de>2012-01-09 11:16:29 -0500
committerArnd Bergmann <arnd@arndb.de>2012-01-09 11:16:29 -0500
commitdcf7ec5ee62a78123057a1e286c88ca739717409 (patch)
treefa3f19434638a942ba66d236dde4d9aaadf8b370 /arch/arm/mach-at91
parent15db3e823c3246e3bd31fe454f5c8927eb85caf2 (diff)
parent142f2101a86ade2d6c9dfbedf82e1b5b31c8fce6 (diff)
Merge branch 'samsung/driver' into next/drivers
Conflicts: arch/arm/mach-mxs/include/mach/common.h Pull in previous samsung conflict merges and do a trivial merge of an mxs double-add conflict. Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'arch/arm/mach-at91')
-rw-r--r--arch/arm/mach-at91/Kconfig24
-rw-r--r--arch/arm/mach-at91/at91cap9.c40
-rw-r--r--arch/arm/mach-at91/at91cap9_devices.c43
-rw-r--r--arch/arm/mach-at91/at91rm9200.c28
-rw-r--r--arch/arm/mach-at91/at91rm9200_devices.c42
-rw-r--r--arch/arm/mach-at91/at91rm9200_time.c8
-rw-r--r--arch/arm/mach-at91/at91sam9260.c34
-rw-r--r--arch/arm/mach-at91/at91sam9260_devices.c49
-rw-r--r--arch/arm/mach-at91/at91sam9261.c34
-rw-r--r--arch/arm/mach-at91/at91sam9261_devices.c33
-rw-r--r--arch/arm/mach-at91/at91sam9263.c43
-rw-r--r--arch/arm/mach-at91/at91sam9263_devices.c53
-rw-r--r--arch/arm/mach-at91/at91sam926x_time.c38
-rw-r--r--arch/arm/mach-at91/at91sam9_alt_reset.S9
-rw-r--r--arch/arm/mach-at91/at91sam9g45.c44
-rw-r--r--arch/arm/mach-at91/at91sam9g45_devices.c63
-rw-r--r--arch/arm/mach-at91/at91sam9rl.c38
-rw-r--r--arch/arm/mach-at91/at91sam9rl_devices.c43
-rw-r--r--arch/arm/mach-at91/board-1arm.c2
-rw-r--r--arch/arm/mach-at91/board-afeb-9260v1.c8
-rw-r--r--arch/arm/mach-at91/board-cam60.c6
-rw-r--r--arch/arm/mach-at91/board-cap9adk.c19
-rw-r--r--arch/arm/mach-at91/board-carmeva.c7
-rw-r--r--arch/arm/mach-at91/board-cpu9krea.c12
-rw-r--r--arch/arm/mach-at91/board-cpuat91.c5
-rw-r--r--arch/arm/mach-at91/board-csb337.c5
-rw-r--r--arch/arm/mach-at91/board-csb637.c2
-rw-r--r--arch/arm/mach-at91/board-dt.c3
-rw-r--r--arch/arm/mach-at91/board-eb9200.c9
-rw-r--r--arch/arm/mach-at91/board-ecbat91.c5
-rw-r--r--arch/arm/mach-at91/board-eco920.c5
-rw-r--r--arch/arm/mach-at91/board-flexibity.c5
-rw-r--r--arch/arm/mach-at91/board-foxg20.c7
-rw-r--r--arch/arm/mach-at91/board-gsia18s.c5
-rw-r--r--arch/arm/mach-at91/board-kafa.c2
-rw-r--r--arch/arm/mach-at91/board-kb9202.c6
-rw-r--r--arch/arm/mach-at91/board-neocore926.c7
-rw-r--r--arch/arm/mach-at91/board-pcontrol-g20.c6
-rw-r--r--arch/arm/mach-at91/board-picotux200.c3
-rw-r--r--arch/arm/mach-at91/board-qil-a9260.c16
-rw-r--r--arch/arm/mach-at91/board-rm9200dk.c11
-rw-r--r--arch/arm/mach-at91/board-rm9200ek.c3
-rw-r--r--arch/arm/mach-at91/board-rsi-ews.c2
-rw-r--r--arch/arm/mach-at91/board-sam9-l9260.c10
-rw-r--r--arch/arm/mach-at91/board-sam9260ek.c14
-rw-r--r--arch/arm/mach-at91/board-sam9261ek.c13
-rw-r--r--arch/arm/mach-at91/board-sam9263ek.c10
-rw-r--r--arch/arm/mach-at91/board-sam9g20ek.c11
-rw-r--r--arch/arm/mach-at91/board-sam9m10g45ek.c6
-rw-r--r--arch/arm/mach-at91/board-sam9rlek.c9
-rw-r--r--arch/arm/mach-at91/board-snapper9260.c8
-rw-r--r--arch/arm/mach-at91/board-stamp9g20.c14
-rw-r--r--arch/arm/mach-at91/board-usb-a926x.c12
-rw-r--r--arch/arm/mach-at91/board-yl-9200.c7
-rw-r--r--arch/arm/mach-at91/generic.h10
-rw-r--r--arch/arm/mach-at91/gpio.c85
-rw-r--r--arch/arm/mach-at91/include/mach/at91_aic.h48
-rw-r--r--arch/arm/mach-at91/include/mach/at91_dbgu.h2
-rw-r--r--arch/arm/mach-at91/include/mach/at91_pit.h8
-rw-r--r--arch/arm/mach-at91/include/mach/at91_rtc.h24
-rw-r--r--arch/arm/mach-at91/include/mach/at91_shdwc.h16
-rw-r--r--arch/arm/mach-at91/include/mach/at91cap9.h27
-rw-r--r--arch/arm/mach-at91/include/mach/at91rm9200.h14
-rw-r--r--arch/arm/mach-at91/include/mach/at91sam9260.h23
-rw-r--r--arch/arm/mach-at91/include/mach/at91sam9261.h20
-rw-r--r--arch/arm/mach-at91/include/mach/at91sam9263.h33
-rw-r--r--arch/arm/mach-at91/include/mach/at91sam9_smc.h17
-rw-r--r--arch/arm/mach-at91/include/mach/at91sam9g45.h30
-rw-r--r--arch/arm/mach-at91/include/mach/at91sam9rl.h29
-rw-r--r--arch/arm/mach-at91/include/mach/at91x40.h1
-rw-r--r--arch/arm/mach-at91/include/mach/board.h28
-rw-r--r--arch/arm/mach-at91/include/mach/debug-macro.S10
-rw-r--r--arch/arm/mach-at91/include/mach/entry-macro.S11
-rw-r--r--arch/arm/mach-at91/include/mach/gpio.h336
-rw-r--r--arch/arm/mach-at91/include/mach/hardware.h12
-rw-r--r--arch/arm/mach-at91/include/mach/io.h8
-rw-r--r--arch/arm/mach-at91/include/mach/irqs.h2
-rw-r--r--arch/arm/mach-at91/include/mach/system.h9
-rw-r--r--arch/arm/mach-at91/include/mach/timex.h65
-rw-r--r--arch/arm/mach-at91/include/mach/uncompress.h6
-rw-r--r--arch/arm/mach-at91/include/mach/vmalloc.h28
-rw-r--r--arch/arm/mach-at91/irq.c38
-rw-r--r--arch/arm/mach-at91/pm.c11
-rw-r--r--arch/arm/mach-at91/sam9_smc.c62
-rw-r--r--arch/arm/mach-at91/sam9_smc.h3
-rw-r--r--arch/arm/mach-at91/setup.c44
-rw-r--r--arch/arm/mach-at91/soc.h1
87 files changed, 1114 insertions, 888 deletions
diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig
index d111c3e99249..4f991f295284 100644
--- a/arch/arm/mach-at91/Kconfig
+++ b/arch/arm/mach-at91/Kconfig
@@ -3,6 +3,12 @@ if ARCH_AT91
3config HAVE_AT91_DATAFLASH_CARD 3config HAVE_AT91_DATAFLASH_CARD
4 bool 4 bool
5 5
6config HAVE_AT91_DBGU0
7 bool
8
9config HAVE_AT91_DBGU1
10 bool
11
6config HAVE_AT91_USART3 12config HAVE_AT91_USART3
7 bool 13 bool
8 14
@@ -21,12 +27,14 @@ config ARCH_AT91RM9200
21 bool "AT91RM9200" 27 bool "AT91RM9200"
22 select CPU_ARM920T 28 select CPU_ARM920T
23 select GENERIC_CLOCKEVENTS 29 select GENERIC_CLOCKEVENTS
30 select HAVE_AT91_DBGU0
24 select HAVE_AT91_USART3 31 select HAVE_AT91_USART3
25 32
26config ARCH_AT91SAM9260 33config ARCH_AT91SAM9260
27 bool "AT91SAM9260 or AT91SAM9XE" 34 bool "AT91SAM9260 or AT91SAM9XE"
28 select CPU_ARM926T 35 select CPU_ARM926T
29 select GENERIC_CLOCKEVENTS 36 select GENERIC_CLOCKEVENTS
37 select HAVE_AT91_DBGU0
30 select HAVE_AT91_USART3 38 select HAVE_AT91_USART3
31 select HAVE_AT91_USART4 39 select HAVE_AT91_USART4
32 select HAVE_AT91_USART5 40 select HAVE_AT91_USART5
@@ -37,11 +45,13 @@ config ARCH_AT91SAM9261
37 select CPU_ARM926T 45 select CPU_ARM926T
38 select GENERIC_CLOCKEVENTS 46 select GENERIC_CLOCKEVENTS
39 select HAVE_FB_ATMEL 47 select HAVE_FB_ATMEL
48 select HAVE_AT91_DBGU0
40 49
41config ARCH_AT91SAM9G10 50config ARCH_AT91SAM9G10
42 bool "AT91SAM9G10" 51 bool "AT91SAM9G10"
43 select CPU_ARM926T 52 select CPU_ARM926T
44 select GENERIC_CLOCKEVENTS 53 select GENERIC_CLOCKEVENTS
54 select HAVE_AT91_DBGU0
45 select HAVE_FB_ATMEL 55 select HAVE_FB_ATMEL
46 56
47config ARCH_AT91SAM9263 57config ARCH_AT91SAM9263
@@ -50,6 +60,7 @@ config ARCH_AT91SAM9263
50 select GENERIC_CLOCKEVENTS 60 select GENERIC_CLOCKEVENTS
51 select HAVE_FB_ATMEL 61 select HAVE_FB_ATMEL
52 select HAVE_NET_MACB 62 select HAVE_NET_MACB
63 select HAVE_AT91_DBGU1
53 64
54config ARCH_AT91SAM9RL 65config ARCH_AT91SAM9RL
55 bool "AT91SAM9RL" 66 bool "AT91SAM9RL"
@@ -57,11 +68,13 @@ config ARCH_AT91SAM9RL
57 select GENERIC_CLOCKEVENTS 68 select GENERIC_CLOCKEVENTS
58 select HAVE_AT91_USART3 69 select HAVE_AT91_USART3
59 select HAVE_FB_ATMEL 70 select HAVE_FB_ATMEL
71 select HAVE_AT91_DBGU0
60 72
61config ARCH_AT91SAM9G20 73config ARCH_AT91SAM9G20
62 bool "AT91SAM9G20" 74 bool "AT91SAM9G20"
63 select CPU_ARM926T 75 select CPU_ARM926T
64 select GENERIC_CLOCKEVENTS 76 select GENERIC_CLOCKEVENTS
77 select HAVE_AT91_DBGU0
65 select HAVE_AT91_USART3 78 select HAVE_AT91_USART3
66 select HAVE_AT91_USART4 79 select HAVE_AT91_USART4
67 select HAVE_AT91_USART5 80 select HAVE_AT91_USART5
@@ -74,6 +87,7 @@ config ARCH_AT91SAM9G45
74 select HAVE_AT91_USART3 87 select HAVE_AT91_USART3
75 select HAVE_FB_ATMEL 88 select HAVE_FB_ATMEL
76 select HAVE_NET_MACB 89 select HAVE_NET_MACB
90 select HAVE_AT91_DBGU1
77 91
78config ARCH_AT91CAP9 92config ARCH_AT91CAP9
79 bool "AT91CAP9" 93 bool "AT91CAP9"
@@ -81,6 +95,7 @@ config ARCH_AT91CAP9
81 select GENERIC_CLOCKEVENTS 95 select GENERIC_CLOCKEVENTS
82 select HAVE_FB_ATMEL 96 select HAVE_FB_ATMEL
83 select HAVE_NET_MACB 97 select HAVE_NET_MACB
98 select HAVE_AT91_DBGU1
84 99
85config ARCH_AT91X40 100config ARCH_AT91X40
86 bool "AT91x40" 101 bool "AT91x40"
@@ -510,8 +525,13 @@ config AT91_TIMER_HZ
510choice 525choice
511 prompt "Select a UART for early kernel messages" 526 prompt "Select a UART for early kernel messages"
512 527
513config AT91_EARLY_DBGU 528config AT91_EARLY_DBGU0
514 bool "DBGU" 529 bool "DBGU on rm9200, 9260/9g20, 9261/9g10 and 9rl"
530 depends on HAVE_AT91_DBGU0
531
532config AT91_EARLY_DBGU1
533 bool "DBGU on 9263, 9g45 and cap9"
534 depends on HAVE_AT91_DBGU1
515 535
516config AT91_EARLY_USART0 536config AT91_EARLY_USART0
517 bool "USART0" 537 bool "USART0"
diff --git a/arch/arm/mach-at91/at91cap9.c b/arch/arm/mach-at91/at91cap9.c
index 17632b82dd76..edb879ac04c8 100644
--- a/arch/arm/mach-at91/at91cap9.c
+++ b/arch/arm/mach-at91/at91cap9.c
@@ -13,7 +13,6 @@
13 */ 13 */
14 14
15#include <linux/module.h> 15#include <linux/module.h>
16#include <linux/pm.h>
17 16
18#include <asm/irq.h> 17#include <asm/irq.h>
19#include <asm/mach/arch.h> 18#include <asm/mach/arch.h>
@@ -23,11 +22,11 @@
23#include <mach/at91cap9.h> 22#include <mach/at91cap9.h>
24#include <mach/at91_pmc.h> 23#include <mach/at91_pmc.h>
25#include <mach/at91_rstc.h> 24#include <mach/at91_rstc.h>
26#include <mach/at91_shdwc.h>
27 25
28#include "soc.h" 26#include "soc.h"
29#include "generic.h" 27#include "generic.h"
30#include "clock.h" 28#include "clock.h"
29#include "sam9_smc.h"
31 30
32/* -------------------------------------------------------------------- 31/* --------------------------------------------------------------------
33 * Clocks 32 * Clocks
@@ -223,6 +222,10 @@ static struct clk_lookup periph_clocks_lookups[] = {
223 CLKDEV_CON_DEV_ID("pclk", "ssc.1", &ssc1_clk), 222 CLKDEV_CON_DEV_ID("pclk", "ssc.1", &ssc1_clk),
224 /* fake hclk clock */ 223 /* fake hclk clock */
225 CLKDEV_CON_DEV_ID("hclk", "at91_ohci", &ohci_clk), 224 CLKDEV_CON_DEV_ID("hclk", "at91_ohci", &ohci_clk),
225 CLKDEV_CON_ID("pioA", &pioABCD_clk),
226 CLKDEV_CON_ID("pioB", &pioABCD_clk),
227 CLKDEV_CON_ID("pioC", &pioABCD_clk),
228 CLKDEV_CON_ID("pioD", &pioABCD_clk),
226}; 229};
227 230
228static struct clk_lookup usart_clocks_lookups[] = { 231static struct clk_lookup usart_clocks_lookups[] = {
@@ -295,37 +298,27 @@ void __init at91cap9_set_console_clock(int id)
295 * GPIO 298 * GPIO
296 * -------------------------------------------------------------------- */ 299 * -------------------------------------------------------------------- */
297 300
298static struct at91_gpio_bank at91cap9_gpio[] = { 301static struct at91_gpio_bank at91cap9_gpio[] __initdata = {
299 { 302 {
300 .id = AT91CAP9_ID_PIOABCD, 303 .id = AT91CAP9_ID_PIOABCD,
301 .offset = AT91_PIOA, 304 .regbase = AT91CAP9_BASE_PIOA,
302 .clock = &pioABCD_clk,
303 }, { 305 }, {
304 .id = AT91CAP9_ID_PIOABCD, 306 .id = AT91CAP9_ID_PIOABCD,
305 .offset = AT91_PIOB, 307 .regbase = AT91CAP9_BASE_PIOB,
306 .clock = &pioABCD_clk,
307 }, { 308 }, {
308 .id = AT91CAP9_ID_PIOABCD, 309 .id = AT91CAP9_ID_PIOABCD,
309 .offset = AT91_PIOC, 310 .regbase = AT91CAP9_BASE_PIOC,
310 .clock = &pioABCD_clk,
311 }, { 311 }, {
312 .id = AT91CAP9_ID_PIOABCD, 312 .id = AT91CAP9_ID_PIOABCD,
313 .offset = AT91_PIOD, 313 .regbase = AT91CAP9_BASE_PIOD,
314 .clock = &pioABCD_clk,
315 } 314 }
316}; 315};
317 316
318static void at91cap9_reset(void) 317static void at91cap9_restart(char mode, const char *cmd)
319{ 318{
320 at91_sys_write(AT91_RSTC_CR, AT91_RSTC_KEY | AT91_RSTC_PROCRST | AT91_RSTC_PERRST); 319 at91_sys_write(AT91_RSTC_CR, AT91_RSTC_KEY | AT91_RSTC_PROCRST | AT91_RSTC_PERRST);
321} 320}
322 321
323static void at91cap9_poweroff(void)
324{
325 at91_sys_write(AT91_SHDW_CR, AT91_SHDW_KEY | AT91_SHDW_SHDW);
326}
327
328
329/* -------------------------------------------------------------------- 322/* --------------------------------------------------------------------
330 * AT91CAP9 processor initialization 323 * AT91CAP9 processor initialization
331 * -------------------------------------------------------------------- */ 324 * -------------------------------------------------------------------- */
@@ -335,10 +328,16 @@ static void __init at91cap9_map_io(void)
335 at91_init_sram(0, AT91CAP9_SRAM_BASE, AT91CAP9_SRAM_SIZE); 328 at91_init_sram(0, AT91CAP9_SRAM_BASE, AT91CAP9_SRAM_SIZE);
336} 329}
337 330
331static void __init at91cap9_ioremap_registers(void)
332{
333 at91_ioremap_shdwc(AT91CAP9_BASE_SHDWC);
334 at91sam926x_ioremap_pit(AT91CAP9_BASE_PIT);
335 at91sam9_ioremap_smc(0, AT91CAP9_BASE_SMC);
336}
337
338static void __init at91cap9_initialize(void) 338static void __init at91cap9_initialize(void)
339{ 339{
340 at91_arch_reset = at91cap9_reset; 340 arm_pm_restart = at91cap9_restart;
341 pm_power_off = at91cap9_poweroff;
342 at91_extern_irq = (1 << AT91CAP9_ID_IRQ0) | (1 << AT91CAP9_ID_IRQ1); 341 at91_extern_irq = (1 << AT91CAP9_ID_IRQ0) | (1 << AT91CAP9_ID_IRQ1);
343 342
344 /* Register GPIO subsystem */ 343 /* Register GPIO subsystem */
@@ -396,6 +395,7 @@ static unsigned int at91cap9_default_irq_priority[NR_AIC_IRQS] __initdata = {
396struct at91_init_soc __initdata at91cap9_soc = { 395struct at91_init_soc __initdata at91cap9_soc = {
397 .map_io = at91cap9_map_io, 396 .map_io = at91cap9_map_io,
398 .default_irq_priority = at91cap9_default_irq_priority, 397 .default_irq_priority = at91cap9_default_irq_priority,
398 .ioremap_registers = at91cap9_ioremap_registers,
399 .register_clocks = at91cap9_register_clocks, 399 .register_clocks = at91cap9_register_clocks,
400 .init = at91cap9_initialize, 400 .init = at91cap9_initialize,
401}; 401};
diff --git a/arch/arm/mach-at91/at91cap9_devices.c b/arch/arm/mach-at91/at91cap9_devices.c
index 695aecab0a67..d298fb7cb210 100644
--- a/arch/arm/mach-at91/at91cap9_devices.c
+++ b/arch/arm/mach-at91/at91cap9_devices.c
@@ -76,7 +76,7 @@ void __init at91_add_device_usbh(struct at91_usbh_data *data)
76 76
77 /* Enable VBus control for UHP ports */ 77 /* Enable VBus control for UHP ports */
78 for (i = 0; i < data->ports; i++) { 78 for (i = 0; i < data->ports; i++) {
79 if (data->vbus_pin[i]) 79 if (gpio_is_valid(data->vbus_pin[i]))
80 at91_set_gpio_output(data->vbus_pin[i], 0); 80 at91_set_gpio_output(data->vbus_pin[i], 0);
81 } 81 }
82 82
@@ -179,7 +179,7 @@ void __init at91_add_device_usba(struct usba_platform_data *data)
179 usba_udc_data.pdata.num_ep = ARRAY_SIZE(usba_udc_ep); 179 usba_udc_data.pdata.num_ep = ARRAY_SIZE(usba_udc_ep);
180 memcpy(usba_udc_data.ep, usba_udc_ep, sizeof(usba_udc_ep)); 180 memcpy(usba_udc_data.ep, usba_udc_ep, sizeof(usba_udc_ep));
181 181
182 if (data && data->vbus_pin > 0) { 182 if (data && gpio_is_valid(data->vbus_pin)) {
183 at91_set_gpio_input(data->vbus_pin, 0); 183 at91_set_gpio_input(data->vbus_pin, 0);
184 at91_set_deglitch(data->vbus_pin, 1); 184 at91_set_deglitch(data->vbus_pin, 1);
185 usba_udc_data.pdata.vbus_pin = data->vbus_pin; 185 usba_udc_data.pdata.vbus_pin = data->vbus_pin;
@@ -232,7 +232,7 @@ void __init at91_add_device_eth(struct macb_platform_data *data)
232 if (!data) 232 if (!data)
233 return; 233 return;
234 234
235 if (data->phy_irq_pin) { 235 if (gpio_is_valid(data->phy_irq_pin)) {
236 at91_set_gpio_input(data->phy_irq_pin, 0); 236 at91_set_gpio_input(data->phy_irq_pin, 0);
237 at91_set_deglitch(data->phy_irq_pin, 1); 237 at91_set_deglitch(data->phy_irq_pin, 1);
238 } 238 }
@@ -332,13 +332,13 @@ void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data)
332 return; 332 return;
333 333
334 /* input/irq */ 334 /* input/irq */
335 if (data->det_pin) { 335 if (gpio_is_valid(data->det_pin)) {
336 at91_set_gpio_input(data->det_pin, 1); 336 at91_set_gpio_input(data->det_pin, 1);
337 at91_set_deglitch(data->det_pin, 1); 337 at91_set_deglitch(data->det_pin, 1);
338 } 338 }
339 if (data->wp_pin) 339 if (gpio_is_valid(data->wp_pin))
340 at91_set_gpio_input(data->wp_pin, 1); 340 at91_set_gpio_input(data->wp_pin, 1);
341 if (data->vcc_pin) 341 if (gpio_is_valid(data->vcc_pin))
342 at91_set_gpio_output(data->vcc_pin, 0); 342 at91_set_gpio_output(data->vcc_pin, 0);
343 343
344 if (mmc_id == 0) { /* MCI0 */ 344 if (mmc_id == 0) { /* MCI0 */
@@ -398,8 +398,8 @@ static struct resource nand_resources[] = {
398 .flags = IORESOURCE_MEM, 398 .flags = IORESOURCE_MEM,
399 }, 399 },
400 [1] = { 400 [1] = {
401 .start = AT91_BASE_SYS + AT91_ECC, 401 .start = AT91CAP9_BASE_ECC,
402 .end = AT91_BASE_SYS + AT91_ECC + SZ_512 - 1, 402 .end = AT91CAP9_BASE_ECC + SZ_512 - 1,
403 .flags = IORESOURCE_MEM, 403 .flags = IORESOURCE_MEM,
404 } 404 }
405}; 405};
@@ -425,15 +425,15 @@ void __init at91_add_device_nand(struct atmel_nand_data *data)
425 at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_EBI_CS3A_SMC_SMARTMEDIA); 425 at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_EBI_CS3A_SMC_SMARTMEDIA);
426 426
427 /* enable pin */ 427 /* enable pin */
428 if (data->enable_pin) 428 if (gpio_is_valid(data->enable_pin))
429 at91_set_gpio_output(data->enable_pin, 1); 429 at91_set_gpio_output(data->enable_pin, 1);
430 430
431 /* ready/busy pin */ 431 /* ready/busy pin */
432 if (data->rdy_pin) 432 if (gpio_is_valid(data->rdy_pin))
433 at91_set_gpio_input(data->rdy_pin, 1); 433 at91_set_gpio_input(data->rdy_pin, 1);
434 434
435 /* card detect pin */ 435 /* card detect pin */
436 if (data->det_pin) 436 if (gpio_is_valid(data->det_pin))
437 at91_set_gpio_input(data->det_pin, 1); 437 at91_set_gpio_input(data->det_pin, 1);
438 438
439 nand_data = *data; 439 nand_data = *data;
@@ -670,8 +670,8 @@ static void __init at91_add_device_tc(void) { }
670 670
671static struct resource rtt_resources[] = { 671static struct resource rtt_resources[] = {
672 { 672 {
673 .start = AT91_BASE_SYS + AT91_RTT, 673 .start = AT91CAP9_BASE_RTT,
674 .end = AT91_BASE_SYS + AT91_RTT + SZ_16 - 1, 674 .end = AT91CAP9_BASE_RTT + SZ_16 - 1,
675 .flags = IORESOURCE_MEM, 675 .flags = IORESOURCE_MEM,
676 } 676 }
677}; 677};
@@ -694,10 +694,19 @@ static void __init at91_add_device_rtt(void)
694 * -------------------------------------------------------------------- */ 694 * -------------------------------------------------------------------- */
695 695
696#if defined(CONFIG_AT91SAM9X_WATCHDOG) || defined(CONFIG_AT91SAM9X_WATCHDOG_MODULE) 696#if defined(CONFIG_AT91SAM9X_WATCHDOG) || defined(CONFIG_AT91SAM9X_WATCHDOG_MODULE)
697static struct resource wdt_resources[] = {
698 {
699 .start = AT91CAP9_BASE_WDT,
700 .end = AT91CAP9_BASE_WDT + SZ_16 - 1,
701 .flags = IORESOURCE_MEM,
702 }
703};
704
697static struct platform_device at91cap9_wdt_device = { 705static struct platform_device at91cap9_wdt_device = {
698 .name = "at91_wdt", 706 .name = "at91_wdt",
699 .id = -1, 707 .id = -1,
700 .num_resources = 0, 708 .resource = wdt_resources,
709 .num_resources = ARRAY_SIZE(wdt_resources),
701}; 710};
702 711
703static void __init at91_add_device_watchdog(void) 712static void __init at91_add_device_watchdog(void)
@@ -807,7 +816,7 @@ void __init at91_add_device_ac97(struct ac97c_platform_data *data)
807 at91_set_A_periph(AT91_PIN_PA9, 0); /* AC97RX */ 816 at91_set_A_periph(AT91_PIN_PA9, 0); /* AC97RX */
808 817
809 /* reset */ 818 /* reset */
810 if (data->reset_pin) 819 if (gpio_is_valid(data->reset_pin))
811 at91_set_gpio_output(data->reset_pin, 0); 820 at91_set_gpio_output(data->reset_pin, 0);
812 821
813 ac97_data = *data; 822 ac97_data = *data;
@@ -1021,8 +1030,8 @@ void __init at91_add_device_ssc(unsigned id, unsigned pins) {}
1021#if defined(CONFIG_SERIAL_ATMEL) 1030#if defined(CONFIG_SERIAL_ATMEL)
1022static struct resource dbgu_resources[] = { 1031static struct resource dbgu_resources[] = {
1023 [0] = { 1032 [0] = {
1024 .start = AT91_BASE_SYS + AT91_DBGU, 1033 .start = AT91CAP9_BASE_DBGU,
1025 .end = AT91_BASE_SYS + AT91_DBGU + SZ_512 - 1, 1034 .end = AT91CAP9_BASE_DBGU + SZ_512 - 1,
1026 .flags = IORESOURCE_MEM, 1035 .flags = IORESOURCE_MEM,
1027 }, 1036 },
1028 [1] = { 1037 [1] = {
diff --git a/arch/arm/mach-at91/at91rm9200.c b/arch/arm/mach-at91/at91rm9200.c
index 713d3bdbd284..99c3174e24a2 100644
--- a/arch/arm/mach-at91/at91rm9200.c
+++ b/arch/arm/mach-at91/at91rm9200.c
@@ -23,6 +23,7 @@
23#include "soc.h" 23#include "soc.h"
24#include "generic.h" 24#include "generic.h"
25#include "clock.h" 25#include "clock.h"
26#include "sam9_smc.h"
26 27
27static struct map_desc at91rm9200_io_desc[] __initdata = { 28static struct map_desc at91rm9200_io_desc[] __initdata = {
28 { 29 {
@@ -195,6 +196,10 @@ static struct clk_lookup periph_clocks_lookups[] = {
195 CLKDEV_CON_DEV_ID("pclk", "ssc.2", &ssc2_clk), 196 CLKDEV_CON_DEV_ID("pclk", "ssc.2", &ssc2_clk),
196 /* fake hclk clock */ 197 /* fake hclk clock */
197 CLKDEV_CON_DEV_ID("hclk", "at91_ohci", &ohci_clk), 198 CLKDEV_CON_DEV_ID("hclk", "at91_ohci", &ohci_clk),
199 CLKDEV_CON_ID("pioA", &pioA_clk),
200 CLKDEV_CON_ID("pioB", &pioB_clk),
201 CLKDEV_CON_ID("pioC", &pioC_clk),
202 CLKDEV_CON_ID("pioD", &pioD_clk),
198}; 203};
199 204
200static struct clk_lookup usart_clocks_lookups[] = { 205static struct clk_lookup usart_clocks_lookups[] = {
@@ -268,27 +273,23 @@ void __init at91rm9200_set_console_clock(int id)
268 * GPIO 273 * GPIO
269 * -------------------------------------------------------------------- */ 274 * -------------------------------------------------------------------- */
270 275
271static struct at91_gpio_bank at91rm9200_gpio[] = { 276static struct at91_gpio_bank at91rm9200_gpio[] __initdata = {
272 { 277 {
273 .id = AT91RM9200_ID_PIOA, 278 .id = AT91RM9200_ID_PIOA,
274 .offset = AT91_PIOA, 279 .regbase = AT91RM9200_BASE_PIOA,
275 .clock = &pioA_clk,
276 }, { 280 }, {
277 .id = AT91RM9200_ID_PIOB, 281 .id = AT91RM9200_ID_PIOB,
278 .offset = AT91_PIOB, 282 .regbase = AT91RM9200_BASE_PIOB,
279 .clock = &pioB_clk,
280 }, { 283 }, {
281 .id = AT91RM9200_ID_PIOC, 284 .id = AT91RM9200_ID_PIOC,
282 .offset = AT91_PIOC, 285 .regbase = AT91RM9200_BASE_PIOC,
283 .clock = &pioC_clk,
284 }, { 286 }, {
285 .id = AT91RM9200_ID_PIOD, 287 .id = AT91RM9200_ID_PIOD,
286 .offset = AT91_PIOD, 288 .regbase = AT91RM9200_BASE_PIOD,
287 .clock = &pioD_clk,
288 } 289 }
289}; 290};
290 291
291static void at91rm9200_reset(void) 292static void at91rm9200_restart(char mode, const char *cmd)
292{ 293{
293 /* 294 /*
294 * Perform a hardware reset with the use of the Watchdog timer. 295 * Perform a hardware reset with the use of the Watchdog timer.
@@ -307,9 +308,13 @@ static void __init at91rm9200_map_io(void)
307 iotable_init(at91rm9200_io_desc, ARRAY_SIZE(at91rm9200_io_desc)); 308 iotable_init(at91rm9200_io_desc, ARRAY_SIZE(at91rm9200_io_desc));
308} 309}
309 310
311static void __init at91rm9200_ioremap_registers(void)
312{
313}
314
310static void __init at91rm9200_initialize(void) 315static void __init at91rm9200_initialize(void)
311{ 316{
312 at91_arch_reset = at91rm9200_reset; 317 arm_pm_restart = at91rm9200_restart;
313 at91_extern_irq = (1 << AT91RM9200_ID_IRQ0) | (1 << AT91RM9200_ID_IRQ1) 318 at91_extern_irq = (1 << AT91RM9200_ID_IRQ0) | (1 << AT91RM9200_ID_IRQ1)
314 | (1 << AT91RM9200_ID_IRQ2) | (1 << AT91RM9200_ID_IRQ3) 319 | (1 << AT91RM9200_ID_IRQ2) | (1 << AT91RM9200_ID_IRQ3)
315 | (1 << AT91RM9200_ID_IRQ4) | (1 << AT91RM9200_ID_IRQ5) 320 | (1 << AT91RM9200_ID_IRQ4) | (1 << AT91RM9200_ID_IRQ5)
@@ -366,6 +371,7 @@ static unsigned int at91rm9200_default_irq_priority[NR_AIC_IRQS] __initdata = {
366struct at91_init_soc __initdata at91rm9200_soc = { 371struct at91_init_soc __initdata at91rm9200_soc = {
367 .map_io = at91rm9200_map_io, 372 .map_io = at91rm9200_map_io,
368 .default_irq_priority = at91rm9200_default_irq_priority, 373 .default_irq_priority = at91rm9200_default_irq_priority,
374 .ioremap_registers = at91rm9200_ioremap_registers,
369 .register_clocks = at91rm9200_register_clocks, 375 .register_clocks = at91rm9200_register_clocks,
370 .init = at91rm9200_initialize, 376 .init = at91rm9200_initialize,
371}; 377};
diff --git a/arch/arm/mach-at91/at91rm9200_devices.c b/arch/arm/mach-at91/at91rm9200_devices.c
index 55d22911d0c2..18bacec2b094 100644
--- a/arch/arm/mach-at91/at91rm9200_devices.c
+++ b/arch/arm/mach-at91/at91rm9200_devices.c
@@ -114,11 +114,11 @@ void __init at91_add_device_udc(struct at91_udc_data *data)
114 if (!data) 114 if (!data)
115 return; 115 return;
116 116
117 if (data->vbus_pin) { 117 if (gpio_is_valid(data->vbus_pin)) {
118 at91_set_gpio_input(data->vbus_pin, 0); 118 at91_set_gpio_input(data->vbus_pin, 0);
119 at91_set_deglitch(data->vbus_pin, 1); 119 at91_set_deglitch(data->vbus_pin, 1);
120 } 120 }
121 if (data->pullup_pin) 121 if (gpio_is_valid(data->pullup_pin))
122 at91_set_gpio_output(data->pullup_pin, 0); 122 at91_set_gpio_output(data->pullup_pin, 0);
123 123
124 udc_data = *data; 124 udc_data = *data;
@@ -167,7 +167,7 @@ void __init at91_add_device_eth(struct macb_platform_data *data)
167 if (!data) 167 if (!data)
168 return; 168 return;
169 169
170 if (data->phy_irq_pin) { 170 if (gpio_is_valid(data->phy_irq_pin)) {
171 at91_set_gpio_input(data->phy_irq_pin, 0); 171 at91_set_gpio_input(data->phy_irq_pin, 0);
172 at91_set_deglitch(data->phy_irq_pin, 1); 172 at91_set_deglitch(data->phy_irq_pin, 1);
173 } 173 }
@@ -260,7 +260,7 @@ void __init at91_add_device_cf(struct at91_cf_data *data)
260 ); 260 );
261 261
262 /* input/irq */ 262 /* input/irq */
263 if (data->irq_pin) { 263 if (gpio_is_valid(data->irq_pin)) {
264 at91_set_gpio_input(data->irq_pin, 1); 264 at91_set_gpio_input(data->irq_pin, 1);
265 at91_set_deglitch(data->irq_pin, 1); 265 at91_set_deglitch(data->irq_pin, 1);
266 } 266 }
@@ -268,7 +268,7 @@ void __init at91_add_device_cf(struct at91_cf_data *data)
268 at91_set_deglitch(data->det_pin, 1); 268 at91_set_deglitch(data->det_pin, 1);
269 269
270 /* outputs, initially off */ 270 /* outputs, initially off */
271 if (data->vcc_pin) 271 if (gpio_is_valid(data->vcc_pin))
272 at91_set_gpio_output(data->vcc_pin, 0); 272 at91_set_gpio_output(data->vcc_pin, 0);
273 at91_set_gpio_output(data->rst_pin, 0); 273 at91_set_gpio_output(data->rst_pin, 0);
274 274
@@ -328,13 +328,13 @@ void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data)
328 return; 328 return;
329 329
330 /* input/irq */ 330 /* input/irq */
331 if (data->det_pin) { 331 if (gpio_is_valid(data->det_pin)) {
332 at91_set_gpio_input(data->det_pin, 1); 332 at91_set_gpio_input(data->det_pin, 1);
333 at91_set_deglitch(data->det_pin, 1); 333 at91_set_deglitch(data->det_pin, 1);
334 } 334 }
335 if (data->wp_pin) 335 if (gpio_is_valid(data->wp_pin))
336 at91_set_gpio_input(data->wp_pin, 1); 336 at91_set_gpio_input(data->wp_pin, 1);
337 if (data->vcc_pin) 337 if (gpio_is_valid(data->vcc_pin))
338 at91_set_gpio_output(data->vcc_pin, 0); 338 at91_set_gpio_output(data->vcc_pin, 0);
339 339
340 /* CLK */ 340 /* CLK */
@@ -419,15 +419,15 @@ void __init at91_add_device_nand(struct atmel_nand_data *data)
419 ); 419 );
420 420
421 /* enable pin */ 421 /* enable pin */
422 if (data->enable_pin) 422 if (gpio_is_valid(data->enable_pin))
423 at91_set_gpio_output(data->enable_pin, 1); 423 at91_set_gpio_output(data->enable_pin, 1);
424 424
425 /* ready/busy pin */ 425 /* ready/busy pin */
426 if (data->rdy_pin) 426 if (gpio_is_valid(data->rdy_pin))
427 at91_set_gpio_input(data->rdy_pin, 1); 427 at91_set_gpio_input(data->rdy_pin, 1);
428 428
429 /* card detect pin */ 429 /* card detect pin */
430 if (data->det_pin) 430 if (gpio_is_valid(data->det_pin))
431 at91_set_gpio_input(data->det_pin, 1); 431 at91_set_gpio_input(data->det_pin, 1);
432 432
433 at91_set_A_periph(AT91_PIN_PC1, 0); /* SMOE */ 433 at91_set_A_periph(AT91_PIN_PC1, 0); /* SMOE */
@@ -665,10 +665,24 @@ static void __init at91_add_device_tc(void) { }
665 * -------------------------------------------------------------------- */ 665 * -------------------------------------------------------------------- */
666 666
667#if defined(CONFIG_RTC_DRV_AT91RM9200) || defined(CONFIG_RTC_DRV_AT91RM9200_MODULE) 667#if defined(CONFIG_RTC_DRV_AT91RM9200) || defined(CONFIG_RTC_DRV_AT91RM9200_MODULE)
668static struct resource rtc_resources[] = {
669 [0] = {
670 .start = AT91RM9200_BASE_RTC,
671 .end = AT91RM9200_BASE_RTC + SZ_256 - 1,
672 .flags = IORESOURCE_MEM,
673 },
674 [1] = {
675 .start = AT91_ID_SYS,
676 .end = AT91_ID_SYS,
677 .flags = IORESOURCE_IRQ,
678 },
679};
680
668static struct platform_device at91rm9200_rtc_device = { 681static struct platform_device at91rm9200_rtc_device = {
669 .name = "at91_rtc", 682 .name = "at91_rtc",
670 .id = -1, 683 .id = -1,
671 .num_resources = 0, 684 .resource = rtc_resources,
685 .num_resources = ARRAY_SIZE(rtc_resources),
672}; 686};
673 687
674static void __init at91_add_device_rtc(void) 688static void __init at91_add_device_rtc(void)
@@ -877,8 +891,8 @@ void __init at91_add_device_ssc(unsigned id, unsigned pins) {}
877#if defined(CONFIG_SERIAL_ATMEL) 891#if defined(CONFIG_SERIAL_ATMEL)
878static struct resource dbgu_resources[] = { 892static struct resource dbgu_resources[] = {
879 [0] = { 893 [0] = {
880 .start = AT91_BASE_SYS + AT91_DBGU, 894 .start = AT91RM9200_BASE_DBGU,
881 .end = AT91_BASE_SYS + AT91_DBGU + SZ_512 - 1, 895 .end = AT91RM9200_BASE_DBGU + SZ_512 - 1,
882 .flags = IORESOURCE_MEM, 896 .flags = IORESOURCE_MEM,
883 }, 897 },
884 [1] = { 898 [1] = {
diff --git a/arch/arm/mach-at91/at91rm9200_time.c b/arch/arm/mach-at91/at91rm9200_time.c
index 1dd69c85dfec..a028cdf8f974 100644
--- a/arch/arm/mach-at91/at91rm9200_time.c
+++ b/arch/arm/mach-at91/at91rm9200_time.c
@@ -32,6 +32,8 @@ static unsigned long last_crtr;
32static u32 irqmask; 32static u32 irqmask;
33static struct clock_event_device clkevt; 33static struct clock_event_device clkevt;
34 34
35#define RM9200_TIMER_LATCH ((AT91_SLOW_CLOCK + HZ/2) / HZ)
36
35/* 37/*
36 * The ST_CRTR is updated asynchronously to the master clock ... but 38 * The ST_CRTR is updated asynchronously to the master clock ... but
37 * the updates as seen by the CPU don't seem to be strictly monotonic. 39 * the updates as seen by the CPU don't seem to be strictly monotonic.
@@ -74,8 +76,8 @@ static irqreturn_t at91rm9200_timer_interrupt(int irq, void *dev_id)
74 if (sr & AT91_ST_PITS) { 76 if (sr & AT91_ST_PITS) {
75 u32 crtr = read_CRTR(); 77 u32 crtr = read_CRTR();
76 78
77 while (((crtr - last_crtr) & AT91_ST_CRTV) >= LATCH) { 79 while (((crtr - last_crtr) & AT91_ST_CRTV) >= RM9200_TIMER_LATCH) {
78 last_crtr += LATCH; 80 last_crtr += RM9200_TIMER_LATCH;
79 clkevt.event_handler(&clkevt); 81 clkevt.event_handler(&clkevt);
80 } 82 }
81 return IRQ_HANDLED; 83 return IRQ_HANDLED;
@@ -116,7 +118,7 @@ clkevt32k_mode(enum clock_event_mode mode, struct clock_event_device *dev)
116 case CLOCK_EVT_MODE_PERIODIC: 118 case CLOCK_EVT_MODE_PERIODIC:
117 /* PIT for periodic irqs; fixed rate of 1/HZ */ 119 /* PIT for periodic irqs; fixed rate of 1/HZ */
118 irqmask = AT91_ST_PITS; 120 irqmask = AT91_ST_PITS;
119 at91_sys_write(AT91_ST_PIMR, LATCH); 121 at91_sys_write(AT91_ST_PIMR, RM9200_TIMER_LATCH);
120 break; 122 break;
121 case CLOCK_EVT_MODE_ONESHOT: 123 case CLOCK_EVT_MODE_ONESHOT:
122 /* ALM for oneshot irqs, set by next_event() 124 /* ALM for oneshot irqs, set by next_event()
diff --git a/arch/arm/mach-at91/at91sam9260.c b/arch/arm/mach-at91/at91sam9260.c
index 1c945e3ba57c..5e46e4a96430 100644
--- a/arch/arm/mach-at91/at91sam9260.c
+++ b/arch/arm/mach-at91/at91sam9260.c
@@ -11,7 +11,6 @@
11 */ 11 */
12 12
13#include <linux/module.h> 13#include <linux/module.h>
14#include <linux/pm.h>
15 14
16#include <asm/irq.h> 15#include <asm/irq.h>
17#include <asm/mach/arch.h> 16#include <asm/mach/arch.h>
@@ -21,11 +20,11 @@
21#include <mach/at91sam9260.h> 20#include <mach/at91sam9260.h>
22#include <mach/at91_pmc.h> 21#include <mach/at91_pmc.h>
23#include <mach/at91_rstc.h> 22#include <mach/at91_rstc.h>
24#include <mach/at91_shdwc.h>
25 23
26#include "soc.h" 24#include "soc.h"
27#include "generic.h" 25#include "generic.h"
28#include "clock.h" 26#include "clock.h"
27#include "sam9_smc.h"
29 28
30/* -------------------------------------------------------------------- 29/* --------------------------------------------------------------------
31 * Clocks 30 * Clocks
@@ -211,6 +210,9 @@ static struct clk_lookup periph_clocks_lookups[] = {
211 CLKDEV_CON_DEV_ID("usart", "fffd8000.serial", &usart5_clk), 210 CLKDEV_CON_DEV_ID("usart", "fffd8000.serial", &usart5_clk),
212 /* fake hclk clock */ 211 /* fake hclk clock */
213 CLKDEV_CON_DEV_ID("hclk", "at91_ohci", &ohci_clk), 212 CLKDEV_CON_DEV_ID("hclk", "at91_ohci", &ohci_clk),
213 CLKDEV_CON_ID("pioA", &pioA_clk),
214 CLKDEV_CON_ID("pioB", &pioB_clk),
215 CLKDEV_CON_ID("pioC", &pioC_clk),
214}; 216};
215 217
216static struct clk_lookup usart_clocks_lookups[] = { 218static struct clk_lookup usart_clocks_lookups[] = {
@@ -272,28 +274,19 @@ void __init at91sam9260_set_console_clock(int id)
272 * GPIO 274 * GPIO
273 * -------------------------------------------------------------------- */ 275 * -------------------------------------------------------------------- */
274 276
275static struct at91_gpio_bank at91sam9260_gpio[] = { 277static struct at91_gpio_bank at91sam9260_gpio[] __initdata = {
276 { 278 {
277 .id = AT91SAM9260_ID_PIOA, 279 .id = AT91SAM9260_ID_PIOA,
278 .offset = AT91_PIOA, 280 .regbase = AT91SAM9260_BASE_PIOA,
279 .clock = &pioA_clk,
280 }, { 281 }, {
281 .id = AT91SAM9260_ID_PIOB, 282 .id = AT91SAM9260_ID_PIOB,
282 .offset = AT91_PIOB, 283 .regbase = AT91SAM9260_BASE_PIOB,
283 .clock = &pioB_clk,
284 }, { 284 }, {
285 .id = AT91SAM9260_ID_PIOC, 285 .id = AT91SAM9260_ID_PIOC,
286 .offset = AT91_PIOC, 286 .regbase = AT91SAM9260_BASE_PIOC,
287 .clock = &pioC_clk,
288 } 287 }
289}; 288};
290 289
291static void at91sam9260_poweroff(void)
292{
293 at91_sys_write(AT91_SHDW_CR, AT91_SHDW_KEY | AT91_SHDW_SHDW);
294}
295
296
297/* -------------------------------------------------------------------- 290/* --------------------------------------------------------------------
298 * AT91SAM9260 processor initialization 291 * AT91SAM9260 processor initialization
299 * -------------------------------------------------------------------- */ 292 * -------------------------------------------------------------------- */
@@ -327,10 +320,16 @@ static void __init at91sam9260_map_io(void)
327 } 320 }
328} 321}
329 322
323static void __init at91sam9260_ioremap_registers(void)
324{
325 at91_ioremap_shdwc(AT91SAM9260_BASE_SHDWC);
326 at91sam926x_ioremap_pit(AT91SAM9260_BASE_PIT);
327 at91sam9_ioremap_smc(0, AT91SAM9260_BASE_SMC);
328}
329
330static void __init at91sam9260_initialize(void) 330static void __init at91sam9260_initialize(void)
331{ 331{
332 at91_arch_reset = at91sam9_alt_reset; 332 arm_pm_restart = at91sam9_alt_restart;
333 pm_power_off = at91sam9260_poweroff;
334 at91_extern_irq = (1 << AT91SAM9260_ID_IRQ0) | (1 << AT91SAM9260_ID_IRQ1) 333 at91_extern_irq = (1 << AT91SAM9260_ID_IRQ0) | (1 << AT91SAM9260_ID_IRQ1)
335 | (1 << AT91SAM9260_ID_IRQ2); 334 | (1 << AT91SAM9260_ID_IRQ2);
336 335
@@ -383,6 +382,7 @@ static unsigned int at91sam9260_default_irq_priority[NR_AIC_IRQS] __initdata = {
383struct at91_init_soc __initdata at91sam9260_soc = { 382struct at91_init_soc __initdata at91sam9260_soc = {
384 .map_io = at91sam9260_map_io, 383 .map_io = at91sam9260_map_io,
385 .default_irq_priority = at91sam9260_default_irq_priority, 384 .default_irq_priority = at91sam9260_default_irq_priority,
385 .ioremap_registers = at91sam9260_ioremap_registers,
386 .register_clocks = at91sam9260_register_clocks, 386 .register_clocks = at91sam9260_register_clocks,
387 .init = at91sam9260_initialize, 387 .init = at91sam9260_initialize,
388}; 388};
diff --git a/arch/arm/mach-at91/at91sam9260_devices.c b/arch/arm/mach-at91/at91sam9260_devices.c
index b1a4812d9965..642ccb6d26b2 100644
--- a/arch/arm/mach-at91/at91sam9260_devices.c
+++ b/arch/arm/mach-at91/at91sam9260_devices.c
@@ -115,7 +115,7 @@ void __init at91_add_device_udc(struct at91_udc_data *data)
115 if (!data) 115 if (!data)
116 return; 116 return;
117 117
118 if (data->vbus_pin) { 118 if (gpio_is_valid(data->vbus_pin)) {
119 at91_set_gpio_input(data->vbus_pin, 0); 119 at91_set_gpio_input(data->vbus_pin, 0);
120 at91_set_deglitch(data->vbus_pin, 1); 120 at91_set_deglitch(data->vbus_pin, 1);
121 } 121 }
@@ -168,7 +168,7 @@ void __init at91_add_device_eth(struct macb_platform_data *data)
168 if (!data) 168 if (!data)
169 return; 169 return;
170 170
171 if (data->phy_irq_pin) { 171 if (gpio_is_valid(data->phy_irq_pin)) {
172 at91_set_gpio_input(data->phy_irq_pin, 0); 172 at91_set_gpio_input(data->phy_irq_pin, 0);
173 at91_set_deglitch(data->phy_irq_pin, 1); 173 at91_set_deglitch(data->phy_irq_pin, 1);
174 } 174 }
@@ -243,13 +243,13 @@ void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data)
243 return; 243 return;
244 244
245 /* input/irq */ 245 /* input/irq */
246 if (data->det_pin) { 246 if (gpio_is_valid(data->det_pin)) {
247 at91_set_gpio_input(data->det_pin, 1); 247 at91_set_gpio_input(data->det_pin, 1);
248 at91_set_deglitch(data->det_pin, 1); 248 at91_set_deglitch(data->det_pin, 1);
249 } 249 }
250 if (data->wp_pin) 250 if (gpio_is_valid(data->wp_pin))
251 at91_set_gpio_input(data->wp_pin, 1); 251 at91_set_gpio_input(data->wp_pin, 1);
252 if (data->vcc_pin) 252 if (gpio_is_valid(data->vcc_pin))
253 at91_set_gpio_output(data->vcc_pin, 0); 253 at91_set_gpio_output(data->vcc_pin, 0);
254 254
255 /* CLK */ 255 /* CLK */
@@ -330,11 +330,11 @@ void __init at91_add_device_mci(short mmc_id, struct mci_platform_data *data)
330 for (i = 0; i < ATMCI_MAX_NR_SLOTS; i++) { 330 for (i = 0; i < ATMCI_MAX_NR_SLOTS; i++) {
331 if (data->slot[i].bus_width) { 331 if (data->slot[i].bus_width) {
332 /* input/irq */ 332 /* input/irq */
333 if (data->slot[i].detect_pin) { 333 if (gpio_is_valid(data->slot[i].detect_pin)) {
334 at91_set_gpio_input(data->slot[i].detect_pin, 1); 334 at91_set_gpio_input(data->slot[i].detect_pin, 1);
335 at91_set_deglitch(data->slot[i].detect_pin, 1); 335 at91_set_deglitch(data->slot[i].detect_pin, 1);
336 } 336 }
337 if (data->slot[i].wp_pin) 337 if (gpio_is_valid(data->slot[i].wp_pin))
338 at91_set_gpio_input(data->slot[i].wp_pin, 1); 338 at91_set_gpio_input(data->slot[i].wp_pin, 1);
339 339
340 switch (i) { 340 switch (i) {
@@ -399,8 +399,8 @@ static struct resource nand_resources[] = {
399 .flags = IORESOURCE_MEM, 399 .flags = IORESOURCE_MEM,
400 }, 400 },
401 [1] = { 401 [1] = {
402 .start = AT91_BASE_SYS + AT91_ECC, 402 .start = AT91SAM9260_BASE_ECC,
403 .end = AT91_BASE_SYS + AT91_ECC + SZ_512 - 1, 403 .end = AT91SAM9260_BASE_ECC + SZ_512 - 1,
404 .flags = IORESOURCE_MEM, 404 .flags = IORESOURCE_MEM,
405 } 405 }
406}; 406};
@@ -426,15 +426,15 @@ void __init at91_add_device_nand(struct atmel_nand_data *data)
426 at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_CS3A_SMC_SMARTMEDIA); 426 at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_CS3A_SMC_SMARTMEDIA);
427 427
428 /* enable pin */ 428 /* enable pin */
429 if (data->enable_pin) 429 if (gpio_is_valid(data->enable_pin))
430 at91_set_gpio_output(data->enable_pin, 1); 430 at91_set_gpio_output(data->enable_pin, 1);
431 431
432 /* ready/busy pin */ 432 /* ready/busy pin */
433 if (data->rdy_pin) 433 if (gpio_is_valid(data->rdy_pin))
434 at91_set_gpio_input(data->rdy_pin, 1); 434 at91_set_gpio_input(data->rdy_pin, 1);
435 435
436 /* card detect pin */ 436 /* card detect pin */
437 if (data->det_pin) 437 if (gpio_is_valid(data->det_pin))
438 at91_set_gpio_input(data->det_pin, 1); 438 at91_set_gpio_input(data->det_pin, 1);
439 439
440 nand_data = *data; 440 nand_data = *data;
@@ -714,8 +714,8 @@ static void __init at91_add_device_tc(void) { }
714 714
715static struct resource rtt_resources[] = { 715static struct resource rtt_resources[] = {
716 { 716 {
717 .start = AT91_BASE_SYS + AT91_RTT, 717 .start = AT91SAM9260_BASE_RTT,
718 .end = AT91_BASE_SYS + AT91_RTT + SZ_16 - 1, 718 .end = AT91SAM9260_BASE_RTT + SZ_16 - 1,
719 .flags = IORESOURCE_MEM, 719 .flags = IORESOURCE_MEM,
720 } 720 }
721}; 721};
@@ -738,10 +738,19 @@ static void __init at91_add_device_rtt(void)
738 * -------------------------------------------------------------------- */ 738 * -------------------------------------------------------------------- */
739 739
740#if defined(CONFIG_AT91SAM9X_WATCHDOG) || defined(CONFIG_AT91SAM9X_WATCHDOG_MODULE) 740#if defined(CONFIG_AT91SAM9X_WATCHDOG) || defined(CONFIG_AT91SAM9X_WATCHDOG_MODULE)
741static struct resource wdt_resources[] = {
742 {
743 .start = AT91SAM9260_BASE_WDT,
744 .end = AT91SAM9260_BASE_WDT + SZ_16 - 1,
745 .flags = IORESOURCE_MEM,
746 }
747};
748
741static struct platform_device at91sam9260_wdt_device = { 749static struct platform_device at91sam9260_wdt_device = {
742 .name = "at91_wdt", 750 .name = "at91_wdt",
743 .id = -1, 751 .id = -1,
744 .num_resources = 0, 752 .resource = wdt_resources,
753 .num_resources = ARRAY_SIZE(wdt_resources),
745}; 754};
746 755
747static void __init at91_add_device_watchdog(void) 756static void __init at91_add_device_watchdog(void)
@@ -837,8 +846,8 @@ void __init at91_add_device_ssc(unsigned id, unsigned pins) {}
837#if defined(CONFIG_SERIAL_ATMEL) 846#if defined(CONFIG_SERIAL_ATMEL)
838static struct resource dbgu_resources[] = { 847static struct resource dbgu_resources[] = {
839 [0] = { 848 [0] = {
840 .start = AT91_BASE_SYS + AT91_DBGU, 849 .start = AT91SAM9260_BASE_DBGU,
841 .end = AT91_BASE_SYS + AT91_DBGU + SZ_512 - 1, 850 .end = AT91SAM9260_BASE_DBGU + SZ_512 - 1,
842 .flags = IORESOURCE_MEM, 851 .flags = IORESOURCE_MEM,
843 }, 852 },
844 [1] = { 853 [1] = {
@@ -1281,17 +1290,17 @@ void __init at91_add_device_cf(struct at91_cf_data *data)
1281 1290
1282 at91_sys_write(AT91_MATRIX_EBICSA, csa); 1291 at91_sys_write(AT91_MATRIX_EBICSA, csa);
1283 1292
1284 if (data->rst_pin) { 1293 if (gpio_is_valid(data->rst_pin)) {
1285 at91_set_multi_drive(data->rst_pin, 0); 1294 at91_set_multi_drive(data->rst_pin, 0);
1286 at91_set_gpio_output(data->rst_pin, 1); 1295 at91_set_gpio_output(data->rst_pin, 1);
1287 } 1296 }
1288 1297
1289 if (data->irq_pin) { 1298 if (gpio_is_valid(data->irq_pin)) {
1290 at91_set_gpio_input(data->irq_pin, 0); 1299 at91_set_gpio_input(data->irq_pin, 0);
1291 at91_set_deglitch(data->irq_pin, 1); 1300 at91_set_deglitch(data->irq_pin, 1);
1292 } 1301 }
1293 1302
1294 if (data->det_pin) { 1303 if (gpio_is_valid(data->det_pin)) {
1295 at91_set_gpio_input(data->det_pin, 0); 1304 at91_set_gpio_input(data->det_pin, 0);
1296 at91_set_deglitch(data->det_pin, 1); 1305 at91_set_deglitch(data->det_pin, 1);
1297 } 1306 }
diff --git a/arch/arm/mach-at91/at91sam9261.c b/arch/arm/mach-at91/at91sam9261.c
index 658a5185abfd..b85b9ea60170 100644
--- a/arch/arm/mach-at91/at91sam9261.c
+++ b/arch/arm/mach-at91/at91sam9261.c
@@ -11,7 +11,6 @@
11 */ 11 */
12 12
13#include <linux/module.h> 13#include <linux/module.h>
14#include <linux/pm.h>
15 14
16#include <asm/irq.h> 15#include <asm/irq.h>
17#include <asm/mach/arch.h> 16#include <asm/mach/arch.h>
@@ -20,11 +19,11 @@
20#include <mach/at91sam9261.h> 19#include <mach/at91sam9261.h>
21#include <mach/at91_pmc.h> 20#include <mach/at91_pmc.h>
22#include <mach/at91_rstc.h> 21#include <mach/at91_rstc.h>
23#include <mach/at91_shdwc.h>
24 22
25#include "soc.h" 23#include "soc.h"
26#include "generic.h" 24#include "generic.h"
27#include "clock.h" 25#include "clock.h"
26#include "sam9_smc.h"
28 27
29/* -------------------------------------------------------------------- 28/* --------------------------------------------------------------------
30 * Clocks 29 * Clocks
@@ -176,6 +175,9 @@ static struct clk_lookup periph_clocks_lookups[] = {
176 CLKDEV_CON_DEV_ID("pclk", "ssc.1", &ssc1_clk), 175 CLKDEV_CON_DEV_ID("pclk", "ssc.1", &ssc1_clk),
177 CLKDEV_CON_DEV_ID("pclk", "ssc.2", &ssc2_clk), 176 CLKDEV_CON_DEV_ID("pclk", "ssc.2", &ssc2_clk),
178 CLKDEV_CON_DEV_ID("hclk", "at91_ohci", &hck0), 177 CLKDEV_CON_DEV_ID("hclk", "at91_ohci", &hck0),
178 CLKDEV_CON_ID("pioA", &pioA_clk),
179 CLKDEV_CON_ID("pioB", &pioB_clk),
180 CLKDEV_CON_ID("pioC", &pioC_clk),
179}; 181};
180 182
181static struct clk_lookup usart_clocks_lookups[] = { 183static struct clk_lookup usart_clocks_lookups[] = {
@@ -251,28 +253,19 @@ void __init at91sam9261_set_console_clock(int id)
251 * GPIO 253 * GPIO
252 * -------------------------------------------------------------------- */ 254 * -------------------------------------------------------------------- */
253 255
254static struct at91_gpio_bank at91sam9261_gpio[] = { 256static struct at91_gpio_bank at91sam9261_gpio[] __initdata = {
255 { 257 {
256 .id = AT91SAM9261_ID_PIOA, 258 .id = AT91SAM9261_ID_PIOA,
257 .offset = AT91_PIOA, 259 .regbase = AT91SAM9261_BASE_PIOA,
258 .clock = &pioA_clk,
259 }, { 260 }, {
260 .id = AT91SAM9261_ID_PIOB, 261 .id = AT91SAM9261_ID_PIOB,
261 .offset = AT91_PIOB, 262 .regbase = AT91SAM9261_BASE_PIOB,
262 .clock = &pioB_clk,
263 }, { 263 }, {
264 .id = AT91SAM9261_ID_PIOC, 264 .id = AT91SAM9261_ID_PIOC,
265 .offset = AT91_PIOC, 265 .regbase = AT91SAM9261_BASE_PIOC,
266 .clock = &pioC_clk,
267 } 266 }
268}; 267};
269 268
270static void at91sam9261_poweroff(void)
271{
272 at91_sys_write(AT91_SHDW_CR, AT91_SHDW_KEY | AT91_SHDW_SHDW);
273}
274
275
276/* -------------------------------------------------------------------- 269/* --------------------------------------------------------------------
277 * AT91SAM9261 processor initialization 270 * AT91SAM9261 processor initialization
278 * -------------------------------------------------------------------- */ 271 * -------------------------------------------------------------------- */
@@ -285,10 +278,16 @@ static void __init at91sam9261_map_io(void)
285 at91_init_sram(0, AT91SAM9261_SRAM_BASE, AT91SAM9261_SRAM_SIZE); 278 at91_init_sram(0, AT91SAM9261_SRAM_BASE, AT91SAM9261_SRAM_SIZE);
286} 279}
287 280
281static void __init at91sam9261_ioremap_registers(void)
282{
283 at91_ioremap_shdwc(AT91SAM9261_BASE_SHDWC);
284 at91sam926x_ioremap_pit(AT91SAM9261_BASE_PIT);
285 at91sam9_ioremap_smc(0, AT91SAM9261_BASE_SMC);
286}
287
288static void __init at91sam9261_initialize(void) 288static void __init at91sam9261_initialize(void)
289{ 289{
290 at91_arch_reset = at91sam9_alt_reset; 290 arm_pm_restart = at91sam9_alt_restart;
291 pm_power_off = at91sam9261_poweroff;
292 at91_extern_irq = (1 << AT91SAM9261_ID_IRQ0) | (1 << AT91SAM9261_ID_IRQ1) 291 at91_extern_irq = (1 << AT91SAM9261_ID_IRQ0) | (1 << AT91SAM9261_ID_IRQ1)
293 | (1 << AT91SAM9261_ID_IRQ2); 292 | (1 << AT91SAM9261_ID_IRQ2);
294 293
@@ -341,6 +340,7 @@ static unsigned int at91sam9261_default_irq_priority[NR_AIC_IRQS] __initdata = {
341struct at91_init_soc __initdata at91sam9261_soc = { 340struct at91_init_soc __initdata at91sam9261_soc = {
342 .map_io = at91sam9261_map_io, 341 .map_io = at91sam9261_map_io,
343 .default_irq_priority = at91sam9261_default_irq_priority, 342 .default_irq_priority = at91sam9261_default_irq_priority,
343 .ioremap_registers = at91sam9261_ioremap_registers,
344 .register_clocks = at91sam9261_register_clocks, 344 .register_clocks = at91sam9261_register_clocks,
345 .init = at91sam9261_initialize, 345 .init = at91sam9261_initialize,
346}; 346};
diff --git a/arch/arm/mach-at91/at91sam9261_devices.c b/arch/arm/mach-at91/at91sam9261_devices.c
index a178b58b0b9c..fc59cbdb0e3c 100644
--- a/arch/arm/mach-at91/at91sam9261_devices.c
+++ b/arch/arm/mach-at91/at91sam9261_devices.c
@@ -118,7 +118,7 @@ void __init at91_add_device_udc(struct at91_udc_data *data)
118 if (!data) 118 if (!data)
119 return; 119 return;
120 120
121 if (data->vbus_pin) { 121 if (gpio_is_valid(data->vbus_pin)) {
122 at91_set_gpio_input(data->vbus_pin, 0); 122 at91_set_gpio_input(data->vbus_pin, 0);
123 at91_set_deglitch(data->vbus_pin, 1); 123 at91_set_deglitch(data->vbus_pin, 1);
124 } 124 }
@@ -171,13 +171,13 @@ void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data)
171 return; 171 return;
172 172
173 /* input/irq */ 173 /* input/irq */
174 if (data->det_pin) { 174 if (gpio_is_valid(data->det_pin)) {
175 at91_set_gpio_input(data->det_pin, 1); 175 at91_set_gpio_input(data->det_pin, 1);
176 at91_set_deglitch(data->det_pin, 1); 176 at91_set_deglitch(data->det_pin, 1);
177 } 177 }
178 if (data->wp_pin) 178 if (gpio_is_valid(data->wp_pin))
179 at91_set_gpio_input(data->wp_pin, 1); 179 at91_set_gpio_input(data->wp_pin, 1);
180 if (data->vcc_pin) 180 if (gpio_is_valid(data->vcc_pin))
181 at91_set_gpio_output(data->vcc_pin, 0); 181 at91_set_gpio_output(data->vcc_pin, 0);
182 182
183 /* CLK */ 183 /* CLK */
@@ -240,15 +240,15 @@ void __init at91_add_device_nand(struct atmel_nand_data *data)
240 at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_CS3A_SMC_SMARTMEDIA); 240 at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_CS3A_SMC_SMARTMEDIA);
241 241
242 /* enable pin */ 242 /* enable pin */
243 if (data->enable_pin) 243 if (gpio_is_valid(data->enable_pin))
244 at91_set_gpio_output(data->enable_pin, 1); 244 at91_set_gpio_output(data->enable_pin, 1);
245 245
246 /* ready/busy pin */ 246 /* ready/busy pin */
247 if (data->rdy_pin) 247 if (gpio_is_valid(data->rdy_pin))
248 at91_set_gpio_input(data->rdy_pin, 1); 248 at91_set_gpio_input(data->rdy_pin, 1);
249 249
250 /* card detect pin */ 250 /* card detect pin */
251 if (data->det_pin) 251 if (gpio_is_valid(data->det_pin))
252 at91_set_gpio_input(data->det_pin, 1); 252 at91_set_gpio_input(data->det_pin, 1);
253 253
254 at91_set_A_periph(AT91_PIN_PC0, 0); /* NANDOE */ 254 at91_set_A_periph(AT91_PIN_PC0, 0); /* NANDOE */
@@ -600,8 +600,8 @@ static void __init at91_add_device_tc(void) { }
600 600
601static struct resource rtt_resources[] = { 601static struct resource rtt_resources[] = {
602 { 602 {
603 .start = AT91_BASE_SYS + AT91_RTT, 603 .start = AT91SAM9261_BASE_RTT,
604 .end = AT91_BASE_SYS + AT91_RTT + SZ_16 - 1, 604 .end = AT91SAM9261_BASE_RTT + SZ_16 - 1,
605 .flags = IORESOURCE_MEM, 605 .flags = IORESOURCE_MEM,
606 } 606 }
607}; 607};
@@ -624,10 +624,19 @@ static void __init at91_add_device_rtt(void)
624 * -------------------------------------------------------------------- */ 624 * -------------------------------------------------------------------- */
625 625
626#if defined(CONFIG_AT91SAM9X_WATCHDOG) || defined(CONFIG_AT91SAM9X_WATCHDOG_MODULE) 626#if defined(CONFIG_AT91SAM9X_WATCHDOG) || defined(CONFIG_AT91SAM9X_WATCHDOG_MODULE)
627static struct resource wdt_resources[] = {
628 {
629 .start = AT91SAM9261_BASE_WDT,
630 .end = AT91SAM9261_BASE_WDT + SZ_16 - 1,
631 .flags = IORESOURCE_MEM,
632 }
633};
634
627static struct platform_device at91sam9261_wdt_device = { 635static struct platform_device at91sam9261_wdt_device = {
628 .name = "at91_wdt", 636 .name = "at91_wdt",
629 .id = -1, 637 .id = -1,
630 .num_resources = 0, 638 .resource = wdt_resources,
639 .num_resources = ARRAY_SIZE(wdt_resources),
631}; 640};
632 641
633static void __init at91_add_device_watchdog(void) 642static void __init at91_add_device_watchdog(void)
@@ -816,8 +825,8 @@ void __init at91_add_device_ssc(unsigned id, unsigned pins) {}
816#if defined(CONFIG_SERIAL_ATMEL) 825#if defined(CONFIG_SERIAL_ATMEL)
817static struct resource dbgu_resources[] = { 826static struct resource dbgu_resources[] = {
818 [0] = { 827 [0] = {
819 .start = AT91_BASE_SYS + AT91_DBGU, 828 .start = AT91SAM9261_BASE_DBGU,
820 .end = AT91_BASE_SYS + AT91_DBGU + SZ_512 - 1, 829 .end = AT91SAM9261_BASE_DBGU + SZ_512 - 1,
821 .flags = IORESOURCE_MEM, 830 .flags = IORESOURCE_MEM,
822 }, 831 },
823 [1] = { 832 [1] = {
diff --git a/arch/arm/mach-at91/at91sam9263.c b/arch/arm/mach-at91/at91sam9263.c
index 182d112dc59d..79e3669b1117 100644
--- a/arch/arm/mach-at91/at91sam9263.c
+++ b/arch/arm/mach-at91/at91sam9263.c
@@ -11,7 +11,6 @@
11 */ 11 */
12 12
13#include <linux/module.h> 13#include <linux/module.h>
14#include <linux/pm.h>
15 14
16#include <asm/irq.h> 15#include <asm/irq.h>
17#include <asm/mach/arch.h> 16#include <asm/mach/arch.h>
@@ -19,11 +18,11 @@
19#include <mach/at91sam9263.h> 18#include <mach/at91sam9263.h>
20#include <mach/at91_pmc.h> 19#include <mach/at91_pmc.h>
21#include <mach/at91_rstc.h> 20#include <mach/at91_rstc.h>
22#include <mach/at91_shdwc.h>
23 21
24#include "soc.h" 22#include "soc.h"
25#include "generic.h" 23#include "generic.h"
26#include "clock.h" 24#include "clock.h"
25#include "sam9_smc.h"
27 26
28/* -------------------------------------------------------------------- 27/* --------------------------------------------------------------------
29 * Clocks 28 * Clocks
@@ -193,6 +192,11 @@ static struct clk_lookup periph_clocks_lookups[] = {
193 CLKDEV_CON_DEV_ID("t0_clk", "atmel_tcb.0", &tcb_clk), 192 CLKDEV_CON_DEV_ID("t0_clk", "atmel_tcb.0", &tcb_clk),
194 /* fake hclk clock */ 193 /* fake hclk clock */
195 CLKDEV_CON_DEV_ID("hclk", "at91_ohci", &ohci_clk), 194 CLKDEV_CON_DEV_ID("hclk", "at91_ohci", &ohci_clk),
195 CLKDEV_CON_ID("pioA", &pioA_clk),
196 CLKDEV_CON_ID("pioB", &pioB_clk),
197 CLKDEV_CON_ID("pioC", &pioCDE_clk),
198 CLKDEV_CON_ID("pioD", &pioCDE_clk),
199 CLKDEV_CON_ID("pioE", &pioCDE_clk),
196}; 200};
197 201
198static struct clk_lookup usart_clocks_lookups[] = { 202static struct clk_lookup usart_clocks_lookups[] = {
@@ -265,36 +269,25 @@ void __init at91sam9263_set_console_clock(int id)
265 * GPIO 269 * GPIO
266 * -------------------------------------------------------------------- */ 270 * -------------------------------------------------------------------- */
267 271
268static struct at91_gpio_bank at91sam9263_gpio[] = { 272static struct at91_gpio_bank at91sam9263_gpio[] __initdata = {
269 { 273 {
270 .id = AT91SAM9263_ID_PIOA, 274 .id = AT91SAM9263_ID_PIOA,
271 .offset = AT91_PIOA, 275 .regbase = AT91SAM9263_BASE_PIOA,
272 .clock = &pioA_clk,
273 }, { 276 }, {
274 .id = AT91SAM9263_ID_PIOB, 277 .id = AT91SAM9263_ID_PIOB,
275 .offset = AT91_PIOB, 278 .regbase = AT91SAM9263_BASE_PIOB,
276 .clock = &pioB_clk,
277 }, { 279 }, {
278 .id = AT91SAM9263_ID_PIOCDE, 280 .id = AT91SAM9263_ID_PIOCDE,
279 .offset = AT91_PIOC, 281 .regbase = AT91SAM9263_BASE_PIOC,
280 .clock = &pioCDE_clk,
281 }, { 282 }, {
282 .id = AT91SAM9263_ID_PIOCDE, 283 .id = AT91SAM9263_ID_PIOCDE,
283 .offset = AT91_PIOD, 284 .regbase = AT91SAM9263_BASE_PIOD,
284 .clock = &pioCDE_clk,
285 }, { 285 }, {
286 .id = AT91SAM9263_ID_PIOCDE, 286 .id = AT91SAM9263_ID_PIOCDE,
287 .offset = AT91_PIOE, 287 .regbase = AT91SAM9263_BASE_PIOE,
288 .clock = &pioCDE_clk,
289 } 288 }
290}; 289};
291 290
292static void at91sam9263_poweroff(void)
293{
294 at91_sys_write(AT91_SHDW_CR, AT91_SHDW_KEY | AT91_SHDW_SHDW);
295}
296
297
298/* -------------------------------------------------------------------- 291/* --------------------------------------------------------------------
299 * AT91SAM9263 processor initialization 292 * AT91SAM9263 processor initialization
300 * -------------------------------------------------------------------- */ 293 * -------------------------------------------------------------------- */
@@ -305,10 +298,17 @@ static void __init at91sam9263_map_io(void)
305 at91_init_sram(1, AT91SAM9263_SRAM1_BASE, AT91SAM9263_SRAM1_SIZE); 298 at91_init_sram(1, AT91SAM9263_SRAM1_BASE, AT91SAM9263_SRAM1_SIZE);
306} 299}
307 300
301static void __init at91sam9263_ioremap_registers(void)
302{
303 at91_ioremap_shdwc(AT91SAM9263_BASE_SHDWC);
304 at91sam926x_ioremap_pit(AT91SAM9263_BASE_PIT);
305 at91sam9_ioremap_smc(0, AT91SAM9263_BASE_SMC0);
306 at91sam9_ioremap_smc(1, AT91SAM9263_BASE_SMC1);
307}
308
308static void __init at91sam9263_initialize(void) 309static void __init at91sam9263_initialize(void)
309{ 310{
310 at91_arch_reset = at91sam9_alt_reset; 311 arm_pm_restart = at91sam9_alt_restart;
311 pm_power_off = at91sam9263_poweroff;
312 at91_extern_irq = (1 << AT91SAM9263_ID_IRQ0) | (1 << AT91SAM9263_ID_IRQ1); 312 at91_extern_irq = (1 << AT91SAM9263_ID_IRQ0) | (1 << AT91SAM9263_ID_IRQ1);
313 313
314 /* Register GPIO subsystem */ 314 /* Register GPIO subsystem */
@@ -360,6 +360,7 @@ static unsigned int at91sam9263_default_irq_priority[NR_AIC_IRQS] __initdata = {
360struct at91_init_soc __initdata at91sam9263_soc = { 360struct at91_init_soc __initdata at91sam9263_soc = {
361 .map_io = at91sam9263_map_io, 361 .map_io = at91sam9263_map_io,
362 .default_irq_priority = at91sam9263_default_irq_priority, 362 .default_irq_priority = at91sam9263_default_irq_priority,
363 .ioremap_registers = at91sam9263_ioremap_registers,
363 .register_clocks = at91sam9263_register_clocks, 364 .register_clocks = at91sam9263_register_clocks,
364 .init = at91sam9263_initialize, 365 .init = at91sam9263_initialize,
365}; 366};
diff --git a/arch/arm/mach-at91/at91sam9263_devices.c b/arch/arm/mach-at91/at91sam9263_devices.c
index 183b5f17f55e..7b46b2787022 100644
--- a/arch/arm/mach-at91/at91sam9263_devices.c
+++ b/arch/arm/mach-at91/at91sam9263_devices.c
@@ -70,7 +70,7 @@ void __init at91_add_device_usbh(struct at91_usbh_data *data)
70 70
71 /* Enable VBus control for UHP ports */ 71 /* Enable VBus control for UHP ports */
72 for (i = 0; i < data->ports; i++) { 72 for (i = 0; i < data->ports; i++) {
73 if (data->vbus_pin[i]) 73 if (gpio_is_valid(data->vbus_pin[i]))
74 at91_set_gpio_output(data->vbus_pin[i], 0); 74 at91_set_gpio_output(data->vbus_pin[i], 0);
75 } 75 }
76 76
@@ -123,7 +123,7 @@ void __init at91_add_device_udc(struct at91_udc_data *data)
123 if (!data) 123 if (!data)
124 return; 124 return;
125 125
126 if (data->vbus_pin) { 126 if (gpio_is_valid(data->vbus_pin)) {
127 at91_set_gpio_input(data->vbus_pin, 0); 127 at91_set_gpio_input(data->vbus_pin, 0);
128 at91_set_deglitch(data->vbus_pin, 1); 128 at91_set_deglitch(data->vbus_pin, 1);
129 } 129 }
@@ -176,7 +176,7 @@ void __init at91_add_device_eth(struct macb_platform_data *data)
176 if (!data) 176 if (!data)
177 return; 177 return;
178 178
179 if (data->phy_irq_pin) { 179 if (gpio_is_valid(data->phy_irq_pin)) {
180 at91_set_gpio_input(data->phy_irq_pin, 0); 180 at91_set_gpio_input(data->phy_irq_pin, 0);
181 at91_set_deglitch(data->phy_irq_pin, 1); 181 at91_set_deglitch(data->phy_irq_pin, 1);
182 } 182 }
@@ -276,13 +276,13 @@ void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data)
276 return; 276 return;
277 277
278 /* input/irq */ 278 /* input/irq */
279 if (data->det_pin) { 279 if (gpio_is_valid(data->det_pin)) {
280 at91_set_gpio_input(data->det_pin, 1); 280 at91_set_gpio_input(data->det_pin, 1);
281 at91_set_deglitch(data->det_pin, 1); 281 at91_set_deglitch(data->det_pin, 1);
282 } 282 }
283 if (data->wp_pin) 283 if (gpio_is_valid(data->wp_pin))
284 at91_set_gpio_input(data->wp_pin, 1); 284 at91_set_gpio_input(data->wp_pin, 1);
285 if (data->vcc_pin) 285 if (gpio_is_valid(data->vcc_pin))
286 at91_set_gpio_output(data->vcc_pin, 0); 286 at91_set_gpio_output(data->vcc_pin, 0);
287 287
288 if (mmc_id == 0) { /* MCI0 */ 288 if (mmc_id == 0) { /* MCI0 */
@@ -430,17 +430,17 @@ void __init at91_add_device_cf(struct at91_cf_data *data)
430 } 430 }
431 at91_sys_write(AT91_MATRIX_EBI0CSA, ebi0_csa); 431 at91_sys_write(AT91_MATRIX_EBI0CSA, ebi0_csa);
432 432
433 if (data->det_pin) { 433 if (gpio_is_valid(data->det_pin)) {
434 at91_set_gpio_input(data->det_pin, 1); 434 at91_set_gpio_input(data->det_pin, 1);
435 at91_set_deglitch(data->det_pin, 1); 435 at91_set_deglitch(data->det_pin, 1);
436 } 436 }
437 437
438 if (data->irq_pin) { 438 if (gpio_is_valid(data->irq_pin)) {
439 at91_set_gpio_input(data->irq_pin, 1); 439 at91_set_gpio_input(data->irq_pin, 1);
440 at91_set_deglitch(data->irq_pin, 1); 440 at91_set_deglitch(data->irq_pin, 1);
441 } 441 }
442 442
443 if (data->vcc_pin) 443 if (gpio_is_valid(data->vcc_pin))
444 /* initially off */ 444 /* initially off */
445 at91_set_gpio_output(data->vcc_pin, 0); 445 at91_set_gpio_output(data->vcc_pin, 0);
446 446
@@ -473,8 +473,8 @@ static struct resource nand_resources[] = {
473 .flags = IORESOURCE_MEM, 473 .flags = IORESOURCE_MEM,
474 }, 474 },
475 [1] = { 475 [1] = {
476 .start = AT91_BASE_SYS + AT91_ECC0, 476 .start = AT91SAM9263_BASE_ECC0,
477 .end = AT91_BASE_SYS + AT91_ECC0 + SZ_512 - 1, 477 .end = AT91SAM9263_BASE_ECC0 + SZ_512 - 1,
478 .flags = IORESOURCE_MEM, 478 .flags = IORESOURCE_MEM,
479 } 479 }
480}; 480};
@@ -500,15 +500,15 @@ void __init at91_add_device_nand(struct atmel_nand_data *data)
500 at91_sys_write(AT91_MATRIX_EBI0CSA, csa | AT91_MATRIX_EBI0_CS3A_SMC_SMARTMEDIA); 500 at91_sys_write(AT91_MATRIX_EBI0CSA, csa | AT91_MATRIX_EBI0_CS3A_SMC_SMARTMEDIA);
501 501
502 /* enable pin */ 502 /* enable pin */
503 if (data->enable_pin) 503 if (gpio_is_valid(data->enable_pin))
504 at91_set_gpio_output(data->enable_pin, 1); 504 at91_set_gpio_output(data->enable_pin, 1);
505 505
506 /* ready/busy pin */ 506 /* ready/busy pin */
507 if (data->rdy_pin) 507 if (gpio_is_valid(data->rdy_pin))
508 at91_set_gpio_input(data->rdy_pin, 1); 508 at91_set_gpio_input(data->rdy_pin, 1);
509 509
510 /* card detect pin */ 510 /* card detect pin */
511 if (data->det_pin) 511 if (gpio_is_valid(data->det_pin))
512 at91_set_gpio_input(data->det_pin, 1); 512 at91_set_gpio_input(data->det_pin, 1);
513 513
514 nand_data = *data; 514 nand_data = *data;
@@ -749,7 +749,7 @@ void __init at91_add_device_ac97(struct ac97c_platform_data *data)
749 at91_set_A_periph(AT91_PIN_PB3, 0); /* AC97RX */ 749 at91_set_A_periph(AT91_PIN_PB3, 0); /* AC97RX */
750 750
751 /* reset */ 751 /* reset */
752 if (data->reset_pin) 752 if (gpio_is_valid(data->reset_pin))
753 at91_set_gpio_output(data->reset_pin, 0); 753 at91_set_gpio_output(data->reset_pin, 0);
754 754
755 ac97_data = *data; 755 ac97_data = *data;
@@ -956,8 +956,8 @@ static void __init at91_add_device_tc(void) { }
956 956
957static struct resource rtt0_resources[] = { 957static struct resource rtt0_resources[] = {
958 { 958 {
959 .start = AT91_BASE_SYS + AT91_RTT0, 959 .start = AT91SAM9263_BASE_RTT0,
960 .end = AT91_BASE_SYS + AT91_RTT0 + SZ_16 - 1, 960 .end = AT91SAM9263_BASE_RTT0 + SZ_16 - 1,
961 .flags = IORESOURCE_MEM, 961 .flags = IORESOURCE_MEM,
962 } 962 }
963}; 963};
@@ -971,8 +971,8 @@ static struct platform_device at91sam9263_rtt0_device = {
971 971
972static struct resource rtt1_resources[] = { 972static struct resource rtt1_resources[] = {
973 { 973 {
974 .start = AT91_BASE_SYS + AT91_RTT1, 974 .start = AT91SAM9263_BASE_RTT1,
975 .end = AT91_BASE_SYS + AT91_RTT1 + SZ_16 - 1, 975 .end = AT91SAM9263_BASE_RTT1 + SZ_16 - 1,
976 .flags = IORESOURCE_MEM, 976 .flags = IORESOURCE_MEM,
977 } 977 }
978}; 978};
@@ -996,10 +996,19 @@ static void __init at91_add_device_rtt(void)
996 * -------------------------------------------------------------------- */ 996 * -------------------------------------------------------------------- */
997 997
998#if defined(CONFIG_AT91SAM9X_WATCHDOG) || defined(CONFIG_AT91SAM9X_WATCHDOG_MODULE) 998#if defined(CONFIG_AT91SAM9X_WATCHDOG) || defined(CONFIG_AT91SAM9X_WATCHDOG_MODULE)
999static struct resource wdt_resources[] = {
1000 {
1001 .start = AT91SAM9263_BASE_WDT,
1002 .end = AT91SAM9263_BASE_WDT + SZ_16 - 1,
1003 .flags = IORESOURCE_MEM,
1004 }
1005};
1006
999static struct platform_device at91sam9263_wdt_device = { 1007static struct platform_device at91sam9263_wdt_device = {
1000 .name = "at91_wdt", 1008 .name = "at91_wdt",
1001 .id = -1, 1009 .id = -1,
1002 .num_resources = 0, 1010 .resource = wdt_resources,
1011 .num_resources = ARRAY_SIZE(wdt_resources),
1003}; 1012};
1004 1013
1005static void __init at91_add_device_watchdog(void) 1014static void __init at91_add_device_watchdog(void)
@@ -1196,8 +1205,8 @@ void __init at91_add_device_ssc(unsigned id, unsigned pins) {}
1196 1205
1197static struct resource dbgu_resources[] = { 1206static struct resource dbgu_resources[] = {
1198 [0] = { 1207 [0] = {
1199 .start = AT91_BASE_SYS + AT91_DBGU, 1208 .start = AT91SAM9263_BASE_DBGU,
1200 .end = AT91_BASE_SYS + AT91_DBGU + SZ_512 - 1, 1209 .end = AT91SAM9263_BASE_DBGU + SZ_512 - 1,
1201 .flags = IORESOURCE_MEM, 1210 .flags = IORESOURCE_MEM,
1202 }, 1211 },
1203 [1] = { 1212 [1] = {
diff --git a/arch/arm/mach-at91/at91sam926x_time.c b/arch/arm/mach-at91/at91sam926x_time.c
index 4ba85499fa97..d89ead740a99 100644
--- a/arch/arm/mach-at91/at91sam926x_time.c
+++ b/arch/arm/mach-at91/at91sam926x_time.c
@@ -25,7 +25,17 @@
25 25
26static u32 pit_cycle; /* write-once */ 26static u32 pit_cycle; /* write-once */
27static u32 pit_cnt; /* access only w/system irq blocked */ 27static u32 pit_cnt; /* access only w/system irq blocked */
28static void __iomem *pit_base_addr __read_mostly;
28 29
30static inline unsigned int pit_read(unsigned int reg_offset)
31{
32 return __raw_readl(pit_base_addr + reg_offset);
33}
34
35static inline void pit_write(unsigned int reg_offset, unsigned long value)
36{
37 __raw_writel(value, pit_base_addr + reg_offset);
38}
29 39
30/* 40/*
31 * Clocksource: just a monotonic counter of MCK/16 cycles. 41 * Clocksource: just a monotonic counter of MCK/16 cycles.
@@ -39,7 +49,7 @@ static cycle_t read_pit_clk(struct clocksource *cs)
39 49
40 raw_local_irq_save(flags); 50 raw_local_irq_save(flags);
41 elapsed = pit_cnt; 51 elapsed = pit_cnt;
42 t = at91_sys_read(AT91_PIT_PIIR); 52 t = pit_read(AT91_PIT_PIIR);
43 raw_local_irq_restore(flags); 53 raw_local_irq_restore(flags);
44 54
45 elapsed += PIT_PICNT(t) * pit_cycle; 55 elapsed += PIT_PICNT(t) * pit_cycle;
@@ -64,8 +74,8 @@ pit_clkevt_mode(enum clock_event_mode mode, struct clock_event_device *dev)
64 switch (mode) { 74 switch (mode) {
65 case CLOCK_EVT_MODE_PERIODIC: 75 case CLOCK_EVT_MODE_PERIODIC:
66 /* update clocksource counter */ 76 /* update clocksource counter */
67 pit_cnt += pit_cycle * PIT_PICNT(at91_sys_read(AT91_PIT_PIVR)); 77 pit_cnt += pit_cycle * PIT_PICNT(pit_read(AT91_PIT_PIVR));
68 at91_sys_write(AT91_PIT_MR, (pit_cycle - 1) | AT91_PIT_PITEN 78 pit_write(AT91_PIT_MR, (pit_cycle - 1) | AT91_PIT_PITEN
69 | AT91_PIT_PITIEN); 79 | AT91_PIT_PITIEN);
70 break; 80 break;
71 case CLOCK_EVT_MODE_ONESHOT: 81 case CLOCK_EVT_MODE_ONESHOT:
@@ -74,7 +84,7 @@ pit_clkevt_mode(enum clock_event_mode mode, struct clock_event_device *dev)
74 case CLOCK_EVT_MODE_SHUTDOWN: 84 case CLOCK_EVT_MODE_SHUTDOWN:
75 case CLOCK_EVT_MODE_UNUSED: 85 case CLOCK_EVT_MODE_UNUSED:
76 /* disable irq, leaving the clocksource active */ 86 /* disable irq, leaving the clocksource active */
77 at91_sys_write(AT91_PIT_MR, (pit_cycle - 1) | AT91_PIT_PITEN); 87 pit_write(AT91_PIT_MR, (pit_cycle - 1) | AT91_PIT_PITEN);
78 break; 88 break;
79 case CLOCK_EVT_MODE_RESUME: 89 case CLOCK_EVT_MODE_RESUME:
80 break; 90 break;
@@ -103,11 +113,11 @@ static irqreturn_t at91sam926x_pit_interrupt(int irq, void *dev_id)
103 113
104 /* The PIT interrupt may be disabled, and is shared */ 114 /* The PIT interrupt may be disabled, and is shared */
105 if ((pit_clkevt.mode == CLOCK_EVT_MODE_PERIODIC) 115 if ((pit_clkevt.mode == CLOCK_EVT_MODE_PERIODIC)
106 && (at91_sys_read(AT91_PIT_SR) & AT91_PIT_PITS)) { 116 && (pit_read(AT91_PIT_SR) & AT91_PIT_PITS)) {
107 unsigned nr_ticks; 117 unsigned nr_ticks;
108 118
109 /* Get number of ticks performed before irq, and ack it */ 119 /* Get number of ticks performed before irq, and ack it */
110 nr_ticks = PIT_PICNT(at91_sys_read(AT91_PIT_PIVR)); 120 nr_ticks = PIT_PICNT(pit_read(AT91_PIT_PIVR));
111 do { 121 do {
112 pit_cnt += pit_cycle; 122 pit_cnt += pit_cycle;
113 pit_clkevt.event_handler(&pit_clkevt); 123 pit_clkevt.event_handler(&pit_clkevt);
@@ -129,14 +139,14 @@ static struct irqaction at91sam926x_pit_irq = {
129static void at91sam926x_pit_reset(void) 139static void at91sam926x_pit_reset(void)
130{ 140{
131 /* Disable timer and irqs */ 141 /* Disable timer and irqs */
132 at91_sys_write(AT91_PIT_MR, 0); 142 pit_write(AT91_PIT_MR, 0);
133 143
134 /* Clear any pending interrupts, wait for PIT to stop counting */ 144 /* Clear any pending interrupts, wait for PIT to stop counting */
135 while (PIT_CPIV(at91_sys_read(AT91_PIT_PIVR)) != 0) 145 while (PIT_CPIV(pit_read(AT91_PIT_PIVR)) != 0)
136 cpu_relax(); 146 cpu_relax();
137 147
138 /* Start PIT but don't enable IRQ */ 148 /* Start PIT but don't enable IRQ */
139 at91_sys_write(AT91_PIT_MR, (pit_cycle - 1) | AT91_PIT_PITEN); 149 pit_write(AT91_PIT_MR, (pit_cycle - 1) | AT91_PIT_PITEN);
140} 150}
141 151
142/* 152/*
@@ -178,7 +188,15 @@ static void __init at91sam926x_pit_init(void)
178static void at91sam926x_pit_suspend(void) 188static void at91sam926x_pit_suspend(void)
179{ 189{
180 /* Disable timer */ 190 /* Disable timer */
181 at91_sys_write(AT91_PIT_MR, 0); 191 pit_write(AT91_PIT_MR, 0);
192}
193
194void __init at91sam926x_ioremap_pit(u32 addr)
195{
196 pit_base_addr = ioremap(addr, 16);
197
198 if (!pit_base_addr)
199 panic("Impossible to ioremap PIT\n");
182} 200}
183 201
184struct sys_timer at91sam926x_timer = { 202struct sys_timer at91sam926x_timer = {
diff --git a/arch/arm/mach-at91/at91sam9_alt_reset.S b/arch/arm/mach-at91/at91sam9_alt_reset.S
index e0256deb91fb..d3f931c5942e 100644
--- a/arch/arm/mach-at91/at91sam9_alt_reset.S
+++ b/arch/arm/mach-at91/at91sam9_alt_reset.S
@@ -14,20 +14,15 @@
14 */ 14 */
15 15
16#include <linux/linkage.h> 16#include <linux/linkage.h>
17#include <asm/system.h>
18#include <mach/hardware.h> 17#include <mach/hardware.h>
19#include <mach/at91sam9_sdramc.h> 18#include <mach/at91sam9_sdramc.h>
20#include <mach/at91_rstc.h> 19#include <mach/at91_rstc.h>
21 20
22 .arm 21 .arm
23 22
24 .globl at91sam9_alt_reset 23 .globl at91sam9_alt_restart
25 24
26at91sam9_alt_reset: mrc p15, 0, r0, c1, c0, 0 25at91sam9_alt_restart: ldr r0, .at91_va_base_sdramc @ preload constants
27 orr r0, r0, #CR_I
28 mcr p15, 0, r0, c1, c0, 0 @ enable I-cache
29
30 ldr r0, .at91_va_base_sdramc @ preload constants
31 ldr r1, .at91_va_base_rstc_cr 26 ldr r1, .at91_va_base_rstc_cr
32 27
33 mov r2, #1 28 mov r2, #1
diff --git a/arch/arm/mach-at91/at91sam9g45.c b/arch/arm/mach-at91/at91sam9g45.c
index 5a0e522ffa94..7032dd32cdf0 100644
--- a/arch/arm/mach-at91/at91sam9g45.c
+++ b/arch/arm/mach-at91/at91sam9g45.c
@@ -11,7 +11,6 @@
11 */ 11 */
12 12
13#include <linux/module.h> 13#include <linux/module.h>
14#include <linux/pm.h>
15#include <linux/dma-mapping.h> 14#include <linux/dma-mapping.h>
16 15
17#include <asm/irq.h> 16#include <asm/irq.h>
@@ -20,12 +19,12 @@
20#include <mach/at91sam9g45.h> 19#include <mach/at91sam9g45.h>
21#include <mach/at91_pmc.h> 20#include <mach/at91_pmc.h>
22#include <mach/at91_rstc.h> 21#include <mach/at91_rstc.h>
23#include <mach/at91_shdwc.h>
24#include <mach/cpu.h> 22#include <mach/cpu.h>
25 23
26#include "soc.h" 24#include "soc.h"
27#include "generic.h" 25#include "generic.h"
28#include "clock.h" 26#include "clock.h"
27#include "sam9_smc.h"
29 28
30/* -------------------------------------------------------------------- 29/* --------------------------------------------------------------------
31 * Clocks 30 * Clocks
@@ -233,6 +232,11 @@ static struct clk_lookup periph_clocks_lookups[] = {
233 CLKDEV_CON_DEV_ID("usart", "fff98000.serial", &usart3_clk), 232 CLKDEV_CON_DEV_ID("usart", "fff98000.serial", &usart3_clk),
234 /* fake hclk clock */ 233 /* fake hclk clock */
235 CLKDEV_CON_DEV_ID("hclk", "at91_ohci", &uhphs_clk), 234 CLKDEV_CON_DEV_ID("hclk", "at91_ohci", &uhphs_clk),
235 CLKDEV_CON_ID("pioA", &pioA_clk),
236 CLKDEV_CON_ID("pioB", &pioB_clk),
237 CLKDEV_CON_ID("pioC", &pioC_clk),
238 CLKDEV_CON_ID("pioD", &pioDE_clk),
239 CLKDEV_CON_ID("pioE", &pioDE_clk),
236}; 240};
237 241
238static struct clk_lookup usart_clocks_lookups[] = { 242static struct clk_lookup usart_clocks_lookups[] = {
@@ -295,41 +299,30 @@ void __init at91sam9g45_set_console_clock(int id)
295 * GPIO 299 * GPIO
296 * -------------------------------------------------------------------- */ 300 * -------------------------------------------------------------------- */
297 301
298static struct at91_gpio_bank at91sam9g45_gpio[] = { 302static struct at91_gpio_bank at91sam9g45_gpio[] __initdata = {
299 { 303 {
300 .id = AT91SAM9G45_ID_PIOA, 304 .id = AT91SAM9G45_ID_PIOA,
301 .offset = AT91_PIOA, 305 .regbase = AT91SAM9G45_BASE_PIOA,
302 .clock = &pioA_clk,
303 }, { 306 }, {
304 .id = AT91SAM9G45_ID_PIOB, 307 .id = AT91SAM9G45_ID_PIOB,
305 .offset = AT91_PIOB, 308 .regbase = AT91SAM9G45_BASE_PIOB,
306 .clock = &pioB_clk,
307 }, { 309 }, {
308 .id = AT91SAM9G45_ID_PIOC, 310 .id = AT91SAM9G45_ID_PIOC,
309 .offset = AT91_PIOC, 311 .regbase = AT91SAM9G45_BASE_PIOC,
310 .clock = &pioC_clk,
311 }, { 312 }, {
312 .id = AT91SAM9G45_ID_PIODE, 313 .id = AT91SAM9G45_ID_PIODE,
313 .offset = AT91_PIOD, 314 .regbase = AT91SAM9G45_BASE_PIOD,
314 .clock = &pioDE_clk,
315 }, { 315 }, {
316 .id = AT91SAM9G45_ID_PIODE, 316 .id = AT91SAM9G45_ID_PIODE,
317 .offset = AT91_PIOE, 317 .regbase = AT91SAM9G45_BASE_PIOE,
318 .clock = &pioDE_clk,
319 } 318 }
320}; 319};
321 320
322static void at91sam9g45_reset(void) 321static void at91sam9g45_restart(char mode, const char *cmd)
323{ 322{
324 at91_sys_write(AT91_RSTC_CR, AT91_RSTC_KEY | AT91_RSTC_PROCRST | AT91_RSTC_PERRST); 323 at91_sys_write(AT91_RSTC_CR, AT91_RSTC_KEY | AT91_RSTC_PROCRST | AT91_RSTC_PERRST);
325} 324}
326 325
327static void at91sam9g45_poweroff(void)
328{
329 at91_sys_write(AT91_SHDW_CR, AT91_SHDW_KEY | AT91_SHDW_SHDW);
330}
331
332
333/* -------------------------------------------------------------------- 326/* --------------------------------------------------------------------
334 * AT91SAM9G45 processor initialization 327 * AT91SAM9G45 processor initialization
335 * -------------------------------------------------------------------- */ 328 * -------------------------------------------------------------------- */
@@ -340,10 +333,16 @@ static void __init at91sam9g45_map_io(void)
340 init_consistent_dma_size(SZ_4M); 333 init_consistent_dma_size(SZ_4M);
341} 334}
342 335
336static void __init at91sam9g45_ioremap_registers(void)
337{
338 at91_ioremap_shdwc(AT91SAM9G45_BASE_SHDWC);
339 at91sam926x_ioremap_pit(AT91SAM9G45_BASE_PIT);
340 at91sam9_ioremap_smc(0, AT91SAM9G45_BASE_SMC);
341}
342
343static void __init at91sam9g45_initialize(void) 343static void __init at91sam9g45_initialize(void)
344{ 344{
345 at91_arch_reset = at91sam9g45_reset; 345 arm_pm_restart = at91sam9g45_restart;
346 pm_power_off = at91sam9g45_poweroff;
347 at91_extern_irq = (1 << AT91SAM9G45_ID_IRQ0); 346 at91_extern_irq = (1 << AT91SAM9G45_ID_IRQ0);
348 347
349 /* Register GPIO subsystem */ 348 /* Register GPIO subsystem */
@@ -395,6 +394,7 @@ static unsigned int at91sam9g45_default_irq_priority[NR_AIC_IRQS] __initdata = {
395struct at91_init_soc __initdata at91sam9g45_soc = { 394struct at91_init_soc __initdata at91sam9g45_soc = {
396 .map_io = at91sam9g45_map_io, 395 .map_io = at91sam9g45_map_io,
397 .default_irq_priority = at91sam9g45_default_irq_priority, 396 .default_irq_priority = at91sam9g45_default_irq_priority,
397 .ioremap_registers = at91sam9g45_ioremap_registers,
398 .register_clocks = at91sam9g45_register_clocks, 398 .register_clocks = at91sam9g45_register_clocks,
399 .init = at91sam9g45_initialize, 399 .init = at91sam9g45_initialize,
400}; 400};
diff --git a/arch/arm/mach-at91/at91sam9g45_devices.c b/arch/arm/mach-at91/at91sam9g45_devices.c
index e2cb835c4d7c..b7582dd10dc3 100644
--- a/arch/arm/mach-at91/at91sam9g45_devices.c
+++ b/arch/arm/mach-at91/at91sam9g45_devices.c
@@ -44,8 +44,8 @@ static struct at_dma_platform_data atdma_pdata = {
44 44
45static struct resource hdmac_resources[] = { 45static struct resource hdmac_resources[] = {
46 [0] = { 46 [0] = {
47 .start = AT91_BASE_SYS + AT91_DMA, 47 .start = AT91SAM9G45_BASE_DMA,
48 .end = AT91_BASE_SYS + AT91_DMA + SZ_512 - 1, 48 .end = AT91SAM9G45_BASE_DMA + SZ_512 - 1,
49 .flags = IORESOURCE_MEM, 49 .flags = IORESOURCE_MEM,
50 }, 50 },
51 [1] = { 51 [1] = {
@@ -120,7 +120,7 @@ void __init at91_add_device_usbh_ohci(struct at91_usbh_data *data)
120 120
121 /* Enable VBus control for UHP ports */ 121 /* Enable VBus control for UHP ports */
122 for (i = 0; i < data->ports; i++) { 122 for (i = 0; i < data->ports; i++) {
123 if (data->vbus_pin[i]) 123 if (gpio_is_valid(data->vbus_pin[i]))
124 at91_set_gpio_output(data->vbus_pin[i], 0); 124 at91_set_gpio_output(data->vbus_pin[i], 0);
125 } 125 }
126 126
@@ -181,7 +181,7 @@ void __init at91_add_device_usbh_ehci(struct at91_usbh_data *data)
181 181
182 /* Enable VBus control for UHP ports */ 182 /* Enable VBus control for UHP ports */
183 for (i = 0; i < data->ports; i++) { 183 for (i = 0; i < data->ports; i++) {
184 if (data->vbus_pin[i]) 184 if (gpio_is_valid(data->vbus_pin[i]))
185 at91_set_gpio_output(data->vbus_pin[i], 0); 185 at91_set_gpio_output(data->vbus_pin[i], 0);
186 } 186 }
187 187
@@ -263,7 +263,7 @@ void __init at91_add_device_usba(struct usba_platform_data *data)
263 usba_udc_data.pdata.num_ep = ARRAY_SIZE(usba_udc_ep); 263 usba_udc_data.pdata.num_ep = ARRAY_SIZE(usba_udc_ep);
264 memcpy(usba_udc_data.ep, usba_udc_ep, sizeof(usba_udc_ep)); 264 memcpy(usba_udc_data.ep, usba_udc_ep, sizeof(usba_udc_ep));
265 265
266 if (data && data->vbus_pin > 0) { 266 if (data && gpio_is_valid(data->vbus_pin)) {
267 at91_set_gpio_input(data->vbus_pin, 0); 267 at91_set_gpio_input(data->vbus_pin, 0);
268 at91_set_deglitch(data->vbus_pin, 1); 268 at91_set_deglitch(data->vbus_pin, 1);
269 usba_udc_data.pdata.vbus_pin = data->vbus_pin; 269 usba_udc_data.pdata.vbus_pin = data->vbus_pin;
@@ -316,7 +316,7 @@ void __init at91_add_device_eth(struct macb_platform_data *data)
316 if (!data) 316 if (!data)
317 return; 317 return;
318 318
319 if (data->phy_irq_pin) { 319 if (gpio_is_valid(data->phy_irq_pin)) {
320 at91_set_gpio_input(data->phy_irq_pin, 0); 320 at91_set_gpio_input(data->phy_irq_pin, 0);
321 at91_set_deglitch(data->phy_irq_pin, 1); 321 at91_set_deglitch(data->phy_irq_pin, 1);
322 } 322 }
@@ -449,11 +449,11 @@ void __init at91_add_device_mci(short mmc_id, struct mci_platform_data *data)
449 449
450 450
451 /* input/irq */ 451 /* input/irq */
452 if (data->slot[0].detect_pin) { 452 if (gpio_is_valid(data->slot[0].detect_pin)) {
453 at91_set_gpio_input(data->slot[0].detect_pin, 1); 453 at91_set_gpio_input(data->slot[0].detect_pin, 1);
454 at91_set_deglitch(data->slot[0].detect_pin, 1); 454 at91_set_deglitch(data->slot[0].detect_pin, 1);
455 } 455 }
456 if (data->slot[0].wp_pin) 456 if (gpio_is_valid(data->slot[0].wp_pin))
457 at91_set_gpio_input(data->slot[0].wp_pin, 1); 457 at91_set_gpio_input(data->slot[0].wp_pin, 1);
458 458
459 if (mmc_id == 0) { /* MCI0 */ 459 if (mmc_id == 0) { /* MCI0 */
@@ -529,8 +529,8 @@ static struct resource nand_resources[] = {
529 .flags = IORESOURCE_MEM, 529 .flags = IORESOURCE_MEM,
530 }, 530 },
531 [1] = { 531 [1] = {
532 .start = AT91_BASE_SYS + AT91_ECC, 532 .start = AT91SAM9G45_BASE_ECC,
533 .end = AT91_BASE_SYS + AT91_ECC + SZ_512 - 1, 533 .end = AT91SAM9G45_BASE_ECC + SZ_512 - 1,
534 .flags = IORESOURCE_MEM, 534 .flags = IORESOURCE_MEM,
535 } 535 }
536}; 536};
@@ -556,15 +556,15 @@ void __init at91_add_device_nand(struct atmel_nand_data *data)
556 at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_EBI_CS3A_SMC_SMARTMEDIA); 556 at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_EBI_CS3A_SMC_SMARTMEDIA);
557 557
558 /* enable pin */ 558 /* enable pin */
559 if (data->enable_pin) 559 if (gpio_is_valid(data->enable_pin))
560 at91_set_gpio_output(data->enable_pin, 1); 560 at91_set_gpio_output(data->enable_pin, 1);
561 561
562 /* ready/busy pin */ 562 /* ready/busy pin */
563 if (data->rdy_pin) 563 if (gpio_is_valid(data->rdy_pin))
564 at91_set_gpio_input(data->rdy_pin, 1); 564 at91_set_gpio_input(data->rdy_pin, 1);
565 565
566 /* card detect pin */ 566 /* card detect pin */
567 if (data->det_pin) 567 if (gpio_is_valid(data->det_pin))
568 at91_set_gpio_input(data->det_pin, 1); 568 at91_set_gpio_input(data->det_pin, 1);
569 569
570 nand_data = *data; 570 nand_data = *data;
@@ -859,7 +859,7 @@ void __init at91_add_device_ac97(struct ac97c_platform_data *data)
859 at91_set_A_periph(AT91_PIN_PD6, 0); /* AC97RX */ 859 at91_set_A_periph(AT91_PIN_PD6, 0); /* AC97RX */
860 860
861 /* reset */ 861 /* reset */
862 if (data->reset_pin) 862 if (gpio_is_valid(data->reset_pin))
863 at91_set_gpio_output(data->reset_pin, 0); 863 at91_set_gpio_output(data->reset_pin, 0);
864 864
865 ac97_data = *data; 865 ac97_data = *data;
@@ -1009,10 +1009,24 @@ static void __init at91_add_device_tc(void) { }
1009 * -------------------------------------------------------------------- */ 1009 * -------------------------------------------------------------------- */
1010 1010
1011#if defined(CONFIG_RTC_DRV_AT91RM9200) || defined(CONFIG_RTC_DRV_AT91RM9200_MODULE) 1011#if defined(CONFIG_RTC_DRV_AT91RM9200) || defined(CONFIG_RTC_DRV_AT91RM9200_MODULE)
1012static struct resource rtc_resources[] = {
1013 [0] = {
1014 .start = AT91SAM9G45_BASE_RTC,
1015 .end = AT91SAM9G45_BASE_RTC + SZ_256 - 1,
1016 .flags = IORESOURCE_MEM,
1017 },
1018 [1] = {
1019 .start = AT91_ID_SYS,
1020 .end = AT91_ID_SYS,
1021 .flags = IORESOURCE_IRQ,
1022 },
1023};
1024
1012static struct platform_device at91sam9g45_rtc_device = { 1025static struct platform_device at91sam9g45_rtc_device = {
1013 .name = "at91_rtc", 1026 .name = "at91_rtc",
1014 .id = -1, 1027 .id = -1,
1015 .num_resources = 0, 1028 .resource = rtc_resources,
1029 .num_resources = ARRAY_SIZE(rtc_resources),
1016}; 1030};
1017 1031
1018static void __init at91_add_device_rtc(void) 1032static void __init at91_add_device_rtc(void)
@@ -1081,8 +1095,8 @@ void __init at91_add_device_tsadcc(struct at91_tsadcc_data *data) {}
1081 1095
1082static struct resource rtt_resources[] = { 1096static struct resource rtt_resources[] = {
1083 { 1097 {
1084 .start = AT91_BASE_SYS + AT91_RTT, 1098 .start = AT91SAM9G45_BASE_RTT,
1085 .end = AT91_BASE_SYS + AT91_RTT + SZ_16 - 1, 1099 .end = AT91SAM9G45_BASE_RTT + SZ_16 - 1,
1086 .flags = IORESOURCE_MEM, 1100 .flags = IORESOURCE_MEM,
1087 } 1101 }
1088}; 1102};
@@ -1133,10 +1147,19 @@ static void __init at91_add_device_trng(void) {}
1133 * -------------------------------------------------------------------- */ 1147 * -------------------------------------------------------------------- */
1134 1148
1135#if defined(CONFIG_AT91SAM9X_WATCHDOG) || defined(CONFIG_AT91SAM9X_WATCHDOG_MODULE) 1149#if defined(CONFIG_AT91SAM9X_WATCHDOG) || defined(CONFIG_AT91SAM9X_WATCHDOG_MODULE)
1150static struct resource wdt_resources[] = {
1151 {
1152 .start = AT91SAM9G45_BASE_WDT,
1153 .end = AT91SAM9G45_BASE_WDT + SZ_16 - 1,
1154 .flags = IORESOURCE_MEM,
1155 }
1156};
1157
1136static struct platform_device at91sam9g45_wdt_device = { 1158static struct platform_device at91sam9g45_wdt_device = {
1137 .name = "at91_wdt", 1159 .name = "at91_wdt",
1138 .id = -1, 1160 .id = -1,
1139 .num_resources = 0, 1161 .resource = wdt_resources,
1162 .num_resources = ARRAY_SIZE(wdt_resources),
1140}; 1163};
1141 1164
1142static void __init at91_add_device_watchdog(void) 1165static void __init at91_add_device_watchdog(void)
@@ -1332,8 +1355,8 @@ void __init at91_add_device_ssc(unsigned id, unsigned pins) {}
1332#if defined(CONFIG_SERIAL_ATMEL) 1355#if defined(CONFIG_SERIAL_ATMEL)
1333static struct resource dbgu_resources[] = { 1356static struct resource dbgu_resources[] = {
1334 [0] = { 1357 [0] = {
1335 .start = AT91_BASE_SYS + AT91_DBGU, 1358 .start = AT91SAM9G45_BASE_DBGU,
1336 .end = AT91_BASE_SYS + AT91_DBGU + SZ_512 - 1, 1359 .end = AT91SAM9G45_BASE_DBGU + SZ_512 - 1,
1337 .flags = IORESOURCE_MEM, 1360 .flags = IORESOURCE_MEM,
1338 }, 1361 },
1339 [1] = { 1362 [1] = {
diff --git a/arch/arm/mach-at91/at91sam9rl.c b/arch/arm/mach-at91/at91sam9rl.c
index a238105d2c11..d6bcb1da11df 100644
--- a/arch/arm/mach-at91/at91sam9rl.c
+++ b/arch/arm/mach-at91/at91sam9rl.c
@@ -10,7 +10,6 @@
10 */ 10 */
11 11
12#include <linux/module.h> 12#include <linux/module.h>
13#include <linux/pm.h>
14 13
15#include <asm/irq.h> 14#include <asm/irq.h>
16#include <asm/mach/arch.h> 15#include <asm/mach/arch.h>
@@ -20,11 +19,11 @@
20#include <mach/at91sam9rl.h> 19#include <mach/at91sam9rl.h>
21#include <mach/at91_pmc.h> 20#include <mach/at91_pmc.h>
22#include <mach/at91_rstc.h> 21#include <mach/at91_rstc.h>
23#include <mach/at91_shdwc.h>
24 22
25#include "soc.h" 23#include "soc.h"
26#include "generic.h" 24#include "generic.h"
27#include "clock.h" 25#include "clock.h"
26#include "sam9_smc.h"
28 27
29/* -------------------------------------------------------------------- 28/* --------------------------------------------------------------------
30 * Clocks 29 * Clocks
@@ -184,6 +183,10 @@ static struct clk_lookup periph_clocks_lookups[] = {
184 CLKDEV_CON_DEV_ID("t2_clk", "atmel_tcb.0", &tc2_clk), 183 CLKDEV_CON_DEV_ID("t2_clk", "atmel_tcb.0", &tc2_clk),
185 CLKDEV_CON_DEV_ID("pclk", "ssc.0", &ssc0_clk), 184 CLKDEV_CON_DEV_ID("pclk", "ssc.0", &ssc0_clk),
186 CLKDEV_CON_DEV_ID("pclk", "ssc.1", &ssc1_clk), 185 CLKDEV_CON_DEV_ID("pclk", "ssc.1", &ssc1_clk),
186 CLKDEV_CON_ID("pioA", &pioA_clk),
187 CLKDEV_CON_ID("pioB", &pioB_clk),
188 CLKDEV_CON_ID("pioC", &pioC_clk),
189 CLKDEV_CON_ID("pioD", &pioD_clk),
187}; 190};
188 191
189static struct clk_lookup usart_clocks_lookups[] = { 192static struct clk_lookup usart_clocks_lookups[] = {
@@ -243,32 +246,22 @@ void __init at91sam9rl_set_console_clock(int id)
243 * GPIO 246 * GPIO
244 * -------------------------------------------------------------------- */ 247 * -------------------------------------------------------------------- */
245 248
246static struct at91_gpio_bank at91sam9rl_gpio[] = { 249static struct at91_gpio_bank at91sam9rl_gpio[] __initdata = {
247 { 250 {
248 .id = AT91SAM9RL_ID_PIOA, 251 .id = AT91SAM9RL_ID_PIOA,
249 .offset = AT91_PIOA, 252 .regbase = AT91SAM9RL_BASE_PIOA,
250 .clock = &pioA_clk,
251 }, { 253 }, {
252 .id = AT91SAM9RL_ID_PIOB, 254 .id = AT91SAM9RL_ID_PIOB,
253 .offset = AT91_PIOB, 255 .regbase = AT91SAM9RL_BASE_PIOB,
254 .clock = &pioB_clk,
255 }, { 256 }, {
256 .id = AT91SAM9RL_ID_PIOC, 257 .id = AT91SAM9RL_ID_PIOC,
257 .offset = AT91_PIOC, 258 .regbase = AT91SAM9RL_BASE_PIOC,
258 .clock = &pioC_clk,
259 }, { 259 }, {
260 .id = AT91SAM9RL_ID_PIOD, 260 .id = AT91SAM9RL_ID_PIOD,
261 .offset = AT91_PIOD, 261 .regbase = AT91SAM9RL_BASE_PIOD,
262 .clock = &pioD_clk,
263 } 262 }
264}; 263};
265 264
266static void at91sam9rl_poweroff(void)
267{
268 at91_sys_write(AT91_SHDW_CR, AT91_SHDW_KEY | AT91_SHDW_SHDW);
269}
270
271
272/* -------------------------------------------------------------------- 265/* --------------------------------------------------------------------
273 * AT91SAM9RL processor initialization 266 * AT91SAM9RL processor initialization
274 * -------------------------------------------------------------------- */ 267 * -------------------------------------------------------------------- */
@@ -290,10 +283,16 @@ static void __init at91sam9rl_map_io(void)
290 at91_init_sram(0, AT91SAM9RL_SRAM_BASE, sram_size); 283 at91_init_sram(0, AT91SAM9RL_SRAM_BASE, sram_size);
291} 284}
292 285
286static void __init at91sam9rl_ioremap_registers(void)
287{
288 at91_ioremap_shdwc(AT91SAM9RL_BASE_SHDWC);
289 at91sam926x_ioremap_pit(AT91SAM9RL_BASE_PIT);
290 at91sam9_ioremap_smc(0, AT91SAM9RL_BASE_SMC);
291}
292
293static void __init at91sam9rl_initialize(void) 293static void __init at91sam9rl_initialize(void)
294{ 294{
295 at91_arch_reset = at91sam9_alt_reset; 295 arm_pm_restart = at91sam9_alt_restart;
296 pm_power_off = at91sam9rl_poweroff;
297 at91_extern_irq = (1 << AT91SAM9RL_ID_IRQ0); 296 at91_extern_irq = (1 << AT91SAM9RL_ID_IRQ0);
298 297
299 /* Register GPIO subsystem */ 298 /* Register GPIO subsystem */
@@ -345,6 +344,7 @@ static unsigned int at91sam9rl_default_irq_priority[NR_AIC_IRQS] __initdata = {
345struct at91_init_soc __initdata at91sam9rl_soc = { 344struct at91_init_soc __initdata at91sam9rl_soc = {
346 .map_io = at91sam9rl_map_io, 345 .map_io = at91sam9rl_map_io,
347 .default_irq_priority = at91sam9rl_default_irq_priority, 346 .default_irq_priority = at91sam9rl_default_irq_priority,
347 .ioremap_registers = at91sam9rl_ioremap_registers,
348 .register_clocks = at91sam9rl_register_clocks, 348 .register_clocks = at91sam9rl_register_clocks,
349 .init = at91sam9rl_initialize, 349 .init = at91sam9rl_initialize,
350}; 350};
diff --git a/arch/arm/mach-at91/at91sam9rl_devices.c b/arch/arm/mach-at91/at91sam9rl_devices.c
index 628eb566d60c..61908dce9784 100644
--- a/arch/arm/mach-at91/at91sam9rl_devices.c
+++ b/arch/arm/mach-at91/at91sam9rl_devices.c
@@ -39,8 +39,8 @@ static struct at_dma_platform_data atdma_pdata = {
39 39
40static struct resource hdmac_resources[] = { 40static struct resource hdmac_resources[] = {
41 [0] = { 41 [0] = {
42 .start = AT91_BASE_SYS + AT91_DMA, 42 .start = AT91SAM9RL_BASE_DMA,
43 .end = AT91_BASE_SYS + AT91_DMA + SZ_512 - 1, 43 .end = AT91SAM9RL_BASE_DMA + SZ_512 - 1,
44 .flags = IORESOURCE_MEM, 44 .flags = IORESOURCE_MEM,
45 }, 45 },
46 [2] = { 46 [2] = {
@@ -147,7 +147,7 @@ void __init at91_add_device_usba(struct usba_platform_data *data)
147 usba_udc_data.pdata.num_ep = ARRAY_SIZE(usba_udc_ep); 147 usba_udc_data.pdata.num_ep = ARRAY_SIZE(usba_udc_ep);
148 memcpy(usba_udc_data.ep, usba_udc_ep, sizeof(usba_udc_ep)); 148 memcpy(usba_udc_data.ep, usba_udc_ep, sizeof(usba_udc_ep));
149 149
150 if (data && data->vbus_pin > 0) { 150 if (data && gpio_is_valid(data->vbus_pin)) {
151 at91_set_gpio_input(data->vbus_pin, 0); 151 at91_set_gpio_input(data->vbus_pin, 0);
152 at91_set_deglitch(data->vbus_pin, 1); 152 at91_set_deglitch(data->vbus_pin, 1);
153 usba_udc_data.pdata.vbus_pin = data->vbus_pin; 153 usba_udc_data.pdata.vbus_pin = data->vbus_pin;
@@ -201,13 +201,13 @@ void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data)
201 return; 201 return;
202 202
203 /* input/irq */ 203 /* input/irq */
204 if (data->det_pin) { 204 if (gpio_is_valid(data->det_pin)) {
205 at91_set_gpio_input(data->det_pin, 1); 205 at91_set_gpio_input(data->det_pin, 1);
206 at91_set_deglitch(data->det_pin, 1); 206 at91_set_deglitch(data->det_pin, 1);
207 } 207 }
208 if (data->wp_pin) 208 if (gpio_is_valid(data->wp_pin))
209 at91_set_gpio_input(data->wp_pin, 1); 209 at91_set_gpio_input(data->wp_pin, 1);
210 if (data->vcc_pin) 210 if (gpio_is_valid(data->vcc_pin))
211 at91_set_gpio_output(data->vcc_pin, 0); 211 at91_set_gpio_output(data->vcc_pin, 0);
212 212
213 /* CLK */ 213 /* CLK */
@@ -248,8 +248,8 @@ static struct resource nand_resources[] = {
248 .flags = IORESOURCE_MEM, 248 .flags = IORESOURCE_MEM,
249 }, 249 },
250 [1] = { 250 [1] = {
251 .start = AT91_BASE_SYS + AT91_ECC, 251 .start = AT91SAM9RL_BASE_ECC,
252 .end = AT91_BASE_SYS + AT91_ECC + SZ_512 - 1, 252 .end = AT91SAM9RL_BASE_ECC + SZ_512 - 1,
253 .flags = IORESOURCE_MEM, 253 .flags = IORESOURCE_MEM,
254 } 254 }
255}; 255};
@@ -275,15 +275,15 @@ void __init at91_add_device_nand(struct atmel_nand_data *data)
275 at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_CS3A_SMC_SMARTMEDIA); 275 at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_CS3A_SMC_SMARTMEDIA);
276 276
277 /* enable pin */ 277 /* enable pin */
278 if (data->enable_pin) 278 if (gpio_is_valid(data->enable_pin))
279 at91_set_gpio_output(data->enable_pin, 1); 279 at91_set_gpio_output(data->enable_pin, 1);
280 280
281 /* ready/busy pin */ 281 /* ready/busy pin */
282 if (data->rdy_pin) 282 if (gpio_is_valid(data->rdy_pin))
283 at91_set_gpio_input(data->rdy_pin, 1); 283 at91_set_gpio_input(data->rdy_pin, 1);
284 284
285 /* card detect pin */ 285 /* card detect pin */
286 if (data->det_pin) 286 if (gpio_is_valid(data->det_pin))
287 at91_set_gpio_input(data->det_pin, 1); 287 at91_set_gpio_input(data->det_pin, 1);
288 288
289 at91_set_A_periph(AT91_PIN_PB4, 0); /* NANDOE */ 289 at91_set_A_periph(AT91_PIN_PB4, 0); /* NANDOE */
@@ -483,7 +483,7 @@ void __init at91_add_device_ac97(struct ac97c_platform_data *data)
483 at91_set_A_periph(AT91_PIN_PD4, 0); /* AC97RX */ 483 at91_set_A_periph(AT91_PIN_PD4, 0); /* AC97RX */
484 484
485 /* reset */ 485 /* reset */
486 if (data->reset_pin) 486 if (gpio_is_valid(data->reset_pin))
487 at91_set_gpio_output(data->reset_pin, 0); 487 at91_set_gpio_output(data->reset_pin, 0);
488 488
489 ac97_data = *data; 489 ac97_data = *data;
@@ -685,8 +685,8 @@ static void __init at91_add_device_rtc(void) {}
685 685
686static struct resource rtt_resources[] = { 686static struct resource rtt_resources[] = {
687 { 687 {
688 .start = AT91_BASE_SYS + AT91_RTT, 688 .start = AT91SAM9RL_BASE_RTT,
689 .end = AT91_BASE_SYS + AT91_RTT + SZ_16 - 1, 689 .end = AT91SAM9RL_BASE_RTT + SZ_16 - 1,
690 .flags = IORESOURCE_MEM, 690 .flags = IORESOURCE_MEM,
691 } 691 }
692}; 692};
@@ -709,10 +709,19 @@ static void __init at91_add_device_rtt(void)
709 * -------------------------------------------------------------------- */ 709 * -------------------------------------------------------------------- */
710 710
711#if defined(CONFIG_AT91SAM9X_WATCHDOG) || defined(CONFIG_AT91SAM9X_WATCHDOG_MODULE) 711#if defined(CONFIG_AT91SAM9X_WATCHDOG) || defined(CONFIG_AT91SAM9X_WATCHDOG_MODULE)
712static struct resource wdt_resources[] = {
713 {
714 .start = AT91SAM9RL_BASE_WDT,
715 .end = AT91SAM9RL_BASE_WDT + SZ_16 - 1,
716 .flags = IORESOURCE_MEM,
717 }
718};
719
712static struct platform_device at91sam9rl_wdt_device = { 720static struct platform_device at91sam9rl_wdt_device = {
713 .name = "at91_wdt", 721 .name = "at91_wdt",
714 .id = -1, 722 .id = -1,
715 .num_resources = 0, 723 .resource = wdt_resources,
724 .num_resources = ARRAY_SIZE(wdt_resources),
716}; 725};
717 726
718static void __init at91_add_device_watchdog(void) 727static void __init at91_add_device_watchdog(void)
@@ -908,8 +917,8 @@ void __init at91_add_device_ssc(unsigned id, unsigned pins) {}
908#if defined(CONFIG_SERIAL_ATMEL) 917#if defined(CONFIG_SERIAL_ATMEL)
909static struct resource dbgu_resources[] = { 918static struct resource dbgu_resources[] = {
910 [0] = { 919 [0] = {
911 .start = AT91_BASE_SYS + AT91_DBGU, 920 .start = AT91SAM9RL_BASE_DBGU,
912 .end = AT91_BASE_SYS + AT91_DBGU + SZ_512 - 1, 921 .end = AT91SAM9RL_BASE_DBGU + SZ_512 - 1,
913 .flags = IORESOURCE_MEM, 922 .flags = IORESOURCE_MEM,
914 }, 923 },
915 [1] = { 924 [1] = {
diff --git a/arch/arm/mach-at91/board-1arm.c b/arch/arm/mach-at91/board-1arm.c
index a60d98d7c3e2..2628384aaae1 100644
--- a/arch/arm/mach-at91/board-1arm.c
+++ b/arch/arm/mach-at91/board-1arm.c
@@ -70,6 +70,8 @@ static struct macb_platform_data __initdata onearm_eth_data = {
70 70
71static struct at91_usbh_data __initdata onearm_usbh_data = { 71static struct at91_usbh_data __initdata onearm_usbh_data = {
72 .ports = 1, 72 .ports = 1,
73 .vbus_pin = {-EINVAL, -EINVAL},
74 .overcurrent_pin= {-EINVAL, -EINVAL},
73}; 75};
74 76
75static struct at91_udc_data __initdata onearm_udc_data = { 77static struct at91_udc_data __initdata onearm_udc_data = {
diff --git a/arch/arm/mach-at91/board-afeb-9260v1.c b/arch/arm/mach-at91/board-afeb-9260v1.c
index 17fc77925707..3bb40694b02d 100644
--- a/arch/arm/mach-at91/board-afeb-9260v1.c
+++ b/arch/arm/mach-at91/board-afeb-9260v1.c
@@ -75,6 +75,8 @@ static void __init afeb9260_init_early(void)
75 */ 75 */
76static struct at91_usbh_data __initdata afeb9260_usbh_data = { 76static struct at91_usbh_data __initdata afeb9260_usbh_data = {
77 .ports = 1, 77 .ports = 1,
78 .vbus_pin = {-EINVAL, -EINVAL},
79 .overcurrent_pin= {-EINVAL, -EINVAL},
78}; 80};
79 81
80/* 82/*
@@ -82,7 +84,7 @@ static struct at91_usbh_data __initdata afeb9260_usbh_data = {
82 */ 84 */
83static struct at91_udc_data __initdata afeb9260_udc_data = { 85static struct at91_udc_data __initdata afeb9260_udc_data = {
84 .vbus_pin = AT91_PIN_PC5, 86 .vbus_pin = AT91_PIN_PC5,
85 .pullup_pin = 0, /* pull-up driven by UDC */ 87 .pullup_pin = -EINVAL, /* pull-up driven by UDC */
86}; 88};
87 89
88 90
@@ -138,6 +140,7 @@ static struct atmel_nand_data __initdata afeb9260_nand_data = {
138 .bus_width_16 = 0, 140 .bus_width_16 = 0,
139 .parts = afeb9260_nand_partition, 141 .parts = afeb9260_nand_partition,
140 .num_parts = ARRAY_SIZE(afeb9260_nand_partition), 142 .num_parts = ARRAY_SIZE(afeb9260_nand_partition),
143 .det_pin = -EINVAL,
141}; 144};
142 145
143 146
@@ -149,6 +152,7 @@ static struct at91_mmc_data __initdata afeb9260_mmc_data = {
149 .wp_pin = AT91_PIN_PC4, 152 .wp_pin = AT91_PIN_PC4,
150 .slot_b = 1, 153 .slot_b = 1,
151 .wire4 = 1, 154 .wire4 = 1,
155 .vcc_pin = -EINVAL,
152}; 156};
153 157
154 158
@@ -169,6 +173,8 @@ static struct i2c_board_info __initdata afeb9260_i2c_devices[] = {
169static struct at91_cf_data afeb9260_cf_data = { 173static struct at91_cf_data afeb9260_cf_data = {
170 .chipselect = 4, 174 .chipselect = 4,
171 .irq_pin = AT91_PIN_PA6, 175 .irq_pin = AT91_PIN_PA6,
176 .det_pin = -EINVAL,
177 .vcc_pin = -EINVAL,
172 .rst_pin = AT91_PIN_PA7, 178 .rst_pin = AT91_PIN_PA7,
173 .flags = AT91_CF_TRUE_IDE, 179 .flags = AT91_CF_TRUE_IDE,
174}; 180};
diff --git a/arch/arm/mach-at91/board-cam60.c b/arch/arm/mach-at91/board-cam60.c
index 2037d2c40eb4..8510e9e54988 100644
--- a/arch/arm/mach-at91/board-cam60.c
+++ b/arch/arm/mach-at91/board-cam60.c
@@ -62,6 +62,8 @@ static void __init cam60_init_early(void)
62 */ 62 */
63static struct at91_usbh_data __initdata cam60_usbh_data = { 63static struct at91_usbh_data __initdata cam60_usbh_data = {
64 .ports = 1, 64 .ports = 1,
65 .vbus_pin = {-EINVAL, -EINVAL},
66 .overcurrent_pin= {-EINVAL, -EINVAL},
65}; 67};
66 68
67 69
@@ -135,7 +137,7 @@ static struct mtd_partition __initdata cam60_nand_partition[] = {
135static struct atmel_nand_data __initdata cam60_nand_data = { 137static struct atmel_nand_data __initdata cam60_nand_data = {
136 .ale = 21, 138 .ale = 21,
137 .cle = 22, 139 .cle = 22,
138 // .det_pin = ... not there 140 .det_pin = -EINVAL,
139 .rdy_pin = AT91_PIN_PA9, 141 .rdy_pin = AT91_PIN_PA9,
140 .enable_pin = AT91_PIN_PA7, 142 .enable_pin = AT91_PIN_PA7,
141 .parts = cam60_nand_partition, 143 .parts = cam60_nand_partition,
@@ -163,7 +165,7 @@ static struct sam9_smc_config __initdata cam60_nand_smc_config = {
163static void __init cam60_add_device_nand(void) 165static void __init cam60_add_device_nand(void)
164{ 166{
165 /* configure chip-select 3 (NAND) */ 167 /* configure chip-select 3 (NAND) */
166 sam9_smc_configure(3, &cam60_nand_smc_config); 168 sam9_smc_configure(0, 3, &cam60_nand_smc_config);
167 169
168 at91_add_device_nand(&cam60_nand_data); 170 at91_add_device_nand(&cam60_nand_data);
169} 171}
diff --git a/arch/arm/mach-at91/board-cap9adk.c b/arch/arm/mach-at91/board-cap9adk.c
index af5520c366fe..ac3de4f7c31d 100644
--- a/arch/arm/mach-at91/board-cap9adk.c
+++ b/arch/arm/mach-at91/board-cap9adk.c
@@ -70,6 +70,8 @@ static void __init cap9adk_init_early(void)
70 */ 70 */
71static struct at91_usbh_data __initdata cap9adk_usbh_data = { 71static struct at91_usbh_data __initdata cap9adk_usbh_data = {
72 .ports = 2, 72 .ports = 2,
73 .vbus_pin = {-EINVAL, -EINVAL},
74 .overcurrent_pin= {-EINVAL, -EINVAL},
73}; 75};
74 76
75/* 77/*
@@ -144,9 +146,9 @@ static struct spi_board_info cap9adk_spi_devices[] = {
144 */ 146 */
145static struct at91_mmc_data __initdata cap9adk_mmc_data = { 147static struct at91_mmc_data __initdata cap9adk_mmc_data = {
146 .wire4 = 1, 148 .wire4 = 1,
147// .det_pin = ... not connected 149 .det_pin = -EINVAL,
148// .wp_pin = ... not connected 150 .wp_pin = -EINVAL,
149// .vcc_pin = ... not connected 151 .vcc_pin = -EINVAL,
150}; 152};
151 153
152 154
@@ -154,6 +156,7 @@ static struct at91_mmc_data __initdata cap9adk_mmc_data = {
154 * MACB Ethernet device 156 * MACB Ethernet device
155 */ 157 */
156static struct macb_platform_data __initdata cap9adk_macb_data = { 158static struct macb_platform_data __initdata cap9adk_macb_data = {
159 .phy_irq_pin = -EINVAL,
157 .is_rmii = 1, 160 .is_rmii = 1,
158}; 161};
159 162
@@ -172,8 +175,8 @@ static struct mtd_partition __initdata cap9adk_nand_partitions[] = {
172static struct atmel_nand_data __initdata cap9adk_nand_data = { 175static struct atmel_nand_data __initdata cap9adk_nand_data = {
173 .ale = 21, 176 .ale = 21,
174 .cle = 22, 177 .cle = 22,
175// .det_pin = ... not connected 178 .det_pin = -EINVAL,
176// .rdy_pin = ... not connected 179 .rdy_pin = -EINVAL,
177 .enable_pin = AT91_PIN_PD15, 180 .enable_pin = AT91_PIN_PD15,
178 .parts = cap9adk_nand_partitions, 181 .parts = cap9adk_nand_partitions,
179 .num_parts = ARRAY_SIZE(cap9adk_nand_partitions), 182 .num_parts = ARRAY_SIZE(cap9adk_nand_partitions),
@@ -212,7 +215,7 @@ static void __init cap9adk_add_device_nand(void)
212 cap9adk_nand_smc_config.mode |= AT91_SMC_DBW_8; 215 cap9adk_nand_smc_config.mode |= AT91_SMC_DBW_8;
213 216
214 /* configure chip-select 3 (NAND) */ 217 /* configure chip-select 3 (NAND) */
215 sam9_smc_configure(3, &cap9adk_nand_smc_config); 218 sam9_smc_configure(0, 3, &cap9adk_nand_smc_config);
216 219
217 at91_add_device_nand(&cap9adk_nand_data); 220 at91_add_device_nand(&cap9adk_nand_data);
218} 221}
@@ -282,7 +285,7 @@ static __init void cap9adk_add_device_nor(void)
282 at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_EBI_VDDIOMSEL_3_3V); 285 at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_EBI_VDDIOMSEL_3_3V);
283 286
284 /* configure chip-select 0 (NOR) */ 287 /* configure chip-select 0 (NOR) */
285 sam9_smc_configure(0, &cap9adk_nor_smc_config); 288 sam9_smc_configure(0, 0, &cap9adk_nor_smc_config);
286 289
287 platform_device_register(&cap9adk_nor_flash); 290 platform_device_register(&cap9adk_nor_flash);
288} 291}
@@ -351,7 +354,7 @@ static struct atmel_lcdfb_info __initdata cap9adk_lcdc_data;
351 * AC97 354 * AC97
352 */ 355 */
353static struct ac97c_platform_data cap9adk_ac97_data = { 356static struct ac97c_platform_data cap9adk_ac97_data = {
354// .reset_pin = ... not connected 357 .reset_pin = -EINVAL,
355}; 358};
356 359
357 360
diff --git a/arch/arm/mach-at91/board-carmeva.c b/arch/arm/mach-at91/board-carmeva.c
index 529b356cdb7d..59d9cf997537 100644
--- a/arch/arm/mach-at91/board-carmeva.c
+++ b/arch/arm/mach-at91/board-carmeva.c
@@ -64,6 +64,8 @@ static struct macb_platform_data __initdata carmeva_eth_data = {
64 64
65static struct at91_usbh_data __initdata carmeva_usbh_data = { 65static struct at91_usbh_data __initdata carmeva_usbh_data = {
66 .ports = 2, 66 .ports = 2,
67 .vbus_pin = {-EINVAL, -EINVAL},
68 .overcurrent_pin= {-EINVAL, -EINVAL},
67}; 69};
68 70
69static struct at91_udc_data __initdata carmeva_udc_data = { 71static struct at91_udc_data __initdata carmeva_udc_data = {
@@ -75,8 +77,8 @@ static struct at91_udc_data __initdata carmeva_udc_data = {
75// static struct at91_cf_data __initdata carmeva_cf_data = { 77// static struct at91_cf_data __initdata carmeva_cf_data = {
76// .det_pin = AT91_PIN_PB0, 78// .det_pin = AT91_PIN_PB0,
77// .rst_pin = AT91_PIN_PC5, 79// .rst_pin = AT91_PIN_PC5,
78 // .irq_pin = ... not connected 80 // .irq_pin = -EINVAL,
79 // .vcc_pin = ... always powered 81 // .vcc_pin = -EINVAL,
80// }; 82// };
81 83
82static struct at91_mmc_data __initdata carmeva_mmc_data = { 84static struct at91_mmc_data __initdata carmeva_mmc_data = {
@@ -84,6 +86,7 @@ static struct at91_mmc_data __initdata carmeva_mmc_data = {
84 .wire4 = 1, 86 .wire4 = 1,
85 .det_pin = AT91_PIN_PB10, 87 .det_pin = AT91_PIN_PB10,
86 .wp_pin = AT91_PIN_PC14, 88 .wp_pin = AT91_PIN_PC14,
89 .vcc_pin = -EINVAL,
87}; 90};
88 91
89static struct spi_board_info carmeva_spi_devices[] = { 92static struct spi_board_info carmeva_spi_devices[] = {
diff --git a/arch/arm/mach-at91/board-cpu9krea.c b/arch/arm/mach-at91/board-cpu9krea.c
index 04d2b9b50464..9ab3d1ea326d 100644
--- a/arch/arm/mach-at91/board-cpu9krea.c
+++ b/arch/arm/mach-at91/board-cpu9krea.c
@@ -86,6 +86,8 @@ static void __init cpu9krea_init_early(void)
86 */ 86 */
87static struct at91_usbh_data __initdata cpu9krea_usbh_data = { 87static struct at91_usbh_data __initdata cpu9krea_usbh_data = {
88 .ports = 2, 88 .ports = 2,
89 .vbus_pin = {-EINVAL, -EINVAL},
90 .overcurrent_pin= {-EINVAL, -EINVAL},
89}; 91};
90 92
91/* 93/*
@@ -93,13 +95,14 @@ static struct at91_usbh_data __initdata cpu9krea_usbh_data = {
93 */ 95 */
94static struct at91_udc_data __initdata cpu9krea_udc_data = { 96static struct at91_udc_data __initdata cpu9krea_udc_data = {
95 .vbus_pin = AT91_PIN_PC8, 97 .vbus_pin = AT91_PIN_PC8,
96 .pullup_pin = 0, /* pull-up driven by UDC */ 98 .pullup_pin = -EINVAL, /* pull-up driven by UDC */
97}; 99};
98 100
99/* 101/*
100 * MACB Ethernet device 102 * MACB Ethernet device
101 */ 103 */
102static struct macb_platform_data __initdata cpu9krea_macb_data = { 104static struct macb_platform_data __initdata cpu9krea_macb_data = {
105 .phy_irq_pin = -EINVAL,
103 .is_rmii = 1, 106 .is_rmii = 1,
104}; 107};
105 108
@@ -112,6 +115,7 @@ static struct atmel_nand_data __initdata cpu9krea_nand_data = {
112 .rdy_pin = AT91_PIN_PC13, 115 .rdy_pin = AT91_PIN_PC13,
113 .enable_pin = AT91_PIN_PC14, 116 .enable_pin = AT91_PIN_PC14,
114 .bus_width_16 = 0, 117 .bus_width_16 = 0,
118 .det_pin = -EINVAL,
115}; 119};
116 120
117#ifdef CONFIG_MACH_CPU9260 121#ifdef CONFIG_MACH_CPU9260
@@ -156,7 +160,7 @@ static struct sam9_smc_config __initdata cpu9krea_nand_smc_config = {
156 160
157static void __init cpu9krea_add_device_nand(void) 161static void __init cpu9krea_add_device_nand(void)
158{ 162{
159 sam9_smc_configure(3, &cpu9krea_nand_smc_config); 163 sam9_smc_configure(0, 3, &cpu9krea_nand_smc_config);
160 at91_add_device_nand(&cpu9krea_nand_data); 164 at91_add_device_nand(&cpu9krea_nand_data);
161} 165}
162 166
@@ -238,7 +242,7 @@ static __init void cpu9krea_add_device_nor(void)
238 at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_VDDIOMSEL_3_3V); 242 at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_VDDIOMSEL_3_3V);
239 243
240 /* configure chip-select 0 (NOR) */ 244 /* configure chip-select 0 (NOR) */
241 sam9_smc_configure(0, &cpu9krea_nor_smc_config); 245 sam9_smc_configure(0, 0, &cpu9krea_nor_smc_config);
242 246
243 platform_device_register(&cpu9krea_nor_flash); 247 platform_device_register(&cpu9krea_nor_flash);
244} 248}
@@ -337,6 +341,8 @@ static struct at91_mmc_data __initdata cpu9krea_mmc_data = {
337 .slot_b = 0, 341 .slot_b = 0,
338 .wire4 = 1, 342 .wire4 = 1,
339 .det_pin = AT91_PIN_PA29, 343 .det_pin = AT91_PIN_PA29,
344 .wp_pin = -EINVAL,
345 .vcc_pin = -EINVAL,
340}; 346};
341 347
342static void __init cpu9krea_board_init(void) 348static void __init cpu9krea_board_init(void)
diff --git a/arch/arm/mach-at91/board-cpuat91.c b/arch/arm/mach-at91/board-cpuat91.c
index 7a4c82e8da51..368e1427ad99 100644
--- a/arch/arm/mach-at91/board-cpuat91.c
+++ b/arch/arm/mach-at91/board-cpuat91.c
@@ -83,11 +83,14 @@ static void __init cpuat91_init_early(void)
83} 83}
84 84
85static struct macb_platform_data __initdata cpuat91_eth_data = { 85static struct macb_platform_data __initdata cpuat91_eth_data = {
86 .phy_irq_pin = -EINVAL,
86 .is_rmii = 1, 87 .is_rmii = 1,
87}; 88};
88 89
89static struct at91_usbh_data __initdata cpuat91_usbh_data = { 90static struct at91_usbh_data __initdata cpuat91_usbh_data = {
90 .ports = 1, 91 .ports = 1,
92 .vbus_pin = {-EINVAL, -EINVAL},
93 .overcurrent_pin= {-EINVAL, -EINVAL},
91}; 94};
92 95
93static struct at91_udc_data __initdata cpuat91_udc_data = { 96static struct at91_udc_data __initdata cpuat91_udc_data = {
@@ -98,6 +101,8 @@ static struct at91_udc_data __initdata cpuat91_udc_data = {
98static struct at91_mmc_data __initdata cpuat91_mmc_data = { 101static struct at91_mmc_data __initdata cpuat91_mmc_data = {
99 .det_pin = AT91_PIN_PC2, 102 .det_pin = AT91_PIN_PC2,
100 .wire4 = 1, 103 .wire4 = 1,
104 .wp_pin = -EINVAL,
105 .vcc_pin = -EINVAL,
101}; 106};
102 107
103static struct physmap_flash_data cpuat91_flash_data = { 108static struct physmap_flash_data cpuat91_flash_data = {
diff --git a/arch/arm/mach-at91/board-csb337.c b/arch/arm/mach-at91/board-csb337.c
index b004b20b8e42..1a1547b1ce4e 100644
--- a/arch/arm/mach-at91/board-csb337.c
+++ b/arch/arm/mach-at91/board-csb337.c
@@ -65,11 +65,13 @@ static struct macb_platform_data __initdata csb337_eth_data = {
65 65
66static struct at91_usbh_data __initdata csb337_usbh_data = { 66static struct at91_usbh_data __initdata csb337_usbh_data = {
67 .ports = 2, 67 .ports = 2,
68 .vbus_pin = {-EINVAL, -EINVAL},
69 .overcurrent_pin= {-EINVAL, -EINVAL},
68}; 70};
69 71
70static struct at91_udc_data __initdata csb337_udc_data = { 72static struct at91_udc_data __initdata csb337_udc_data = {
71 // this has no VBUS sensing pin
72 .pullup_pin = AT91_PIN_PA24, 73 .pullup_pin = AT91_PIN_PA24,
74 .vbus_pin = -EINVAL,
73}; 75};
74 76
75static struct i2c_board_info __initdata csb337_i2c_devices[] = { 77static struct i2c_board_info __initdata csb337_i2c_devices[] = {
@@ -98,6 +100,7 @@ static struct at91_mmc_data __initdata csb337_mmc_data = {
98 .slot_b = 0, 100 .slot_b = 0,
99 .wire4 = 1, 101 .wire4 = 1,
100 .wp_pin = AT91_PIN_PD6, 102 .wp_pin = AT91_PIN_PD6,
103 .vcc_pin = -EINVAL,
101}; 104};
102 105
103static struct spi_board_info csb337_spi_devices[] = { 106static struct spi_board_info csb337_spi_devices[] = {
diff --git a/arch/arm/mach-at91/board-csb637.c b/arch/arm/mach-at91/board-csb637.c
index e966de5219c7..f650bf39455d 100644
--- a/arch/arm/mach-at91/board-csb637.c
+++ b/arch/arm/mach-at91/board-csb637.c
@@ -59,6 +59,8 @@ static struct macb_platform_data __initdata csb637_eth_data = {
59 59
60static struct at91_usbh_data __initdata csb637_usbh_data = { 60static struct at91_usbh_data __initdata csb637_usbh_data = {
61 .ports = 2, 61 .ports = 2,
62 .vbus_pin = {-EINVAL, -EINVAL},
63 .overcurrent_pin= {-EINVAL, -EINVAL},
62}; 64};
63 65
64static struct at91_udc_data __initdata csb637_udc_data = { 66static struct at91_udc_data __initdata csb637_udc_data = {
diff --git a/arch/arm/mach-at91/board-dt.c b/arch/arm/mach-at91/board-dt.c
index 0b7d32778210..bb6b434ec0c1 100644
--- a/arch/arm/mach-at91/board-dt.c
+++ b/arch/arm/mach-at91/board-dt.c
@@ -50,6 +50,7 @@ static void __init ek_init_early(void)
50static struct atmel_nand_data __initdata ek_nand_data = { 50static struct atmel_nand_data __initdata ek_nand_data = {
51 .ale = 21, 51 .ale = 21,
52 .cle = 22, 52 .cle = 22,
53 .det_pin = -EINVAL,
53 .rdy_pin = AT91_PIN_PC8, 54 .rdy_pin = AT91_PIN_PC8,
54 .enable_pin = AT91_PIN_PC14, 55 .enable_pin = AT91_PIN_PC14,
55}; 56};
@@ -82,7 +83,7 @@ static void __init ek_add_device_nand(void)
82 ek_nand_smc_config.mode |= AT91_SMC_DBW_8; 83 ek_nand_smc_config.mode |= AT91_SMC_DBW_8;
83 84
84 /* configure chip-select 3 (NAND) */ 85 /* configure chip-select 3 (NAND) */
85 sam9_smc_configure(3, &ek_nand_smc_config); 86 sam9_smc_configure(0, 3, &ek_nand_smc_config);
86 87
87 at91_add_device_nand(&ek_nand_data); 88 at91_add_device_nand(&ek_nand_data);
88} 89}
diff --git a/arch/arm/mach-at91/board-eb9200.c b/arch/arm/mach-at91/board-eb9200.c
index 3788fa527121..d302ca3eeb64 100644
--- a/arch/arm/mach-at91/board-eb9200.c
+++ b/arch/arm/mach-at91/board-eb9200.c
@@ -67,6 +67,8 @@ static struct macb_platform_data __initdata eb9200_eth_data = {
67 67
68static struct at91_usbh_data __initdata eb9200_usbh_data = { 68static struct at91_usbh_data __initdata eb9200_usbh_data = {
69 .ports = 2, 69 .ports = 2,
70 .vbus_pin = {-EINVAL, -EINVAL},
71 .overcurrent_pin= {-EINVAL, -EINVAL},
70}; 72};
71 73
72static struct at91_udc_data __initdata eb9200_udc_data = { 74static struct at91_udc_data __initdata eb9200_udc_data = {
@@ -75,15 +77,18 @@ static struct at91_udc_data __initdata eb9200_udc_data = {
75}; 77};
76 78
77static struct at91_cf_data __initdata eb9200_cf_data = { 79static struct at91_cf_data __initdata eb9200_cf_data = {
80 .irq_pin = -EINVAL,
78 .det_pin = AT91_PIN_PB0, 81 .det_pin = AT91_PIN_PB0,
82 .vcc_pin = -EINVAL,
79 .rst_pin = AT91_PIN_PC5, 83 .rst_pin = AT91_PIN_PC5,
80 // .irq_pin = ... not connected
81 // .vcc_pin = ... always powered
82}; 84};
83 85
84static struct at91_mmc_data __initdata eb9200_mmc_data = { 86static struct at91_mmc_data __initdata eb9200_mmc_data = {
85 .slot_b = 0, 87 .slot_b = 0,
86 .wire4 = 1, 88 .wire4 = 1,
89 .det_pin = -EINVAL,
90 .wp_pin = -EINVAL,
91 .vcc_pin = -EINVAL,
87}; 92};
88 93
89static struct i2c_board_info __initdata eb9200_i2c_devices[] = { 94static struct i2c_board_info __initdata eb9200_i2c_devices[] = {
diff --git a/arch/arm/mach-at91/board-ecbat91.c b/arch/arm/mach-at91/board-ecbat91.c
index af7622eae1a9..69966ce4d776 100644
--- a/arch/arm/mach-at91/board-ecbat91.c
+++ b/arch/arm/mach-at91/board-ecbat91.c
@@ -71,11 +71,16 @@ static struct macb_platform_data __initdata ecb_at91eth_data = {
71 71
72static struct at91_usbh_data __initdata ecb_at91usbh_data = { 72static struct at91_usbh_data __initdata ecb_at91usbh_data = {
73 .ports = 1, 73 .ports = 1,
74 .vbus_pin = {-EINVAL, -EINVAL},
75 .overcurrent_pin= {-EINVAL, -EINVAL},
74}; 76};
75 77
76static struct at91_mmc_data __initdata ecb_at91mmc_data = { 78static struct at91_mmc_data __initdata ecb_at91mmc_data = {
77 .slot_b = 0, 79 .slot_b = 0,
78 .wire4 = 1, 80 .wire4 = 1,
81 .det_pin = -EINVAL,
82 .wp_pin = -EINVAL,
83 .vcc_pin = -EINVAL,
79}; 84};
80 85
81 86
diff --git a/arch/arm/mach-at91/board-eco920.c b/arch/arm/mach-at91/board-eco920.c
index 8e75867d1d18..07ef35b0ec2c 100644
--- a/arch/arm/mach-at91/board-eco920.c
+++ b/arch/arm/mach-at91/board-eco920.c
@@ -54,6 +54,8 @@ static struct macb_platform_data __initdata eco920_eth_data = {
54 54
55static struct at91_usbh_data __initdata eco920_usbh_data = { 55static struct at91_usbh_data __initdata eco920_usbh_data = {
56 .ports = 1, 56 .ports = 1,
57 .vbus_pin = {-EINVAL, -EINVAL},
58 .overcurrent_pin= {-EINVAL, -EINVAL},
57}; 59};
58 60
59static struct at91_udc_data __initdata eco920_udc_data = { 61static struct at91_udc_data __initdata eco920_udc_data = {
@@ -64,6 +66,9 @@ static struct at91_udc_data __initdata eco920_udc_data = {
64static struct at91_mmc_data __initdata eco920_mmc_data = { 66static struct at91_mmc_data __initdata eco920_mmc_data = {
65 .slot_b = 0, 67 .slot_b = 0,
66 .wire4 = 0, 68 .wire4 = 0,
69 .det_pin = -EINVAL,
70 .wp_pin = -EINVAL,
71 .vcc_pin = -EINVAL,
67}; 72};
68 73
69static struct physmap_flash_data eco920_flash_data = { 74static struct physmap_flash_data eco920_flash_data = {
diff --git a/arch/arm/mach-at91/board-flexibity.c b/arch/arm/mach-at91/board-flexibity.c
index 4c3f65d9c59b..eec02cd57ced 100644
--- a/arch/arm/mach-at91/board-flexibity.c
+++ b/arch/arm/mach-at91/board-flexibity.c
@@ -52,12 +52,14 @@ static void __init flexibity_init_early(void)
52/* USB Host port */ 52/* USB Host port */
53static struct at91_usbh_data __initdata flexibity_usbh_data = { 53static struct at91_usbh_data __initdata flexibity_usbh_data = {
54 .ports = 2, 54 .ports = 2,
55 .vbus_pin = {-EINVAL, -EINVAL},
56 .overcurrent_pin= {-EINVAL, -EINVAL},
55}; 57};
56 58
57/* USB Device port */ 59/* USB Device port */
58static struct at91_udc_data __initdata flexibity_udc_data = { 60static struct at91_udc_data __initdata flexibity_udc_data = {
59 .vbus_pin = AT91_PIN_PC5, 61 .vbus_pin = AT91_PIN_PC5,
60 .pullup_pin = 0, /* pull-up driven by UDC */ 62 .pullup_pin = -EINVAL, /* pull-up driven by UDC */
61}; 63};
62 64
63/* SPI devices */ 65/* SPI devices */
@@ -76,6 +78,7 @@ static struct at91_mmc_data __initdata flexibity_mmc_data = {
76 .wire4 = 1, 78 .wire4 = 1,
77 .det_pin = AT91_PIN_PC9, 79 .det_pin = AT91_PIN_PC9,
78 .wp_pin = AT91_PIN_PC4, 80 .wp_pin = AT91_PIN_PC4,
81 .vcc_pin = -EINVAL,
79}; 82};
80 83
81/* LEDs */ 84/* LEDs */
diff --git a/arch/arm/mach-at91/board-foxg20.c b/arch/arm/mach-at91/board-foxg20.c
index de8e09642f4e..caf017f0f4ee 100644
--- a/arch/arm/mach-at91/board-foxg20.c
+++ b/arch/arm/mach-at91/board-foxg20.c
@@ -106,6 +106,8 @@ static void __init foxg20_init_early(void)
106 */ 106 */
107static struct at91_usbh_data __initdata foxg20_usbh_data = { 107static struct at91_usbh_data __initdata foxg20_usbh_data = {
108 .ports = 2, 108 .ports = 2,
109 .vbus_pin = {-EINVAL, -EINVAL},
110 .overcurrent_pin= {-EINVAL, -EINVAL},
109}; 111};
110 112
111/* 113/*
@@ -113,7 +115,7 @@ static struct at91_usbh_data __initdata foxg20_usbh_data = {
113 */ 115 */
114static struct at91_udc_data __initdata foxg20_udc_data = { 116static struct at91_udc_data __initdata foxg20_udc_data = {
115 .vbus_pin = AT91_PIN_PC6, 117 .vbus_pin = AT91_PIN_PC6,
116 .pullup_pin = 0, /* pull-up driven by UDC */ 118 .pullup_pin = -EINVAL, /* pull-up driven by UDC */
117}; 119};
118 120
119 121
@@ -147,6 +149,9 @@ static struct macb_platform_data __initdata foxg20_macb_data = {
147static struct at91_mmc_data __initdata foxg20_mmc_data = { 149static struct at91_mmc_data __initdata foxg20_mmc_data = {
148 .slot_b = 1, 150 .slot_b = 1,
149 .wire4 = 1, 151 .wire4 = 1,
152 .det_pin = -EINVAL,
153 .wp_pin = -EINVAL,
154 .vcc_pin = -EINVAL,
150}; 155};
151 156
152 157
diff --git a/arch/arm/mach-at91/board-gsia18s.c b/arch/arm/mach-at91/board-gsia18s.c
index 51c82f151119..230e71969fb7 100644
--- a/arch/arm/mach-at91/board-gsia18s.c
+++ b/arch/arm/mach-at91/board-gsia18s.c
@@ -80,6 +80,8 @@ static void __init gsia18s_init_early(void)
80 */ 80 */
81static struct at91_usbh_data __initdata usbh_data = { 81static struct at91_usbh_data __initdata usbh_data = {
82 .ports = 2, 82 .ports = 2,
83 .vbus_pin = {-EINVAL, -EINVAL},
84 .overcurrent_pin= {-EINVAL, -EINVAL},
83}; 85};
84 86
85/* 87/*
@@ -87,7 +89,7 @@ static struct at91_usbh_data __initdata usbh_data = {
87 */ 89 */
88static struct at91_udc_data __initdata udc_data = { 90static struct at91_udc_data __initdata udc_data = {
89 .vbus_pin = AT91_PIN_PA22, 91 .vbus_pin = AT91_PIN_PA22,
90 .pullup_pin = 0, /* pull-up driven by UDC */ 92 .pullup_pin = -EINVAL, /* pull-up driven by UDC */
91}; 93};
92 94
93/* 95/*
@@ -530,6 +532,7 @@ static struct i2c_board_info __initdata gsia18s_i2c_devices[] = {
530static struct at91_cf_data __initdata gsia18s_cf1_data = { 532static struct at91_cf_data __initdata gsia18s_cf1_data = {
531 .irq_pin = AT91_PIN_PA27, 533 .irq_pin = AT91_PIN_PA27,
532 .det_pin = AT91_PIN_PB30, 534 .det_pin = AT91_PIN_PB30,
535 .vcc_pin = -EINVAL,
533 .rst_pin = AT91_PIN_PB31, 536 .rst_pin = AT91_PIN_PB31,
534 .chipselect = 5, 537 .chipselect = 5,
535 .flags = AT91_CF_TRUE_IDE, 538 .flags = AT91_CF_TRUE_IDE,
diff --git a/arch/arm/mach-at91/board-kafa.c b/arch/arm/mach-at91/board-kafa.c
index 9628a3defcf4..efde1b2327c8 100644
--- a/arch/arm/mach-at91/board-kafa.c
+++ b/arch/arm/mach-at91/board-kafa.c
@@ -68,6 +68,8 @@ static struct macb_platform_data __initdata kafa_eth_data = {
68 68
69static struct at91_usbh_data __initdata kafa_usbh_data = { 69static struct at91_usbh_data __initdata kafa_usbh_data = {
70 .ports = 1, 70 .ports = 1,
71 .vbus_pin = {-EINVAL, -EINVAL},
72 .overcurrent_pin= {-EINVAL, -EINVAL},
71}; 73};
72 74
73static struct at91_udc_data __initdata kafa_udc_data = { 75static struct at91_udc_data __initdata kafa_udc_data = {
diff --git a/arch/arm/mach-at91/board-kb9202.c b/arch/arm/mach-at91/board-kb9202.c
index 5ba5244cb632..d75a4a2ad9c2 100644
--- a/arch/arm/mach-at91/board-kb9202.c
+++ b/arch/arm/mach-at91/board-kb9202.c
@@ -76,6 +76,8 @@ static struct macb_platform_data __initdata kb9202_eth_data = {
76 76
77static struct at91_usbh_data __initdata kb9202_usbh_data = { 77static struct at91_usbh_data __initdata kb9202_usbh_data = {
78 .ports = 1, 78 .ports = 1,
79 .vbus_pin = {-EINVAL, -EINVAL},
80 .overcurrent_pin= {-EINVAL, -EINVAL},
79}; 81};
80 82
81static struct at91_udc_data __initdata kb9202_udc_data = { 83static struct at91_udc_data __initdata kb9202_udc_data = {
@@ -87,6 +89,8 @@ static struct at91_mmc_data __initdata kb9202_mmc_data = {
87 .det_pin = AT91_PIN_PB2, 89 .det_pin = AT91_PIN_PB2,
88 .slot_b = 0, 90 .slot_b = 0,
89 .wire4 = 1, 91 .wire4 = 1,
92 .wp_pin = -EINVAL,
93 .vcc_pin = -EINVAL,
90}; 94};
91 95
92static struct mtd_partition __initdata kb9202_nand_partition[] = { 96static struct mtd_partition __initdata kb9202_nand_partition[] = {
@@ -100,7 +104,7 @@ static struct mtd_partition __initdata kb9202_nand_partition[] = {
100static struct atmel_nand_data __initdata kb9202_nand_data = { 104static struct atmel_nand_data __initdata kb9202_nand_data = {
101 .ale = 22, 105 .ale = 22,
102 .cle = 21, 106 .cle = 21,
103 // .det_pin = ... not there 107 .det_pin = -EINVAL,
104 .rdy_pin = AT91_PIN_PC29, 108 .rdy_pin = AT91_PIN_PC29,
105 .enable_pin = AT91_PIN_PC28, 109 .enable_pin = AT91_PIN_PC28,
106 .parts = kb9202_nand_partition, 110 .parts = kb9202_nand_partition,
diff --git a/arch/arm/mach-at91/board-neocore926.c b/arch/arm/mach-at91/board-neocore926.c
index 56e7aee11b59..3f8617c0e04e 100644
--- a/arch/arm/mach-at91/board-neocore926.c
+++ b/arch/arm/mach-at91/board-neocore926.c
@@ -72,6 +72,7 @@ static void __init neocore926_init_early(void)
72static struct at91_usbh_data __initdata neocore926_usbh_data = { 72static struct at91_usbh_data __initdata neocore926_usbh_data = {
73 .ports = 2, 73 .ports = 2,
74 .vbus_pin = { AT91_PIN_PA24, AT91_PIN_PA21 }, 74 .vbus_pin = { AT91_PIN_PA24, AT91_PIN_PA21 },
75 .overcurrent_pin= {-EINVAL, -EINVAL},
75}; 76};
76 77
77/* 78/*
@@ -79,7 +80,7 @@ static struct at91_usbh_data __initdata neocore926_usbh_data = {
79 */ 80 */
80static struct at91_udc_data __initdata neocore926_udc_data = { 81static struct at91_udc_data __initdata neocore926_udc_data = {
81 .vbus_pin = AT91_PIN_PA25, 82 .vbus_pin = AT91_PIN_PA25,
82 .pullup_pin = 0, /* pull-up driven by UDC */ 83 .pullup_pin = -EINVAL, /* pull-up driven by UDC */
83}; 84};
84 85
85 86
@@ -149,6 +150,7 @@ static struct at91_mmc_data __initdata neocore926_mmc_data = {
149 .wire4 = 1, 150 .wire4 = 1,
150 .det_pin = AT91_PIN_PE18, 151 .det_pin = AT91_PIN_PE18,
151 .wp_pin = AT91_PIN_PE19, 152 .wp_pin = AT91_PIN_PE19,
153 .vcc_pin = -EINVAL,
152}; 154};
153 155
154 156
@@ -190,6 +192,7 @@ static struct atmel_nand_data __initdata neocore926_nand_data = {
190 .enable_pin = AT91_PIN_PD15, 192 .enable_pin = AT91_PIN_PD15,
191 .parts = neocore926_nand_partition, 193 .parts = neocore926_nand_partition,
192 .num_parts = ARRAY_SIZE(neocore926_nand_partition), 194 .num_parts = ARRAY_SIZE(neocore926_nand_partition),
195 .det_pin = -EINVAL,
193}; 196};
194 197
195static struct sam9_smc_config __initdata neocore926_nand_smc_config = { 198static struct sam9_smc_config __initdata neocore926_nand_smc_config = {
@@ -213,7 +216,7 @@ static struct sam9_smc_config __initdata neocore926_nand_smc_config = {
213static void __init neocore926_add_device_nand(void) 216static void __init neocore926_add_device_nand(void)
214{ 217{
215 /* configure chip-select 3 (NAND) */ 218 /* configure chip-select 3 (NAND) */
216 sam9_smc_configure(3, &neocore926_nand_smc_config); 219 sam9_smc_configure(0, 3, &neocore926_nand_smc_config);
217 220
218 at91_add_device_nand(&neocore926_nand_data); 221 at91_add_device_nand(&neocore926_nand_data);
219} 222}
diff --git a/arch/arm/mach-at91/board-pcontrol-g20.c b/arch/arm/mach-at91/board-pcontrol-g20.c
index c545a3e635a4..b4a12fc184c8 100644
--- a/arch/arm/mach-at91/board-pcontrol-g20.c
+++ b/arch/arm/mach-at91/board-pcontrol-g20.c
@@ -96,9 +96,9 @@ static struct sam9_smc_config __initdata pcontrol_smc_config[2] = { {
96static void __init add_device_pcontrol(void) 96static void __init add_device_pcontrol(void)
97{ 97{
98 /* configure chip-select 4 (IO compatible to 8051 X4 ) */ 98 /* configure chip-select 4 (IO compatible to 8051 X4 ) */
99 sam9_smc_configure(4, &pcontrol_smc_config[0]); 99 sam9_smc_configure(0, 4, &pcontrol_smc_config[0]);
100 /* configure chip-select 7 (FerroRAM 256KiBx16bit MR2A16A D4 ) */ 100 /* configure chip-select 7 (FerroRAM 256KiBx16bit MR2A16A D4 ) */
101 sam9_smc_configure(7, &pcontrol_smc_config[1]); 101 sam9_smc_configure(0, 7, &pcontrol_smc_config[1]);
102} 102}
103 103
104 104
@@ -107,6 +107,8 @@ static void __init add_device_pcontrol(void)
107 */ 107 */
108static struct at91_usbh_data __initdata usbh_data = { 108static struct at91_usbh_data __initdata usbh_data = {
109 .ports = 2, 109 .ports = 2,
110 .vbus_pin = {-EINVAL, -EINVAL},
111 .overcurrent_pin= {-EINVAL, -EINVAL},
110}; 112};
111 113
112 114
diff --git a/arch/arm/mach-at91/board-picotux200.c b/arch/arm/mach-at91/board-picotux200.c
index dc18759a24b4..ab024fa11d5c 100644
--- a/arch/arm/mach-at91/board-picotux200.c
+++ b/arch/arm/mach-at91/board-picotux200.c
@@ -67,6 +67,8 @@ static struct macb_platform_data __initdata picotux200_eth_data = {
67 67
68static struct at91_usbh_data __initdata picotux200_usbh_data = { 68static struct at91_usbh_data __initdata picotux200_usbh_data = {
69 .ports = 1, 69 .ports = 1,
70 .vbus_pin = {-EINVAL, -EINVAL},
71 .overcurrent_pin= {-EINVAL, -EINVAL},
70}; 72};
71 73
72static struct at91_mmc_data __initdata picotux200_mmc_data = { 74static struct at91_mmc_data __initdata picotux200_mmc_data = {
@@ -74,6 +76,7 @@ static struct at91_mmc_data __initdata picotux200_mmc_data = {
74 .slot_b = 0, 76 .slot_b = 0,
75 .wire4 = 1, 77 .wire4 = 1,
76 .wp_pin = AT91_PIN_PA17, 78 .wp_pin = AT91_PIN_PA17,
79 .vcc_pin = -EINVAL,
77}; 80};
78 81
79#define PICOTUX200_FLASH_BASE AT91_CHIPSELECT_0 82#define PICOTUX200_FLASH_BASE AT91_CHIPSELECT_0
diff --git a/arch/arm/mach-at91/board-qil-a9260.c b/arch/arm/mach-at91/board-qil-a9260.c
index 5444d6ac514a..e029d220cb84 100644
--- a/arch/arm/mach-at91/board-qil-a9260.c
+++ b/arch/arm/mach-at91/board-qil-a9260.c
@@ -77,6 +77,8 @@ static void __init ek_init_early(void)
77 */ 77 */
78static struct at91_usbh_data __initdata ek_usbh_data = { 78static struct at91_usbh_data __initdata ek_usbh_data = {
79 .ports = 2, 79 .ports = 2,
80 .vbus_pin = {-EINVAL, -EINVAL},
81 .overcurrent_pin= {-EINVAL, -EINVAL},
80}; 82};
81 83
82/* 84/*
@@ -84,7 +86,7 @@ static struct at91_usbh_data __initdata ek_usbh_data = {
84 */ 86 */
85static struct at91_udc_data __initdata ek_udc_data = { 87static struct at91_udc_data __initdata ek_udc_data = {
86 .vbus_pin = AT91_PIN_PC5, 88 .vbus_pin = AT91_PIN_PC5,
87 .pullup_pin = 0, /* pull-up driven by UDC */ 89 .pullup_pin = -EINVAL, /* pull-up driven by UDC */
88}; 90};
89 91
90/* 92/*
@@ -133,7 +135,7 @@ static struct mtd_partition __initdata ek_nand_partition[] = {
133static struct atmel_nand_data __initdata ek_nand_data = { 135static struct atmel_nand_data __initdata ek_nand_data = {
134 .ale = 21, 136 .ale = 21,
135 .cle = 22, 137 .cle = 22,
136// .det_pin = ... not connected 138 .det_pin = -EINVAL,
137 .rdy_pin = AT91_PIN_PC13, 139 .rdy_pin = AT91_PIN_PC13,
138 .enable_pin = AT91_PIN_PC14, 140 .enable_pin = AT91_PIN_PC14,
139 .parts = ek_nand_partition, 141 .parts = ek_nand_partition,
@@ -161,7 +163,7 @@ static struct sam9_smc_config __initdata ek_nand_smc_config = {
161static void __init ek_add_device_nand(void) 163static void __init ek_add_device_nand(void)
162{ 164{
163 /* configure chip-select 3 (NAND) */ 165 /* configure chip-select 3 (NAND) */
164 sam9_smc_configure(3, &ek_nand_smc_config); 166 sam9_smc_configure(0, 3, &ek_nand_smc_config);
165 167
166 at91_add_device_nand(&ek_nand_data); 168 at91_add_device_nand(&ek_nand_data);
167} 169}
@@ -172,9 +174,9 @@ static void __init ek_add_device_nand(void)
172static struct at91_mmc_data __initdata ek_mmc_data = { 174static struct at91_mmc_data __initdata ek_mmc_data = {
173 .slot_b = 0, 175 .slot_b = 0,
174 .wire4 = 1, 176 .wire4 = 1,
175// .det_pin = ... not connected 177 .det_pin = -EINVAL,
176// .wp_pin = ... not connected 178 .wp_pin = -EINVAL,
177// .vcc_pin = ... not connected 179 .vcc_pin = -EINVAL,
178}; 180};
179 181
180/* 182/*
@@ -251,7 +253,7 @@ static void __init ek_board_init(void)
251 /* LEDs */ 253 /* LEDs */
252 at91_gpio_leds(ek_leds, ARRAY_SIZE(ek_leds)); 254 at91_gpio_leds(ek_leds, ARRAY_SIZE(ek_leds));
253 /* shutdown controller, wakeup button (5 msec low) */ 255 /* shutdown controller, wakeup button (5 msec low) */
254 at91_sys_write(AT91_SHDW_MR, AT91_SHDW_CPTWK0_(10) | AT91_SHDW_WKMODE0_LOW 256 at91_shdwc_write(AT91_SHDW_MR, AT91_SHDW_CPTWK0_(10) | AT91_SHDW_WKMODE0_LOW
255 | AT91_SHDW_RTTWKEN); 257 | AT91_SHDW_RTTWKEN);
256} 258}
257 259
diff --git a/arch/arm/mach-at91/board-rm9200dk.c b/arch/arm/mach-at91/board-rm9200dk.c
index 022d0cebda9d..782f37946af5 100644
--- a/arch/arm/mach-at91/board-rm9200dk.c
+++ b/arch/arm/mach-at91/board-rm9200dk.c
@@ -72,6 +72,8 @@ static struct macb_platform_data __initdata dk_eth_data = {
72 72
73static struct at91_usbh_data __initdata dk_usbh_data = { 73static struct at91_usbh_data __initdata dk_usbh_data = {
74 .ports = 2, 74 .ports = 2,
75 .vbus_pin = {-EINVAL, -EINVAL},
76 .overcurrent_pin= {-EINVAL, -EINVAL},
75}; 77};
76 78
77static struct at91_udc_data __initdata dk_udc_data = { 79static struct at91_udc_data __initdata dk_udc_data = {
@@ -80,16 +82,19 @@ static struct at91_udc_data __initdata dk_udc_data = {
80}; 82};
81 83
82static struct at91_cf_data __initdata dk_cf_data = { 84static struct at91_cf_data __initdata dk_cf_data = {
85 .irq_pin = -EINVAL,
83 .det_pin = AT91_PIN_PB0, 86 .det_pin = AT91_PIN_PB0,
87 .vcc_pin = -EINVAL,
84 .rst_pin = AT91_PIN_PC5, 88 .rst_pin = AT91_PIN_PC5,
85 // .irq_pin = ... not connected
86 // .vcc_pin = ... always powered
87}; 89};
88 90
89#ifndef CONFIG_MTD_AT91_DATAFLASH_CARD 91#ifndef CONFIG_MTD_AT91_DATAFLASH_CARD
90static struct at91_mmc_data __initdata dk_mmc_data = { 92static struct at91_mmc_data __initdata dk_mmc_data = {
91 .slot_b = 0, 93 .slot_b = 0,
92 .wire4 = 1, 94 .wire4 = 1,
95 .det_pin = -EINVAL,
96 .wp_pin = -EINVAL,
97 .vcc_pin = -EINVAL,
93}; 98};
94#endif 99#endif
95 100
@@ -143,7 +148,7 @@ static struct atmel_nand_data __initdata dk_nand_data = {
143 .cle = 21, 148 .cle = 21,
144 .det_pin = AT91_PIN_PB1, 149 .det_pin = AT91_PIN_PB1,
145 .rdy_pin = AT91_PIN_PC2, 150 .rdy_pin = AT91_PIN_PC2,
146 // .enable_pin = ... not there 151 .enable_pin = -EINVAL,
147 .parts = dk_nand_partition, 152 .parts = dk_nand_partition,
148 .num_parts = ARRAY_SIZE(dk_nand_partition), 153 .num_parts = ARRAY_SIZE(dk_nand_partition),
149}; 154};
diff --git a/arch/arm/mach-at91/board-rm9200ek.c b/arch/arm/mach-at91/board-rm9200ek.c
index ed275861adef..ef7c12a92246 100644
--- a/arch/arm/mach-at91/board-rm9200ek.c
+++ b/arch/arm/mach-at91/board-rm9200ek.c
@@ -72,6 +72,8 @@ static struct macb_platform_data __initdata ek_eth_data = {
72 72
73static struct at91_usbh_data __initdata ek_usbh_data = { 73static struct at91_usbh_data __initdata ek_usbh_data = {
74 .ports = 2, 74 .ports = 2,
75 .vbus_pin = {-EINVAL, -EINVAL},
76 .overcurrent_pin= {-EINVAL, -EINVAL},
75}; 77};
76 78
77static struct at91_udc_data __initdata ek_udc_data = { 79static struct at91_udc_data __initdata ek_udc_data = {
@@ -85,6 +87,7 @@ static struct at91_mmc_data __initdata ek_mmc_data = {
85 .slot_b = 0, 87 .slot_b = 0,
86 .wire4 = 1, 88 .wire4 = 1,
87 .wp_pin = AT91_PIN_PA17, 89 .wp_pin = AT91_PIN_PA17,
90 .vcc_pin = -EINVAL,
88}; 91};
89#endif 92#endif
90 93
diff --git a/arch/arm/mach-at91/board-rsi-ews.c b/arch/arm/mach-at91/board-rsi-ews.c
index ed3b21f77674..af0750fafa29 100644
--- a/arch/arm/mach-at91/board-rsi-ews.c
+++ b/arch/arm/mach-at91/board-rsi-ews.c
@@ -70,6 +70,8 @@ static struct macb_platform_data rsi_ews_eth_data __initdata = {
70 */ 70 */
71static struct at91_usbh_data rsi_ews_usbh_data __initdata = { 71static struct at91_usbh_data rsi_ews_usbh_data __initdata = {
72 .ports = 1, 72 .ports = 1,
73 .vbus_pin = {-EINVAL, -EINVAL},
74 .overcurrent_pin= {-EINVAL, -EINVAL},
73}; 75};
74 76
75/* 77/*
diff --git a/arch/arm/mach-at91/board-sam9-l9260.c b/arch/arm/mach-at91/board-sam9-l9260.c
index 3e4b50e6f6ab..84bce587735f 100644
--- a/arch/arm/mach-at91/board-sam9-l9260.c
+++ b/arch/arm/mach-at91/board-sam9-l9260.c
@@ -72,6 +72,8 @@ static void __init ek_init_early(void)
72 */ 72 */
73static struct at91_usbh_data __initdata ek_usbh_data = { 73static struct at91_usbh_data __initdata ek_usbh_data = {
74 .ports = 2, 74 .ports = 2,
75 .vbus_pin = {-EINVAL, -EINVAL},
76 .overcurrent_pin= {-EINVAL, -EINVAL},
75}; 77};
76 78
77/* 79/*
@@ -79,7 +81,7 @@ static struct at91_usbh_data __initdata ek_usbh_data = {
79 */ 81 */
80static struct at91_udc_data __initdata ek_udc_data = { 82static struct at91_udc_data __initdata ek_udc_data = {
81 .vbus_pin = AT91_PIN_PC5, 83 .vbus_pin = AT91_PIN_PC5,
82 .pullup_pin = 0, /* pull-up driven by UDC */ 84 .pullup_pin = -EINVAL, /* pull-up driven by UDC */
83}; 85};
84 86
85 87
@@ -134,7 +136,7 @@ static struct mtd_partition __initdata ek_nand_partition[] = {
134static struct atmel_nand_data __initdata ek_nand_data = { 136static struct atmel_nand_data __initdata ek_nand_data = {
135 .ale = 21, 137 .ale = 21,
136 .cle = 22, 138 .cle = 22,
137// .det_pin = ... not connected 139 .det_pin = -EINVAL,
138 .rdy_pin = AT91_PIN_PC13, 140 .rdy_pin = AT91_PIN_PC13,
139 .enable_pin = AT91_PIN_PC14, 141 .enable_pin = AT91_PIN_PC14,
140 .parts = ek_nand_partition, 142 .parts = ek_nand_partition,
@@ -162,7 +164,7 @@ static struct sam9_smc_config __initdata ek_nand_smc_config = {
162static void __init ek_add_device_nand(void) 164static void __init ek_add_device_nand(void)
163{ 165{
164 /* configure chip-select 3 (NAND) */ 166 /* configure chip-select 3 (NAND) */
165 sam9_smc_configure(3, &ek_nand_smc_config); 167 sam9_smc_configure(0, 3, &ek_nand_smc_config);
166 168
167 at91_add_device_nand(&ek_nand_data); 169 at91_add_device_nand(&ek_nand_data);
168} 170}
@@ -176,7 +178,7 @@ static struct at91_mmc_data __initdata ek_mmc_data = {
176 .wire4 = 1, 178 .wire4 = 1,
177 .det_pin = AT91_PIN_PC8, 179 .det_pin = AT91_PIN_PC8,
178 .wp_pin = AT91_PIN_PC4, 180 .wp_pin = AT91_PIN_PC4,
179// .vcc_pin = ... not connected 181 .vcc_pin = -EINVAL,
180}; 182};
181 183
182static void __init ek_board_init(void) 184static void __init ek_board_init(void)
diff --git a/arch/arm/mach-at91/board-sam9260ek.c b/arch/arm/mach-at91/board-sam9260ek.c
index 13478e14a543..be8233bcabdc 100644
--- a/arch/arm/mach-at91/board-sam9260ek.c
+++ b/arch/arm/mach-at91/board-sam9260ek.c
@@ -75,6 +75,8 @@ static void __init ek_init_early(void)
75 */ 75 */
76static struct at91_usbh_data __initdata ek_usbh_data = { 76static struct at91_usbh_data __initdata ek_usbh_data = {
77 .ports = 2, 77 .ports = 2,
78 .vbus_pin = {-EINVAL, -EINVAL},
79 .overcurrent_pin= {-EINVAL, -EINVAL},
78}; 80};
79 81
80/* 82/*
@@ -82,7 +84,7 @@ static struct at91_usbh_data __initdata ek_usbh_data = {
82 */ 84 */
83static struct at91_udc_data __initdata ek_udc_data = { 85static struct at91_udc_data __initdata ek_udc_data = {
84 .vbus_pin = AT91_PIN_PC5, 86 .vbus_pin = AT91_PIN_PC5,
85 .pullup_pin = 0, /* pull-up driven by UDC */ 87 .pullup_pin = -EINVAL, /* pull-up driven by UDC */
86}; 88};
87 89
88 90
@@ -176,7 +178,7 @@ static struct mtd_partition __initdata ek_nand_partition[] = {
176static struct atmel_nand_data __initdata ek_nand_data = { 178static struct atmel_nand_data __initdata ek_nand_data = {
177 .ale = 21, 179 .ale = 21,
178 .cle = 22, 180 .cle = 22,
179// .det_pin = ... not connected 181 .det_pin = -EINVAL,
180 .rdy_pin = AT91_PIN_PC13, 182 .rdy_pin = AT91_PIN_PC13,
181 .enable_pin = AT91_PIN_PC14, 183 .enable_pin = AT91_PIN_PC14,
182 .parts = ek_nand_partition, 184 .parts = ek_nand_partition,
@@ -211,7 +213,7 @@ static void __init ek_add_device_nand(void)
211 ek_nand_smc_config.mode |= AT91_SMC_DBW_8; 213 ek_nand_smc_config.mode |= AT91_SMC_DBW_8;
212 214
213 /* configure chip-select 3 (NAND) */ 215 /* configure chip-select 3 (NAND) */
214 sam9_smc_configure(3, &ek_nand_smc_config); 216 sam9_smc_configure(0, 3, &ek_nand_smc_config);
215 217
216 at91_add_device_nand(&ek_nand_data); 218 at91_add_device_nand(&ek_nand_data);
217} 219}
@@ -223,9 +225,9 @@ static void __init ek_add_device_nand(void)
223static struct at91_mmc_data __initdata ek_mmc_data = { 225static struct at91_mmc_data __initdata ek_mmc_data = {
224 .slot_b = 1, 226 .slot_b = 1,
225 .wire4 = 1, 227 .wire4 = 1,
226// .det_pin = ... not connected 228 .det_pin = -EINVAL,
227// .wp_pin = ... not connected 229 .wp_pin = -EINVAL,
228// .vcc_pin = ... not connected 230 .vcc_pin = -EINVAL,
229}; 231};
230 232
231 233
diff --git a/arch/arm/mach-at91/board-sam9261ek.c b/arch/arm/mach-at91/board-sam9261ek.c
index b005b738e8ff..40895072a1a7 100644
--- a/arch/arm/mach-at91/board-sam9261ek.c
+++ b/arch/arm/mach-at91/board-sam9261ek.c
@@ -131,7 +131,7 @@ static struct sam9_smc_config __initdata dm9000_smc_config = {
131static void __init ek_add_device_dm9000(void) 131static void __init ek_add_device_dm9000(void)
132{ 132{
133 /* Configure chip-select 2 (DM9000) */ 133 /* Configure chip-select 2 (DM9000) */
134 sam9_smc_configure(2, &dm9000_smc_config); 134 sam9_smc_configure(0, 2, &dm9000_smc_config);
135 135
136 /* Configure Reset signal as output */ 136 /* Configure Reset signal as output */
137 at91_set_gpio_output(AT91_PIN_PC10, 0); 137 at91_set_gpio_output(AT91_PIN_PC10, 0);
@@ -151,6 +151,8 @@ static void __init ek_add_device_dm9000(void) {}
151 */ 151 */
152static struct at91_usbh_data __initdata ek_usbh_data = { 152static struct at91_usbh_data __initdata ek_usbh_data = {
153 .ports = 2, 153 .ports = 2,
154 .vbus_pin = {-EINVAL, -EINVAL},
155 .overcurrent_pin= {-EINVAL, -EINVAL},
154}; 156};
155 157
156 158
@@ -159,7 +161,7 @@ static struct at91_usbh_data __initdata ek_usbh_data = {
159 */ 161 */
160static struct at91_udc_data __initdata ek_udc_data = { 162static struct at91_udc_data __initdata ek_udc_data = {
161 .vbus_pin = AT91_PIN_PB29, 163 .vbus_pin = AT91_PIN_PB29,
162 .pullup_pin = 0, /* pull-up driven by UDC */ 164 .pullup_pin = -EINVAL, /* pull-up driven by UDC */
163}; 165};
164 166
165 167
@@ -182,7 +184,7 @@ static struct mtd_partition __initdata ek_nand_partition[] = {
182static struct atmel_nand_data __initdata ek_nand_data = { 184static struct atmel_nand_data __initdata ek_nand_data = {
183 .ale = 22, 185 .ale = 22,
184 .cle = 21, 186 .cle = 21,
185// .det_pin = ... not connected 187 .det_pin = -EINVAL,
186 .rdy_pin = AT91_PIN_PC15, 188 .rdy_pin = AT91_PIN_PC15,
187 .enable_pin = AT91_PIN_PC14, 189 .enable_pin = AT91_PIN_PC14,
188 .parts = ek_nand_partition, 190 .parts = ek_nand_partition,
@@ -217,7 +219,7 @@ static void __init ek_add_device_nand(void)
217 ek_nand_smc_config.mode |= AT91_SMC_DBW_8; 219 ek_nand_smc_config.mode |= AT91_SMC_DBW_8;
218 220
219 /* configure chip-select 3 (NAND) */ 221 /* configure chip-select 3 (NAND) */
220 sam9_smc_configure(3, &ek_nand_smc_config); 222 sam9_smc_configure(0, 3, &ek_nand_smc_config);
221 223
222 at91_add_device_nand(&ek_nand_data); 224 at91_add_device_nand(&ek_nand_data);
223} 225}
@@ -345,6 +347,9 @@ static struct spi_board_info ek_spi_devices[] = {
345 */ 347 */
346static struct at91_mmc_data __initdata ek_mmc_data = { 348static struct at91_mmc_data __initdata ek_mmc_data = {
347 .wire4 = 1, 349 .wire4 = 1,
350 .det_pin = -EINVAL,
351 .wp_pin = -EINVAL,
352 .vcc_pin = -EINVAL,
348}; 353};
349 354
350#endif /* CONFIG_SPI_ATMEL_* */ 355#endif /* CONFIG_SPI_ATMEL_* */
diff --git a/arch/arm/mach-at91/board-sam9263ek.c b/arch/arm/mach-at91/board-sam9263ek.c
index fcf194e6e4fe..29f66052fe63 100644
--- a/arch/arm/mach-at91/board-sam9263ek.c
+++ b/arch/arm/mach-at91/board-sam9263ek.c
@@ -74,6 +74,7 @@ static void __init ek_init_early(void)
74static struct at91_usbh_data __initdata ek_usbh_data = { 74static struct at91_usbh_data __initdata ek_usbh_data = {
75 .ports = 2, 75 .ports = 2,
76 .vbus_pin = { AT91_PIN_PA24, AT91_PIN_PA21 }, 76 .vbus_pin = { AT91_PIN_PA24, AT91_PIN_PA21 },
77 .overcurrent_pin= {-EINVAL, -EINVAL},
77}; 78};
78 79
79/* 80/*
@@ -81,7 +82,7 @@ static struct at91_usbh_data __initdata ek_usbh_data = {
81 */ 82 */
82static struct at91_udc_data __initdata ek_udc_data = { 83static struct at91_udc_data __initdata ek_udc_data = {
83 .vbus_pin = AT91_PIN_PA25, 84 .vbus_pin = AT91_PIN_PA25,
84 .pullup_pin = 0, /* pull-up driven by UDC */ 85 .pullup_pin = -EINVAL, /* pull-up driven by UDC */
85}; 86};
86 87
87 88
@@ -151,7 +152,7 @@ static struct at91_mmc_data __initdata ek_mmc_data = {
151 .wire4 = 1, 152 .wire4 = 1,
152 .det_pin = AT91_PIN_PE18, 153 .det_pin = AT91_PIN_PE18,
153 .wp_pin = AT91_PIN_PE19, 154 .wp_pin = AT91_PIN_PE19,
154// .vcc_pin = ... not connected 155 .vcc_pin = -EINVAL,
155}; 156};
156 157
157 158
@@ -183,7 +184,7 @@ static struct mtd_partition __initdata ek_nand_partition[] = {
183static struct atmel_nand_data __initdata ek_nand_data = { 184static struct atmel_nand_data __initdata ek_nand_data = {
184 .ale = 21, 185 .ale = 21,
185 .cle = 22, 186 .cle = 22,
186// .det_pin = ... not connected 187 .det_pin = -EINVAL,
187 .rdy_pin = AT91_PIN_PA22, 188 .rdy_pin = AT91_PIN_PA22,
188 .enable_pin = AT91_PIN_PD15, 189 .enable_pin = AT91_PIN_PD15,
189 .parts = ek_nand_partition, 190 .parts = ek_nand_partition,
@@ -218,7 +219,7 @@ static void __init ek_add_device_nand(void)
218 ek_nand_smc_config.mode |= AT91_SMC_DBW_8; 219 ek_nand_smc_config.mode |= AT91_SMC_DBW_8;
219 220
220 /* configure chip-select 3 (NAND) */ 221 /* configure chip-select 3 (NAND) */
221 sam9_smc_configure(3, &ek_nand_smc_config); 222 sam9_smc_configure(0, 3, &ek_nand_smc_config);
222 223
223 at91_add_device_nand(&ek_nand_data); 224 at91_add_device_nand(&ek_nand_data);
224} 225}
@@ -353,6 +354,7 @@ static void __init ek_add_device_buttons(void) {}
353 * reset_pin is not connected: NRST 354 * reset_pin is not connected: NRST
354 */ 355 */
355static struct ac97c_platform_data ek_ac97_data = { 356static struct ac97c_platform_data ek_ac97_data = {
357 .reset_pin = -EINVAL,
356}; 358};
357 359
358 360
diff --git a/arch/arm/mach-at91/board-sam9g20ek.c b/arch/arm/mach-at91/board-sam9g20ek.c
index 78d27cc3cc09..843d6286c6f4 100644
--- a/arch/arm/mach-at91/board-sam9g20ek.c
+++ b/arch/arm/mach-at91/board-sam9g20ek.c
@@ -86,6 +86,8 @@ static void __init ek_init_early(void)
86 */ 86 */
87static struct at91_usbh_data __initdata ek_usbh_data = { 87static struct at91_usbh_data __initdata ek_usbh_data = {
88 .ports = 2, 88 .ports = 2,
89 .vbus_pin = {-EINVAL, -EINVAL},
90 .overcurrent_pin= {-EINVAL, -EINVAL},
89}; 91};
90 92
91/* 93/*
@@ -93,7 +95,7 @@ static struct at91_usbh_data __initdata ek_usbh_data = {
93 */ 95 */
94static struct at91_udc_data __initdata ek_udc_data = { 96static struct at91_udc_data __initdata ek_udc_data = {
95 .vbus_pin = AT91_PIN_PC5, 97 .vbus_pin = AT91_PIN_PC5,
96 .pullup_pin = 0, /* pull-up driven by UDC */ 98 .pullup_pin = -EINVAL, /* pull-up driven by UDC */
97}; 99};
98 100
99 101
@@ -163,6 +165,7 @@ static struct atmel_nand_data __initdata ek_nand_data = {
163 .cle = 22, 165 .cle = 22,
164 .rdy_pin = AT91_PIN_PC13, 166 .rdy_pin = AT91_PIN_PC13,
165 .enable_pin = AT91_PIN_PC14, 167 .enable_pin = AT91_PIN_PC14,
168 .det_pin = -EINVAL,
166 .parts = ek_nand_partition, 169 .parts = ek_nand_partition,
167 .num_parts = ARRAY_SIZE(ek_nand_partition), 170 .num_parts = ARRAY_SIZE(ek_nand_partition),
168}; 171};
@@ -195,7 +198,7 @@ static void __init ek_add_device_nand(void)
195 ek_nand_smc_config.mode |= AT91_SMC_DBW_8; 198 ek_nand_smc_config.mode |= AT91_SMC_DBW_8;
196 199
197 /* configure chip-select 3 (NAND) */ 200 /* configure chip-select 3 (NAND) */
198 sam9_smc_configure(3, &ek_nand_smc_config); 201 sam9_smc_configure(0, 3, &ek_nand_smc_config);
199 202
200 at91_add_device_nand(&ek_nand_data); 203 at91_add_device_nand(&ek_nand_data);
201} 204}
@@ -210,6 +213,7 @@ static struct mci_platform_data __initdata ek_mmc_data = {
210 .slot[1] = { 213 .slot[1] = {
211 .bus_width = 4, 214 .bus_width = 4,
212 .detect_pin = AT91_PIN_PC9, 215 .detect_pin = AT91_PIN_PC9,
216 .wp_pin = -EINVAL,
213 }, 217 },
214 218
215}; 219};
@@ -218,6 +222,8 @@ static struct at91_mmc_data __initdata ek_mmc_data = {
218 .slot_b = 1, /* Only one slot so use slot B */ 222 .slot_b = 1, /* Only one slot so use slot B */
219 .wire4 = 1, 223 .wire4 = 1,
220 .det_pin = AT91_PIN_PC9, 224 .det_pin = AT91_PIN_PC9,
225 .wp_pin = -EINVAL,
226 .vcc_pin = -EINVAL,
221}; 227};
222#endif 228#endif
223 229
@@ -227,6 +233,7 @@ static void __init ek_add_device_mmc(void)
227 if (ek_have_2mmc()) { 233 if (ek_have_2mmc()) {
228 ek_mmc_data.slot[0].bus_width = 4; 234 ek_mmc_data.slot[0].bus_width = 4;
229 ek_mmc_data.slot[0].detect_pin = AT91_PIN_PC2; 235 ek_mmc_data.slot[0].detect_pin = AT91_PIN_PC2;
236 ek_mmc_data.slot[0].wp_pin = -1;
230 } 237 }
231 at91_add_device_mci(0, &ek_mmc_data); 238 at91_add_device_mci(0, &ek_mmc_data);
232#else 239#else
diff --git a/arch/arm/mach-at91/board-sam9m10g45ek.c b/arch/arm/mach-at91/board-sam9m10g45ek.c
index 4e1ee9d87096..ea0d1b9c2b7b 100644
--- a/arch/arm/mach-at91/board-sam9m10g45ek.c
+++ b/arch/arm/mach-at91/board-sam9m10g45ek.c
@@ -69,6 +69,7 @@ static void __init ek_init_early(void)
69static struct at91_usbh_data __initdata ek_usbh_hs_data = { 69static struct at91_usbh_data __initdata ek_usbh_hs_data = {
70 .ports = 2, 70 .ports = 2,
71 .vbus_pin = {AT91_PIN_PD1, AT91_PIN_PD3}, 71 .vbus_pin = {AT91_PIN_PD1, AT91_PIN_PD3},
72 .overcurrent_pin= {-EINVAL, -EINVAL},
72}; 73};
73 74
74 75
@@ -100,6 +101,7 @@ static struct mci_platform_data __initdata mci0_data = {
100 .slot[0] = { 101 .slot[0] = {
101 .bus_width = 4, 102 .bus_width = 4,
102 .detect_pin = AT91_PIN_PD10, 103 .detect_pin = AT91_PIN_PD10,
104 .wp_pin = -EINVAL,
103 }, 105 },
104}; 106};
105 107
@@ -143,6 +145,7 @@ static struct atmel_nand_data __initdata ek_nand_data = {
143 .cle = 22, 145 .cle = 22,
144 .rdy_pin = AT91_PIN_PC8, 146 .rdy_pin = AT91_PIN_PC8,
145 .enable_pin = AT91_PIN_PC14, 147 .enable_pin = AT91_PIN_PC14,
148 .det_pin = -EINVAL,
146 .parts = ek_nand_partition, 149 .parts = ek_nand_partition,
147 .num_parts = ARRAY_SIZE(ek_nand_partition), 150 .num_parts = ARRAY_SIZE(ek_nand_partition),
148}; 151};
@@ -175,7 +178,7 @@ static void __init ek_add_device_nand(void)
175 ek_nand_smc_config.mode |= AT91_SMC_DBW_8; 178 ek_nand_smc_config.mode |= AT91_SMC_DBW_8;
176 179
177 /* configure chip-select 3 (NAND) */ 180 /* configure chip-select 3 (NAND) */
178 sam9_smc_configure(3, &ek_nand_smc_config); 181 sam9_smc_configure(0, 3, &ek_nand_smc_config);
179 182
180 at91_add_device_nand(&ek_nand_data); 183 at91_add_device_nand(&ek_nand_data);
181} 184}
@@ -330,6 +333,7 @@ static void __init ek_add_device_buttons(void) {}
330 * reset_pin is not connected: NRST 333 * reset_pin is not connected: NRST
331 */ 334 */
332static struct ac97c_platform_data ek_ac97_data = { 335static struct ac97c_platform_data ek_ac97_data = {
336 .reset_pin = -EINVAL,
333}; 337};
334 338
335 339
diff --git a/arch/arm/mach-at91/board-sam9rlek.c b/arch/arm/mach-at91/board-sam9rlek.c
index b2b748239f36..c1366d0032bf 100644
--- a/arch/arm/mach-at91/board-sam9rlek.c
+++ b/arch/arm/mach-at91/board-sam9rlek.c
@@ -67,8 +67,8 @@ static struct usba_platform_data __initdata ek_usba_udc_data = {
67static struct at91_mmc_data __initdata ek_mmc_data = { 67static struct at91_mmc_data __initdata ek_mmc_data = {
68 .wire4 = 1, 68 .wire4 = 1,
69 .det_pin = AT91_PIN_PA15, 69 .det_pin = AT91_PIN_PA15,
70// .wp_pin = ... not connected 70 .wp_pin = -EINVAL,
71// .vcc_pin = ... not connected 71 .vcc_pin = -EINVAL,
72}; 72};
73 73
74 74
@@ -91,7 +91,7 @@ static struct mtd_partition __initdata ek_nand_partition[] = {
91static struct atmel_nand_data __initdata ek_nand_data = { 91static struct atmel_nand_data __initdata ek_nand_data = {
92 .ale = 21, 92 .ale = 21,
93 .cle = 22, 93 .cle = 22,
94// .det_pin = ... not connected 94 .det_pin = -EINVAL,
95 .rdy_pin = AT91_PIN_PD17, 95 .rdy_pin = AT91_PIN_PD17,
96 .enable_pin = AT91_PIN_PB6, 96 .enable_pin = AT91_PIN_PB6,
97 .parts = ek_nand_partition, 97 .parts = ek_nand_partition,
@@ -119,7 +119,7 @@ static struct sam9_smc_config __initdata ek_nand_smc_config = {
119static void __init ek_add_device_nand(void) 119static void __init ek_add_device_nand(void)
120{ 120{
121 /* configure chip-select 3 (NAND) */ 121 /* configure chip-select 3 (NAND) */
122 sam9_smc_configure(3, &ek_nand_smc_config); 122 sam9_smc_configure(0, 3, &ek_nand_smc_config);
123 123
124 at91_add_device_nand(&ek_nand_data); 124 at91_add_device_nand(&ek_nand_data);
125} 125}
@@ -204,6 +204,7 @@ static struct atmel_lcdfb_info __initdata ek_lcdc_data;
204 * reset_pin is not connected: NRST 204 * reset_pin is not connected: NRST
205 */ 205 */
206static struct ac97c_platform_data ek_ac97_data = { 206static struct ac97c_platform_data ek_ac97_data = {
207 .reset_pin = -EINVAL,
207}; 208};
208 209
209 210
diff --git a/arch/arm/mach-at91/board-snapper9260.c b/arch/arm/mach-at91/board-snapper9260.c
index fbec934a7ce9..4770db08e5a6 100644
--- a/arch/arm/mach-at91/board-snapper9260.c
+++ b/arch/arm/mach-at91/board-snapper9260.c
@@ -57,15 +57,19 @@ static void __init snapper9260_init_early(void)
57 57
58static struct at91_usbh_data __initdata snapper9260_usbh_data = { 58static struct at91_usbh_data __initdata snapper9260_usbh_data = {
59 .ports = 2, 59 .ports = 2,
60 .vbus_pin = {-EINVAL, -EINVAL},
61 .overcurrent_pin= {-EINVAL, -EINVAL},
60}; 62};
61 63
62static struct at91_udc_data __initdata snapper9260_udc_data = { 64static struct at91_udc_data __initdata snapper9260_udc_data = {
63 .vbus_pin = SNAPPER9260_IO_EXP_GPIO(5), 65 .vbus_pin = SNAPPER9260_IO_EXP_GPIO(5),
64 .vbus_active_low = 1, 66 .vbus_active_low = 1,
65 .vbus_polled = 1, 67 .vbus_polled = 1,
68 .pullup_pin = -EINVAL,
66}; 69};
67 70
68static struct macb_platform_data snapper9260_macb_data = { 71static struct macb_platform_data snapper9260_macb_data = {
72 .phy_irq_pin = -EINVAL,
69 .is_rmii = 1, 73 .is_rmii = 1,
70}; 74};
71 75
@@ -104,6 +108,8 @@ static struct atmel_nand_data __initdata snapper9260_nand_data = {
104 .parts = snapper9260_nand_partitions, 108 .parts = snapper9260_nand_partitions,
105 .num_parts = ARRAY_SIZE(snapper9260_nand_partitions), 109 .num_parts = ARRAY_SIZE(snapper9260_nand_partitions),
106 .bus_width_16 = 0, 110 .bus_width_16 = 0,
111 .enable_pin = -EINVAL,
112 .det_pin = -EINVAL,
107}; 113};
108 114
109static struct sam9_smc_config __initdata snapper9260_nand_smc_config = { 115static struct sam9_smc_config __initdata snapper9260_nand_smc_config = {
@@ -149,7 +155,7 @@ static struct i2c_board_info __initdata snapper9260_i2c_devices[] = {
149static void __init snapper9260_add_device_nand(void) 155static void __init snapper9260_add_device_nand(void)
150{ 156{
151 at91_set_A_periph(AT91_PIN_PC14, 0); 157 at91_set_A_periph(AT91_PIN_PC14, 0);
152 sam9_smc_configure(3, &snapper9260_nand_smc_config); 158 sam9_smc_configure(0, 3, &snapper9260_nand_smc_config);
153 at91_add_device_nand(&snapper9260_nand_data); 159 at91_add_device_nand(&snapper9260_nand_data);
154} 160}
155 161
diff --git a/arch/arm/mach-at91/board-stamp9g20.c b/arch/arm/mach-at91/board-stamp9g20.c
index 7c06c07d872b..72eb3b4d9ab6 100644
--- a/arch/arm/mach-at91/board-stamp9g20.c
+++ b/arch/arm/mach-at91/board-stamp9g20.c
@@ -85,6 +85,7 @@ static struct atmel_nand_data __initdata nand_data = {
85 .rdy_pin = AT91_PIN_PC13, 85 .rdy_pin = AT91_PIN_PC13,
86 .enable_pin = AT91_PIN_PC14, 86 .enable_pin = AT91_PIN_PC14,
87 .bus_width_16 = 0, 87 .bus_width_16 = 0,
88 .det_pin = -EINVAL,
88}; 89};
89 90
90static struct sam9_smc_config __initdata nand_smc_config = { 91static struct sam9_smc_config __initdata nand_smc_config = {
@@ -108,7 +109,7 @@ static struct sam9_smc_config __initdata nand_smc_config = {
108static void __init add_device_nand(void) 109static void __init add_device_nand(void)
109{ 110{
110 /* configure chip-select 3 (NAND) */ 111 /* configure chip-select 3 (NAND) */
111 sam9_smc_configure(3, &nand_smc_config); 112 sam9_smc_configure(0, 3, &nand_smc_config);
112 113
113 at91_add_device_nand(&nand_data); 114 at91_add_device_nand(&nand_data);
114} 115}
@@ -122,12 +123,17 @@ static void __init add_device_nand(void)
122static struct mci_platform_data __initdata mmc_data = { 123static struct mci_platform_data __initdata mmc_data = {
123 .slot[0] = { 124 .slot[0] = {
124 .bus_width = 4, 125 .bus_width = 4,
126 .detect_pin = -1,
127 .wp_pin = -1,
125 }, 128 },
126}; 129};
127#else 130#else
128static struct at91_mmc_data __initdata mmc_data = { 131static struct at91_mmc_data __initdata mmc_data = {
129 .slot_b = 0, 132 .slot_b = 0,
130 .wire4 = 1, 133 .wire4 = 1,
134 .det_pin = -EINVAL,
135 .wp_pin = -EINVAL,
136 .vcc_pin = -EINVAL,
131}; 137};
132#endif 138#endif
133 139
@@ -137,6 +143,8 @@ static struct at91_mmc_data __initdata mmc_data = {
137 */ 143 */
138static struct at91_usbh_data __initdata usbh_data = { 144static struct at91_usbh_data __initdata usbh_data = {
139 .ports = 2, 145 .ports = 2,
146 .vbus_pin = {-EINVAL, -EINVAL},
147 .overcurrent_pin= {-EINVAL, -EINVAL},
140}; 148};
141 149
142 150
@@ -145,12 +153,12 @@ static struct at91_usbh_data __initdata usbh_data = {
145 */ 153 */
146static struct at91_udc_data __initdata portuxg20_udc_data = { 154static struct at91_udc_data __initdata portuxg20_udc_data = {
147 .vbus_pin = AT91_PIN_PC7, 155 .vbus_pin = AT91_PIN_PC7,
148 .pullup_pin = 0, /* pull-up driven by UDC */ 156 .pullup_pin = -EINVAL, /* pull-up driven by UDC */
149}; 157};
150 158
151static struct at91_udc_data __initdata stamp9g20evb_udc_data = { 159static struct at91_udc_data __initdata stamp9g20evb_udc_data = {
152 .vbus_pin = AT91_PIN_PA22, 160 .vbus_pin = AT91_PIN_PA22,
153 .pullup_pin = 0, /* pull-up driven by UDC */ 161 .pullup_pin = -EINVAL, /* pull-up driven by UDC */
154}; 162};
155 163
156 164
diff --git a/arch/arm/mach-at91/board-usb-a926x.c b/arch/arm/mach-at91/board-usb-a926x.c
index 3d84233f78eb..26c36fc2d1e5 100644
--- a/arch/arm/mach-at91/board-usb-a926x.c
+++ b/arch/arm/mach-at91/board-usb-a926x.c
@@ -66,6 +66,8 @@ static void __init ek_init_early(void)
66 */ 66 */
67static struct at91_usbh_data __initdata ek_usbh_data = { 67static struct at91_usbh_data __initdata ek_usbh_data = {
68 .ports = 2, 68 .ports = 2,
69 .vbus_pin = {-EINVAL, -EINVAL},
70 .overcurrent_pin= {-EINVAL, -EINVAL},
69}; 71};
70 72
71/* 73/*
@@ -73,7 +75,7 @@ static struct at91_usbh_data __initdata ek_usbh_data = {
73 */ 75 */
74static struct at91_udc_data __initdata ek_udc_data = { 76static struct at91_udc_data __initdata ek_udc_data = {
75 .vbus_pin = AT91_PIN_PB11, 77 .vbus_pin = AT91_PIN_PB11,
76 .pullup_pin = 0, /* pull-up driven by UDC */ 78 .pullup_pin = -EINVAL, /* pull-up driven by UDC */
77}; 79};
78 80
79static void __init ek_add_device_udc(void) 81static void __init ek_add_device_udc(void)
@@ -193,7 +195,7 @@ static struct mtd_partition __initdata ek_nand_partition[] = {
193static struct atmel_nand_data __initdata ek_nand_data = { 195static struct atmel_nand_data __initdata ek_nand_data = {
194 .ale = 21, 196 .ale = 21,
195 .cle = 22, 197 .cle = 22,
196// .det_pin = ... not connected 198 .det_pin = -EINVAL,
197 .rdy_pin = AT91_PIN_PA22, 199 .rdy_pin = AT91_PIN_PA22,
198 .enable_pin = AT91_PIN_PD15, 200 .enable_pin = AT91_PIN_PD15,
199 .parts = ek_nand_partition, 201 .parts = ek_nand_partition,
@@ -245,9 +247,9 @@ static void __init ek_add_device_nand(void)
245 247
246 /* configure chip-select 3 (NAND) */ 248 /* configure chip-select 3 (NAND) */
247 if (machine_is_usb_a9g20()) 249 if (machine_is_usb_a9g20())
248 sam9_smc_configure(3, &usb_a9g20_nand_smc_config); 250 sam9_smc_configure(0, 3, &usb_a9g20_nand_smc_config);
249 else 251 else
250 sam9_smc_configure(3, &usb_a9260_nand_smc_config); 252 sam9_smc_configure(0, 3, &usb_a9260_nand_smc_config);
251 253
252 at91_add_device_nand(&ek_nand_data); 254 at91_add_device_nand(&ek_nand_data);
253} 255}
@@ -344,7 +346,7 @@ static void __init ek_board_init(void)
344 /* I2C */ 346 /* I2C */
345 at91_add_device_i2c(NULL, 0); 347 at91_add_device_i2c(NULL, 0);
346 /* shutdown controller, wakeup button (5 msec low) */ 348 /* shutdown controller, wakeup button (5 msec low) */
347 at91_sys_write(AT91_SHDW_MR, AT91_SHDW_CPTWK0_(10) 349 at91_shdwc_write(AT91_SHDW_MR, AT91_SHDW_CPTWK0_(10)
348 | AT91_SHDW_WKMODE0_LOW 350 | AT91_SHDW_WKMODE0_LOW
349 | AT91_SHDW_RTTWKEN); 351 | AT91_SHDW_RTTWKEN);
350 } 352 }
diff --git a/arch/arm/mach-at91/board-yl-9200.c b/arch/arm/mach-at91/board-yl-9200.c
index 2c40a21b2794..bbd553e1cd93 100644
--- a/arch/arm/mach-at91/board-yl-9200.c
+++ b/arch/arm/mach-at91/board-yl-9200.c
@@ -120,6 +120,8 @@ static struct macb_platform_data __initdata yl9200_eth_data = {
120 */ 120 */
121static struct at91_usbh_data __initdata yl9200_usbh_data = { 121static struct at91_usbh_data __initdata yl9200_usbh_data = {
122 .ports = 1, /* PQFP version of AT91RM9200 */ 122 .ports = 1, /* PQFP version of AT91RM9200 */
123 .vbus_pin = {-EINVAL, -EINVAL},
124 .overcurrent_pin= {-EINVAL, -EINVAL},
123}; 125};
124 126
125/* 127/*
@@ -137,8 +139,9 @@ static struct at91_udc_data __initdata yl9200_udc_data = {
137 */ 139 */
138static struct at91_mmc_data __initdata yl9200_mmc_data = { 140static struct at91_mmc_data __initdata yl9200_mmc_data = {
139 .det_pin = AT91_PIN_PB9, 141 .det_pin = AT91_PIN_PB9,
140 // .wp_pin = ... not connected
141 .wire4 = 1, 142 .wire4 = 1,
143 .wp_pin = -EINVAL,
144 .vcc_pin = -EINVAL,
142}; 145};
143 146
144/* 147/*
@@ -175,7 +178,7 @@ static struct mtd_partition __initdata yl9200_nand_partition[] = {
175static struct atmel_nand_data __initdata yl9200_nand_data = { 178static struct atmel_nand_data __initdata yl9200_nand_data = {
176 .ale = 6, 179 .ale = 6,
177 .cle = 7, 180 .cle = 7,
178 // .det_pin = ... not connected 181 .det_pin = -EINVAL,
179 .rdy_pin = AT91_PIN_PC14, /* R/!B (Sheet10) */ 182 .rdy_pin = AT91_PIN_PC14, /* R/!B (Sheet10) */
180 .enable_pin = AT91_PIN_PC15, /* !CE (Sheet10) */ 183 .enable_pin = AT91_PIN_PC15, /* !CE (Sheet10) */
181 .parts = yl9200_nand_partition, 184 .parts = yl9200_nand_partition,
diff --git a/arch/arm/mach-at91/generic.h b/arch/arm/mach-at91/generic.h
index 938b34f57741..4866b8180d66 100644
--- a/arch/arm/mach-at91/generic.h
+++ b/arch/arm/mach-at91/generic.h
@@ -29,6 +29,7 @@ extern void __init at91_aic_init(unsigned int priority[]);
29 /* Timer */ 29 /* Timer */
30struct sys_timer; 30struct sys_timer;
31extern struct sys_timer at91rm9200_timer; 31extern struct sys_timer at91rm9200_timer;
32extern void at91sam926x_ioremap_pit(u32 addr);
32extern struct sys_timer at91sam926x_timer; 33extern struct sys_timer at91sam926x_timer;
33extern struct sys_timer at91x40_timer; 34extern struct sys_timer at91x40_timer;
34 35
@@ -57,7 +58,10 @@ extern void at91_irq_suspend(void);
57extern void at91_irq_resume(void); 58extern void at91_irq_resume(void);
58 59
59/* reset */ 60/* reset */
60extern void at91sam9_alt_reset(void); 61extern void at91sam9_alt_restart(char, const char *);
62
63/* shutdown */
64extern void at91_ioremap_shdwc(u32 base_addr);
61 65
62 /* GPIO */ 66 /* GPIO */
63#define AT91RM9200_PQFP 3 /* AT91RM9200 PQFP package has 3 banks */ 67#define AT91RM9200_PQFP 3 /* AT91RM9200 PQFP package has 3 banks */
@@ -65,11 +69,9 @@ extern void at91sam9_alt_reset(void);
65 69
66struct at91_gpio_bank { 70struct at91_gpio_bank {
67 unsigned short id; /* peripheral ID */ 71 unsigned short id; /* peripheral ID */
68 unsigned long offset; /* offset from system peripheral base */ 72 unsigned long regbase; /* offset from system peripheral base */
69 struct clk *clock; /* associated clock */
70}; 73};
71extern void __init at91_gpio_init(struct at91_gpio_bank *, int nr_banks); 74extern void __init at91_gpio_init(struct at91_gpio_bank *, int nr_banks);
72extern void __init at91_gpio_irq_setup(void); 75extern void __init at91_gpio_irq_setup(void);
73 76
74extern void (*at91_arch_reset)(void);
75extern int at91_extern_irq; 77extern int at91_extern_irq;
diff --git a/arch/arm/mach-at91/gpio.c b/arch/arm/mach-at91/gpio.c
index 224e9e2f8674..74d6783eeabb 100644
--- a/arch/arm/mach-at91/gpio.c
+++ b/arch/arm/mach-at91/gpio.c
@@ -29,8 +29,9 @@
29struct at91_gpio_chip { 29struct at91_gpio_chip {
30 struct gpio_chip chip; 30 struct gpio_chip chip;
31 struct at91_gpio_chip *next; /* Bank sharing same clock */ 31 struct at91_gpio_chip *next; /* Bank sharing same clock */
32 struct at91_gpio_bank *bank; /* Bank definition */ 32 int id; /* ID of register bank */
33 void __iomem *regbase; /* Base of register bank */ 33 void __iomem *regbase; /* Base of register bank */
34 struct clk *clock; /* associated clock */
34}; 35};
35 36
36#define to_at91_gpio_chip(c) container_of(c, struct at91_gpio_chip, chip) 37#define to_at91_gpio_chip(c) container_of(c, struct at91_gpio_chip, chip)
@@ -58,18 +59,17 @@ static int at91_gpiolib_direction_input(struct gpio_chip *chip,
58 } 59 }
59 60
60static struct at91_gpio_chip gpio_chip[] = { 61static struct at91_gpio_chip gpio_chip[] = {
61 AT91_GPIO_CHIP("A", 0x00 + PIN_BASE, 32), 62 AT91_GPIO_CHIP("pioA", 0x00, 32),
62 AT91_GPIO_CHIP("B", 0x20 + PIN_BASE, 32), 63 AT91_GPIO_CHIP("pioB", 0x20, 32),
63 AT91_GPIO_CHIP("C", 0x40 + PIN_BASE, 32), 64 AT91_GPIO_CHIP("pioC", 0x40, 32),
64 AT91_GPIO_CHIP("D", 0x60 + PIN_BASE, 32), 65 AT91_GPIO_CHIP("pioD", 0x60, 32),
65 AT91_GPIO_CHIP("E", 0x80 + PIN_BASE, 32), 66 AT91_GPIO_CHIP("pioE", 0x80, 32),
66}; 67};
67 68
68static int gpio_banks; 69static int gpio_banks;
69 70
70static inline void __iomem *pin_to_controller(unsigned pin) 71static inline void __iomem *pin_to_controller(unsigned pin)
71{ 72{
72 pin -= PIN_BASE;
73 pin /= 32; 73 pin /= 32;
74 if (likely(pin < gpio_banks)) 74 if (likely(pin < gpio_banks))
75 return gpio_chip[pin].regbase; 75 return gpio_chip[pin].regbase;
@@ -79,7 +79,6 @@ static inline void __iomem *pin_to_controller(unsigned pin)
79 79
80static inline unsigned pin_to_mask(unsigned pin) 80static inline unsigned pin_to_mask(unsigned pin)
81{ 81{
82 pin -= PIN_BASE;
83 return 1 << (pin % 32); 82 return 1 << (pin % 32);
84} 83}
85 84
@@ -274,8 +273,9 @@ static u32 backups[MAX_GPIO_BANKS];
274 273
275static int gpio_irq_set_wake(struct irq_data *d, unsigned state) 274static int gpio_irq_set_wake(struct irq_data *d, unsigned state)
276{ 275{
277 unsigned mask = pin_to_mask(d->irq); 276 unsigned pin = irq_to_gpio(d->irq);
278 unsigned bank = (d->irq - PIN_BASE) / 32; 277 unsigned mask = pin_to_mask(pin);
278 unsigned bank = pin / 32;
279 279
280 if (unlikely(bank >= MAX_GPIO_BANKS)) 280 if (unlikely(bank >= MAX_GPIO_BANKS))
281 return -EINVAL; 281 return -EINVAL;
@@ -285,7 +285,7 @@ static int gpio_irq_set_wake(struct irq_data *d, unsigned state)
285 else 285 else
286 wakeups[bank] &= ~mask; 286 wakeups[bank] &= ~mask;
287 287
288 irq_set_irq_wake(gpio_chip[bank].bank->id, state); 288 irq_set_irq_wake(gpio_chip[bank].id, state);
289 289
290 return 0; 290 return 0;
291} 291}
@@ -302,7 +302,7 @@ void at91_gpio_suspend(void)
302 __raw_writel(wakeups[i], pio + PIO_IER); 302 __raw_writel(wakeups[i], pio + PIO_IER);
303 303
304 if (!wakeups[i]) 304 if (!wakeups[i])
305 clk_disable(gpio_chip[i].bank->clock); 305 clk_disable(gpio_chip[i].clock);
306 else { 306 else {
307#ifdef CONFIG_PM_DEBUG 307#ifdef CONFIG_PM_DEBUG
308 printk(KERN_DEBUG "GPIO-%c may wake for %08x\n", 'A'+i, wakeups[i]); 308 printk(KERN_DEBUG "GPIO-%c may wake for %08x\n", 'A'+i, wakeups[i]);
@@ -319,7 +319,7 @@ void at91_gpio_resume(void)
319 void __iomem *pio = gpio_chip[i].regbase; 319 void __iomem *pio = gpio_chip[i].regbase;
320 320
321 if (!wakeups[i]) 321 if (!wakeups[i])
322 clk_enable(gpio_chip[i].bank->clock); 322 clk_enable(gpio_chip[i].clock);
323 323
324 __raw_writel(wakeups[i], pio + PIO_IDR); 324 __raw_writel(wakeups[i], pio + PIO_IDR);
325 __raw_writel(backups[i], pio + PIO_IER); 325 __raw_writel(backups[i], pio + PIO_IER);
@@ -344,8 +344,9 @@ void at91_gpio_resume(void)
344 344
345static void gpio_irq_mask(struct irq_data *d) 345static void gpio_irq_mask(struct irq_data *d)
346{ 346{
347 void __iomem *pio = pin_to_controller(d->irq); 347 unsigned pin = irq_to_gpio(d->irq);
348 unsigned mask = pin_to_mask(d->irq); 348 void __iomem *pio = pin_to_controller(pin);
349 unsigned mask = pin_to_mask(pin);
349 350
350 if (pio) 351 if (pio)
351 __raw_writel(mask, pio + PIO_IDR); 352 __raw_writel(mask, pio + PIO_IDR);
@@ -353,8 +354,9 @@ static void gpio_irq_mask(struct irq_data *d)
353 354
354static void gpio_irq_unmask(struct irq_data *d) 355static void gpio_irq_unmask(struct irq_data *d)
355{ 356{
356 void __iomem *pio = pin_to_controller(d->irq); 357 unsigned pin = irq_to_gpio(d->irq);
357 unsigned mask = pin_to_mask(d->irq); 358 void __iomem *pio = pin_to_controller(pin);
359 unsigned mask = pin_to_mask(pin);
358 360
359 if (pio) 361 if (pio)
360 __raw_writel(mask, pio + PIO_IER); 362 __raw_writel(mask, pio + PIO_IER);
@@ -382,7 +384,7 @@ static struct irq_chip gpio_irqchip = {
382 384
383static void gpio_irq_handler(unsigned irq, struct irq_desc *desc) 385static void gpio_irq_handler(unsigned irq, struct irq_desc *desc)
384{ 386{
385 unsigned pin; 387 unsigned irq_pin;
386 struct irq_data *idata = irq_desc_get_irq_data(desc); 388 struct irq_data *idata = irq_desc_get_irq_data(desc);
387 struct irq_chip *chip = irq_data_get_irq_chip(idata); 389 struct irq_chip *chip = irq_data_get_irq_chip(idata);
388 struct at91_gpio_chip *at91_gpio = irq_data_get_irq_chip_data(idata); 390 struct at91_gpio_chip *at91_gpio = irq_data_get_irq_chip_data(idata);
@@ -405,12 +407,12 @@ static void gpio_irq_handler(unsigned irq, struct irq_desc *desc)
405 continue; 407 continue;
406 } 408 }
407 409
408 pin = at91_gpio->chip.base; 410 irq_pin = gpio_to_irq(at91_gpio->chip.base);
409 411
410 while (isr) { 412 while (isr) {
411 if (isr & 1) 413 if (isr & 1)
412 generic_handle_irq(pin); 414 generic_handle_irq(irq_pin);
413 pin++; 415 irq_pin++;
414 isr >>= 1; 416 isr >>= 1;
415 } 417 }
416 } 418 }
@@ -438,7 +440,7 @@ static int at91_gpio_show(struct seq_file *s, void *unused)
438 seq_printf(s, "%i:\t", j); 440 seq_printf(s, "%i:\t", j);
439 441
440 for (bank = 0; bank < gpio_banks; bank++) { 442 for (bank = 0; bank < gpio_banks; bank++) {
441 unsigned pin = PIN_BASE + (32 * bank) + j; 443 unsigned pin = (32 * bank) + j;
442 void __iomem *pio = pin_to_controller(pin); 444 void __iomem *pio = pin_to_controller(pin);
443 unsigned mask = pin_to_mask(pin); 445 unsigned mask = pin_to_mask(pin);
444 446
@@ -491,27 +493,28 @@ static struct lock_class_key gpio_lock_class;
491 */ 493 */
492void __init at91_gpio_irq_setup(void) 494void __init at91_gpio_irq_setup(void)
493{ 495{
494 unsigned pioc, pin; 496 unsigned pioc, irq = gpio_to_irq(0);
495 struct at91_gpio_chip *this, *prev; 497 struct at91_gpio_chip *this, *prev;
496 498
497 for (pioc = 0, pin = PIN_BASE, this = gpio_chip, prev = NULL; 499 for (pioc = 0, this = gpio_chip, prev = NULL;
498 pioc++ < gpio_banks; 500 pioc++ < gpio_banks;
499 prev = this, this++) { 501 prev = this, this++) {
500 unsigned id = this->bank->id; 502 unsigned id = this->id;
501 unsigned i; 503 unsigned i;
502 504
503 __raw_writel(~0, this->regbase + PIO_IDR); 505 __raw_writel(~0, this->regbase + PIO_IDR);
504 506
505 for (i = 0, pin = this->chip.base; i < 32; i++, pin++) { 507 for (i = 0, irq = gpio_to_irq(this->chip.base); i < 32;
506 irq_set_lockdep_class(pin, &gpio_lock_class); 508 i++, irq++) {
509 irq_set_lockdep_class(irq, &gpio_lock_class);
507 510
508 /* 511 /*
509 * Can use the "simple" and not "edge" handler since it's 512 * Can use the "simple" and not "edge" handler since it's
510 * shorter, and the AIC handles interrupts sanely. 513 * shorter, and the AIC handles interrupts sanely.
511 */ 514 */
512 irq_set_chip_and_handler(pin, &gpio_irqchip, 515 irq_set_chip_and_handler(irq, &gpio_irqchip,
513 handle_simple_irq); 516 handle_simple_irq);
514 set_irq_flags(pin, IRQF_VALID); 517 set_irq_flags(irq, IRQF_VALID);
515 } 518 }
516 519
517 /* The toplevel handler handles one bank of GPIOs, except 520 /* The toplevel handler handles one bank of GPIOs, except
@@ -524,7 +527,7 @@ void __init at91_gpio_irq_setup(void)
524 irq_set_chip_data(id, this); 527 irq_set_chip_data(id, this);
525 irq_set_chained_handler(id, gpio_irq_handler); 528 irq_set_chained_handler(id, gpio_irq_handler);
526 } 529 }
527 pr_info("AT91: %d gpio irqs in %d banks\n", pin - PIN_BASE, gpio_banks); 530 pr_info("AT91: %d gpio irqs in %d banks\n", irq - gpio_to_irq(0), gpio_banks);
528} 531}
529 532
530/* gpiolib support */ 533/* gpiolib support */
@@ -612,16 +615,26 @@ void __init at91_gpio_init(struct at91_gpio_bank *data, int nr_banks)
612 for (i = 0; i < nr_banks; i++) { 615 for (i = 0; i < nr_banks; i++) {
613 at91_gpio = &gpio_chip[i]; 616 at91_gpio = &gpio_chip[i];
614 617
615 at91_gpio->bank = &data[i]; 618 at91_gpio->id = data[i].id;
616 at91_gpio->chip.base = PIN_BASE + i * 32; 619 at91_gpio->chip.base = i * 32;
617 at91_gpio->regbase = at91_gpio->bank->offset + 620
618 (void __iomem *)AT91_VA_BASE_SYS; 621 at91_gpio->regbase = ioremap(data[i].regbase, 512);
622 if (!at91_gpio->regbase) {
623 pr_err("at91_gpio.%d, failed to map registers, ignoring.\n", i);
624 continue;
625 }
626
627 at91_gpio->clock = clk_get_sys(NULL, at91_gpio->chip.label);
628 if (!at91_gpio->clock) {
629 pr_err("at91_gpio.%d, failed to get clock, ignoring.\n", i);
630 continue;
631 }
619 632
620 /* enable PIO controller's clock */ 633 /* enable PIO controller's clock */
621 clk_enable(at91_gpio->bank->clock); 634 clk_enable(at91_gpio->clock);
622 635
623 /* AT91SAM9263_ID_PIOCDE groups PIOC, PIOD, PIOE */ 636 /* AT91SAM9263_ID_PIOCDE groups PIOC, PIOD, PIOE */
624 if (last && last->bank->id == at91_gpio->bank->id) 637 if (last && last->id == at91_gpio->id)
625 last->next = at91_gpio; 638 last->next = at91_gpio;
626 last = at91_gpio; 639 last = at91_gpio;
627 640
diff --git a/arch/arm/mach-at91/include/mach/at91_aic.h b/arch/arm/mach-at91/include/mach/at91_aic.h
index 03566799d3be..3045781c473f 100644
--- a/arch/arm/mach-at91/include/mach/at91_aic.h
+++ b/arch/arm/mach-at91/include/mach/at91_aic.h
@@ -16,7 +16,19 @@
16#ifndef AT91_AIC_H 16#ifndef AT91_AIC_H
17#define AT91_AIC_H 17#define AT91_AIC_H
18 18
19#define AT91_AIC_SMR(n) (AT91_AIC + ((n) * 4)) /* Source Mode Registers 0-31 */ 19#ifndef __ASSEMBLY__
20extern void __iomem *at91_aic_base;
21
22#define at91_aic_read(field) \
23 __raw_readl(at91_aic_base + field)
24
25#define at91_aic_write(field, value) \
26 __raw_writel(value, at91_aic_base + field);
27#else
28.extern at91_aic_base
29#endif
30
31#define AT91_AIC_SMR(n) ((n) * 4) /* Source Mode Registers 0-31 */
20#define AT91_AIC_PRIOR (7 << 0) /* Priority Level */ 32#define AT91_AIC_PRIOR (7 << 0) /* Priority Level */
21#define AT91_AIC_SRCTYPE (3 << 5) /* Interrupt Source Type */ 33#define AT91_AIC_SRCTYPE (3 << 5) /* Interrupt Source Type */
22#define AT91_AIC_SRCTYPE_LOW (0 << 5) 34#define AT91_AIC_SRCTYPE_LOW (0 << 5)
@@ -24,30 +36,30 @@
24#define AT91_AIC_SRCTYPE_HIGH (2 << 5) 36#define AT91_AIC_SRCTYPE_HIGH (2 << 5)
25#define AT91_AIC_SRCTYPE_RISING (3 << 5) 37#define AT91_AIC_SRCTYPE_RISING (3 << 5)
26 38
27#define AT91_AIC_SVR(n) (AT91_AIC + 0x80 + ((n) * 4)) /* Source Vector Registers 0-31 */ 39#define AT91_AIC_SVR(n) (0x80 + ((n) * 4)) /* Source Vector Registers 0-31 */
28#define AT91_AIC_IVR (AT91_AIC + 0x100) /* Interrupt Vector Register */ 40#define AT91_AIC_IVR 0x100 /* Interrupt Vector Register */
29#define AT91_AIC_FVR (AT91_AIC + 0x104) /* Fast Interrupt Vector Register */ 41#define AT91_AIC_FVR 0x104 /* Fast Interrupt Vector Register */
30#define AT91_AIC_ISR (AT91_AIC + 0x108) /* Interrupt Status Register */ 42#define AT91_AIC_ISR 0x108 /* Interrupt Status Register */
31#define AT91_AIC_IRQID (0x1f << 0) /* Current Interrupt Identifier */ 43#define AT91_AIC_IRQID (0x1f << 0) /* Current Interrupt Identifier */
32 44
33#define AT91_AIC_IPR (AT91_AIC + 0x10c) /* Interrupt Pending Register */ 45#define AT91_AIC_IPR 0x10c /* Interrupt Pending Register */
34#define AT91_AIC_IMR (AT91_AIC + 0x110) /* Interrupt Mask Register */ 46#define AT91_AIC_IMR 0x110 /* Interrupt Mask Register */
35#define AT91_AIC_CISR (AT91_AIC + 0x114) /* Core Interrupt Status Register */ 47#define AT91_AIC_CISR 0x114 /* Core Interrupt Status Register */
36#define AT91_AIC_NFIQ (1 << 0) /* nFIQ Status */ 48#define AT91_AIC_NFIQ (1 << 0) /* nFIQ Status */
37#define AT91_AIC_NIRQ (1 << 1) /* nIRQ Status */ 49#define AT91_AIC_NIRQ (1 << 1) /* nIRQ Status */
38 50
39#define AT91_AIC_IECR (AT91_AIC + 0x120) /* Interrupt Enable Command Register */ 51#define AT91_AIC_IECR 0x120 /* Interrupt Enable Command Register */
40#define AT91_AIC_IDCR (AT91_AIC + 0x124) /* Interrupt Disable Command Register */ 52#define AT91_AIC_IDCR 0x124 /* Interrupt Disable Command Register */
41#define AT91_AIC_ICCR (AT91_AIC + 0x128) /* Interrupt Clear Command Register */ 53#define AT91_AIC_ICCR 0x128 /* Interrupt Clear Command Register */
42#define AT91_AIC_ISCR (AT91_AIC + 0x12c) /* Interrupt Set Command Register */ 54#define AT91_AIC_ISCR 0x12c /* Interrupt Set Command Register */
43#define AT91_AIC_EOICR (AT91_AIC + 0x130) /* End of Interrupt Command Register */ 55#define AT91_AIC_EOICR 0x130 /* End of Interrupt Command Register */
44#define AT91_AIC_SPU (AT91_AIC + 0x134) /* Spurious Interrupt Vector Register */ 56#define AT91_AIC_SPU 0x134 /* Spurious Interrupt Vector Register */
45#define AT91_AIC_DCR (AT91_AIC + 0x138) /* Debug Control Register */ 57#define AT91_AIC_DCR 0x138 /* Debug Control Register */
46#define AT91_AIC_DCR_PROT (1 << 0) /* Protection Mode */ 58#define AT91_AIC_DCR_PROT (1 << 0) /* Protection Mode */
47#define AT91_AIC_DCR_GMSK (1 << 1) /* General Mask */ 59#define AT91_AIC_DCR_GMSK (1 << 1) /* General Mask */
48 60
49#define AT91_AIC_FFER (AT91_AIC + 0x140) /* Fast Forcing Enable Register [SAM9 only] */ 61#define AT91_AIC_FFER 0x140 /* Fast Forcing Enable Register [SAM9 only] */
50#define AT91_AIC_FFDR (AT91_AIC + 0x144) /* Fast Forcing Disable Register [SAM9 only] */ 62#define AT91_AIC_FFDR 0x144 /* Fast Forcing Disable Register [SAM9 only] */
51#define AT91_AIC_FFSR (AT91_AIC + 0x148) /* Fast Forcing Status Register [SAM9 only] */ 63#define AT91_AIC_FFSR 0x148 /* Fast Forcing Status Register [SAM9 only] */
52 64
53#endif 65#endif
diff --git a/arch/arm/mach-at91/include/mach/at91_dbgu.h b/arch/arm/mach-at91/include/mach/at91_dbgu.h
index dbfe455a4c41..2aa0c5e13495 100644
--- a/arch/arm/mach-at91/include/mach/at91_dbgu.h
+++ b/arch/arm/mach-at91/include/mach/at91_dbgu.h
@@ -19,7 +19,7 @@
19#define dbgu_readl(dbgu, field) \ 19#define dbgu_readl(dbgu, field) \
20 __raw_readl(AT91_VA_BASE_SYS + dbgu + AT91_DBGU_ ## field) 20 __raw_readl(AT91_VA_BASE_SYS + dbgu + AT91_DBGU_ ## field)
21 21
22#ifdef AT91_DBGU 22#if !defined(CONFIG_ARCH_AT91X40)
23#define AT91_DBGU_CR (0x00) /* Control Register */ 23#define AT91_DBGU_CR (0x00) /* Control Register */
24#define AT91_DBGU_MR (0x04) /* Mode Register */ 24#define AT91_DBGU_MR (0x04) /* Mode Register */
25#define AT91_DBGU_IER (0x08) /* Interrupt Enable Register */ 25#define AT91_DBGU_IER (0x08) /* Interrupt Enable Register */
diff --git a/arch/arm/mach-at91/include/mach/at91_pit.h b/arch/arm/mach-at91/include/mach/at91_pit.h
index 974d0bd05b5b..d1f80ad7f4d4 100644
--- a/arch/arm/mach-at91/include/mach/at91_pit.h
+++ b/arch/arm/mach-at91/include/mach/at91_pit.h
@@ -16,16 +16,16 @@
16#ifndef AT91_PIT_H 16#ifndef AT91_PIT_H
17#define AT91_PIT_H 17#define AT91_PIT_H
18 18
19#define AT91_PIT_MR (AT91_PIT + 0x00) /* Mode Register */ 19#define AT91_PIT_MR 0x00 /* Mode Register */
20#define AT91_PIT_PITIEN (1 << 25) /* Timer Interrupt Enable */ 20#define AT91_PIT_PITIEN (1 << 25) /* Timer Interrupt Enable */
21#define AT91_PIT_PITEN (1 << 24) /* Timer Enabled */ 21#define AT91_PIT_PITEN (1 << 24) /* Timer Enabled */
22#define AT91_PIT_PIV (0xfffff) /* Periodic Interval Value */ 22#define AT91_PIT_PIV (0xfffff) /* Periodic Interval Value */
23 23
24#define AT91_PIT_SR (AT91_PIT + 0x04) /* Status Register */ 24#define AT91_PIT_SR 0x04 /* Status Register */
25#define AT91_PIT_PITS (1 << 0) /* Timer Status */ 25#define AT91_PIT_PITS (1 << 0) /* Timer Status */
26 26
27#define AT91_PIT_PIVR (AT91_PIT + 0x08) /* Periodic Interval Value Register */ 27#define AT91_PIT_PIVR 0x08 /* Periodic Interval Value Register */
28#define AT91_PIT_PIIR (AT91_PIT + 0x0c) /* Periodic Interval Image Register */ 28#define AT91_PIT_PIIR 0x0c /* Periodic Interval Image Register */
29#define AT91_PIT_PICNT (0xfff << 20) /* Interval Counter */ 29#define AT91_PIT_PICNT (0xfff << 20) /* Interval Counter */
30#define AT91_PIT_CPIV (0xfffff) /* Inverval Value */ 30#define AT91_PIT_CPIV (0xfffff) /* Inverval Value */
31 31
diff --git a/arch/arm/mach-at91/include/mach/at91_rtc.h b/arch/arm/mach-at91/include/mach/at91_rtc.h
index e56f4701a3e5..da1945e5f714 100644
--- a/arch/arm/mach-at91/include/mach/at91_rtc.h
+++ b/arch/arm/mach-at91/include/mach/at91_rtc.h
@@ -16,7 +16,7 @@
16#ifndef AT91_RTC_H 16#ifndef AT91_RTC_H
17#define AT91_RTC_H 17#define AT91_RTC_H
18 18
19#define AT91_RTC_CR (AT91_RTC + 0x00) /* Control Register */ 19#define AT91_RTC_CR 0x00 /* Control Register */
20#define AT91_RTC_UPDTIM (1 << 0) /* Update Request Time Register */ 20#define AT91_RTC_UPDTIM (1 << 0) /* Update Request Time Register */
21#define AT91_RTC_UPDCAL (1 << 1) /* Update Request Calendar Register */ 21#define AT91_RTC_UPDCAL (1 << 1) /* Update Request Calendar Register */
22#define AT91_RTC_TIMEVSEL (3 << 8) /* Time Event Selection */ 22#define AT91_RTC_TIMEVSEL (3 << 8) /* Time Event Selection */
@@ -29,44 +29,44 @@
29#define AT91_RTC_CALEVSEL_MONTH (1 << 16) 29#define AT91_RTC_CALEVSEL_MONTH (1 << 16)
30#define AT91_RTC_CALEVSEL_YEAR (2 << 16) 30#define AT91_RTC_CALEVSEL_YEAR (2 << 16)
31 31
32#define AT91_RTC_MR (AT91_RTC + 0x04) /* Mode Register */ 32#define AT91_RTC_MR 0x04 /* Mode Register */
33#define AT91_RTC_HRMOD (1 << 0) /* 12/24 Hour Mode */ 33#define AT91_RTC_HRMOD (1 << 0) /* 12/24 Hour Mode */
34 34
35#define AT91_RTC_TIMR (AT91_RTC + 0x08) /* Time Register */ 35#define AT91_RTC_TIMR 0x08 /* Time Register */
36#define AT91_RTC_SEC (0x7f << 0) /* Current Second */ 36#define AT91_RTC_SEC (0x7f << 0) /* Current Second */
37#define AT91_RTC_MIN (0x7f << 8) /* Current Minute */ 37#define AT91_RTC_MIN (0x7f << 8) /* Current Minute */
38#define AT91_RTC_HOUR (0x3f << 16) /* Current Hour */ 38#define AT91_RTC_HOUR (0x3f << 16) /* Current Hour */
39#define AT91_RTC_AMPM (1 << 22) /* Ante Meridiem Post Meridiem Indicator */ 39#define AT91_RTC_AMPM (1 << 22) /* Ante Meridiem Post Meridiem Indicator */
40 40
41#define AT91_RTC_CALR (AT91_RTC + 0x0c) /* Calendar Register */ 41#define AT91_RTC_CALR 0x0c /* Calendar Register */
42#define AT91_RTC_CENT (0x7f << 0) /* Current Century */ 42#define AT91_RTC_CENT (0x7f << 0) /* Current Century */
43#define AT91_RTC_YEAR (0xff << 8) /* Current Year */ 43#define AT91_RTC_YEAR (0xff << 8) /* Current Year */
44#define AT91_RTC_MONTH (0x1f << 16) /* Current Month */ 44#define AT91_RTC_MONTH (0x1f << 16) /* Current Month */
45#define AT91_RTC_DAY (7 << 21) /* Current Day */ 45#define AT91_RTC_DAY (7 << 21) /* Current Day */
46#define AT91_RTC_DATE (0x3f << 24) /* Current Date */ 46#define AT91_RTC_DATE (0x3f << 24) /* Current Date */
47 47
48#define AT91_RTC_TIMALR (AT91_RTC + 0x10) /* Time Alarm Register */ 48#define AT91_RTC_TIMALR 0x10 /* Time Alarm Register */
49#define AT91_RTC_SECEN (1 << 7) /* Second Alarm Enable */ 49#define AT91_RTC_SECEN (1 << 7) /* Second Alarm Enable */
50#define AT91_RTC_MINEN (1 << 15) /* Minute Alarm Enable */ 50#define AT91_RTC_MINEN (1 << 15) /* Minute Alarm Enable */
51#define AT91_RTC_HOUREN (1 << 23) /* Hour Alarm Enable */ 51#define AT91_RTC_HOUREN (1 << 23) /* Hour Alarm Enable */
52 52
53#define AT91_RTC_CALALR (AT91_RTC + 0x14) /* Calendar Alarm Register */ 53#define AT91_RTC_CALALR 0x14 /* Calendar Alarm Register */
54#define AT91_RTC_MTHEN (1 << 23) /* Month Alarm Enable */ 54#define AT91_RTC_MTHEN (1 << 23) /* Month Alarm Enable */
55#define AT91_RTC_DATEEN (1 << 31) /* Date Alarm Enable */ 55#define AT91_RTC_DATEEN (1 << 31) /* Date Alarm Enable */
56 56
57#define AT91_RTC_SR (AT91_RTC + 0x18) /* Status Register */ 57#define AT91_RTC_SR 0x18 /* Status Register */
58#define AT91_RTC_ACKUPD (1 << 0) /* Acknowledge for Update */ 58#define AT91_RTC_ACKUPD (1 << 0) /* Acknowledge for Update */
59#define AT91_RTC_ALARM (1 << 1) /* Alarm Flag */ 59#define AT91_RTC_ALARM (1 << 1) /* Alarm Flag */
60#define AT91_RTC_SECEV (1 << 2) /* Second Event */ 60#define AT91_RTC_SECEV (1 << 2) /* Second Event */
61#define AT91_RTC_TIMEV (1 << 3) /* Time Event */ 61#define AT91_RTC_TIMEV (1 << 3) /* Time Event */
62#define AT91_RTC_CALEV (1 << 4) /* Calendar Event */ 62#define AT91_RTC_CALEV (1 << 4) /* Calendar Event */
63 63
64#define AT91_RTC_SCCR (AT91_RTC + 0x1c) /* Status Clear Command Register */ 64#define AT91_RTC_SCCR 0x1c /* Status Clear Command Register */
65#define AT91_RTC_IER (AT91_RTC + 0x20) /* Interrupt Enable Register */ 65#define AT91_RTC_IER 0x20 /* Interrupt Enable Register */
66#define AT91_RTC_IDR (AT91_RTC + 0x24) /* Interrupt Disable Register */ 66#define AT91_RTC_IDR 0x24 /* Interrupt Disable Register */
67#define AT91_RTC_IMR (AT91_RTC + 0x28) /* Interrupt Mask Register */ 67#define AT91_RTC_IMR 0x28 /* Interrupt Mask Register */
68 68
69#define AT91_RTC_VER (AT91_RTC + 0x2c) /* Valid Entry Register */ 69#define AT91_RTC_VER 0x2c /* Valid Entry Register */
70#define AT91_RTC_NVTIM (1 << 0) /* Non valid Time */ 70#define AT91_RTC_NVTIM (1 << 0) /* Non valid Time */
71#define AT91_RTC_NVCAL (1 << 1) /* Non valid Calendar */ 71#define AT91_RTC_NVCAL (1 << 1) /* Non valid Calendar */
72#define AT91_RTC_NVTIMALR (1 << 2) /* Non valid Time Alarm */ 72#define AT91_RTC_NVTIMALR (1 << 2) /* Non valid Time Alarm */
diff --git a/arch/arm/mach-at91/include/mach/at91_shdwc.h b/arch/arm/mach-at91/include/mach/at91_shdwc.h
index c4ce07e8a8fa..1d4fe822c77a 100644
--- a/arch/arm/mach-at91/include/mach/at91_shdwc.h
+++ b/arch/arm/mach-at91/include/mach/at91_shdwc.h
@@ -16,11 +16,21 @@
16#ifndef AT91_SHDWC_H 16#ifndef AT91_SHDWC_H
17#define AT91_SHDWC_H 17#define AT91_SHDWC_H
18 18
19#define AT91_SHDW_CR (AT91_SHDWC + 0x00) /* Shut Down Control Register */ 19#ifndef __ASSEMBLY__
20extern void __iomem *at91_shdwc_base;
21
22#define at91_shdwc_read(field) \
23 __raw_readl(at91_shdwc_base + field)
24
25#define at91_shdwc_write(field, value) \
26 __raw_writel(value, at91_shdwc_base + field);
27#endif
28
29#define AT91_SHDW_CR 0x00 /* Shut Down Control Register */
20#define AT91_SHDW_SHDW (1 << 0) /* Shut Down command */ 30#define AT91_SHDW_SHDW (1 << 0) /* Shut Down command */
21#define AT91_SHDW_KEY (0xa5 << 24) /* KEY Password */ 31#define AT91_SHDW_KEY (0xa5 << 24) /* KEY Password */
22 32
23#define AT91_SHDW_MR (AT91_SHDWC + 0x04) /* Shut Down Mode Register */ 33#define AT91_SHDW_MR 0x04 /* Shut Down Mode Register */
24#define AT91_SHDW_WKMODE0 (3 << 0) /* Wake-up 0 Mode Selection */ 34#define AT91_SHDW_WKMODE0 (3 << 0) /* Wake-up 0 Mode Selection */
25#define AT91_SHDW_WKMODE0_NONE 0 35#define AT91_SHDW_WKMODE0_NONE 0
26#define AT91_SHDW_WKMODE0_HIGH 1 36#define AT91_SHDW_WKMODE0_HIGH 1
@@ -30,7 +40,7 @@
30#define AT91_SHDW_CPTWK0_(x) ((x) << 4) 40#define AT91_SHDW_CPTWK0_(x) ((x) << 4)
31#define AT91_SHDW_RTTWKEN (1 << 16) /* Real Time Timer Wake-up Enable */ 41#define AT91_SHDW_RTTWKEN (1 << 16) /* Real Time Timer Wake-up Enable */
32 42
33#define AT91_SHDW_SR (AT91_SHDWC + 0x08) /* Shut Down Status Register */ 43#define AT91_SHDW_SR 0x08 /* Shut Down Status Register */
34#define AT91_SHDW_WAKEUP0 (1 << 0) /* Wake-up 0 Status */ 44#define AT91_SHDW_WAKEUP0 (1 << 0) /* Wake-up 0 Status */
35#define AT91_SHDW_RTTWK (1 << 16) /* Real-time Timer Wake-up */ 45#define AT91_SHDW_RTTWK (1 << 16) /* Real-time Timer Wake-up */
36#define AT91_SHDW_RTCWK (1 << 17) /* Real-time Clock Wake-up [SAM9RL] */ 46#define AT91_SHDW_RTCWK (1 << 17) /* Real-time Clock Wake-up [SAM9RL] */
diff --git a/arch/arm/mach-at91/include/mach/at91cap9.h b/arch/arm/mach-at91/include/mach/at91cap9.h
index c5df1e8f1955..4c0e2f6011d7 100644
--- a/arch/arm/mach-at91/include/mach/at91cap9.h
+++ b/arch/arm/mach-at91/include/mach/at91cap9.h
@@ -79,29 +79,28 @@
79/* 79/*
80 * System Peripherals (offset from AT91_BASE_SYS) 80 * System Peripherals (offset from AT91_BASE_SYS)
81 */ 81 */
82#define AT91_ECC (0xffffe200 - AT91_BASE_SYS)
83#define AT91_BCRAMC (0xffffe400 - AT91_BASE_SYS) 82#define AT91_BCRAMC (0xffffe400 - AT91_BASE_SYS)
84#define AT91_DDRSDRC0 (0xffffe600 - AT91_BASE_SYS) 83#define AT91_DDRSDRC0 (0xffffe600 - AT91_BASE_SYS)
85#define AT91_SMC (0xffffe800 - AT91_BASE_SYS)
86#define AT91_MATRIX (0xffffea00 - AT91_BASE_SYS) 84#define AT91_MATRIX (0xffffea00 - AT91_BASE_SYS)
87#define AT91_CCFG (0xffffeb10 - AT91_BASE_SYS)
88#define AT91_DMA (0xffffec00 - AT91_BASE_SYS)
89#define AT91_DBGU (0xffffee00 - AT91_BASE_SYS)
90#define AT91_AIC (0xfffff000 - AT91_BASE_SYS)
91#define AT91_PIOA (0xfffff200 - AT91_BASE_SYS)
92#define AT91_PIOB (0xfffff400 - AT91_BASE_SYS)
93#define AT91_PIOC (0xfffff600 - AT91_BASE_SYS)
94#define AT91_PIOD (0xfffff800 - AT91_BASE_SYS)
95#define AT91_PMC (0xfffffc00 - AT91_BASE_SYS) 85#define AT91_PMC (0xfffffc00 - AT91_BASE_SYS)
96#define AT91_RSTC (0xfffffd00 - AT91_BASE_SYS) 86#define AT91_RSTC (0xfffffd00 - AT91_BASE_SYS)
97#define AT91_SHDWC (0xfffffd10 - AT91_BASE_SYS)
98#define AT91_RTT (0xfffffd20 - AT91_BASE_SYS)
99#define AT91_PIT (0xfffffd30 - AT91_BASE_SYS)
100#define AT91_WDT (0xfffffd40 - AT91_BASE_SYS)
101#define AT91_GPBR (cpu_is_at91cap9_revB() ? \ 87#define AT91_GPBR (cpu_is_at91cap9_revB() ? \
102 (0xfffffd50 - AT91_BASE_SYS) : \ 88 (0xfffffd50 - AT91_BASE_SYS) : \
103 (0xfffffd60 - AT91_BASE_SYS)) 89 (0xfffffd60 - AT91_BASE_SYS))
104 90
91#define AT91CAP9_BASE_ECC 0xffffe200
92#define AT91CAP9_BASE_DMA 0xffffec00
93#define AT91CAP9_BASE_SMC 0xffffe800
94#define AT91CAP9_BASE_DBGU AT91_BASE_DBGU1
95#define AT91CAP9_BASE_PIOA 0xfffff200
96#define AT91CAP9_BASE_PIOB 0xfffff400
97#define AT91CAP9_BASE_PIOC 0xfffff600
98#define AT91CAP9_BASE_PIOD 0xfffff800
99#define AT91CAP9_BASE_SHDWC 0xfffffd10
100#define AT91CAP9_BASE_RTT 0xfffffd20
101#define AT91CAP9_BASE_PIT 0xfffffd30
102#define AT91CAP9_BASE_WDT 0xfffffd40
103
105#define AT91_USART0 AT91CAP9_BASE_US0 104#define AT91_USART0 AT91CAP9_BASE_US0
106#define AT91_USART1 AT91CAP9_BASE_US1 105#define AT91_USART1 AT91CAP9_BASE_US1
107#define AT91_USART2 AT91CAP9_BASE_US2 106#define AT91_USART2 AT91CAP9_BASE_US2
diff --git a/arch/arm/mach-at91/include/mach/at91rm9200.h b/arch/arm/mach-at91/include/mach/at91rm9200.h
index e4037b500302..bacb51141819 100644
--- a/arch/arm/mach-at91/include/mach/at91rm9200.h
+++ b/arch/arm/mach-at91/include/mach/at91rm9200.h
@@ -79,17 +79,17 @@
79/* 79/*
80 * System Peripherals (offset from AT91_BASE_SYS) 80 * System Peripherals (offset from AT91_BASE_SYS)
81 */ 81 */
82#define AT91_AIC (0xfffff000 - AT91_BASE_SYS) /* Advanced Interrupt Controller */
83#define AT91_DBGU (0xfffff200 - AT91_BASE_SYS) /* Debug Unit */
84#define AT91_PIOA (0xfffff400 - AT91_BASE_SYS) /* PIO Controller A */
85#define AT91_PIOB (0xfffff600 - AT91_BASE_SYS) /* PIO Controller B */
86#define AT91_PIOC (0xfffff800 - AT91_BASE_SYS) /* PIO Controller C */
87#define AT91_PIOD (0xfffffa00 - AT91_BASE_SYS) /* PIO Controller D */
88#define AT91_PMC (0xfffffc00 - AT91_BASE_SYS) /* Power Management Controller */ 82#define AT91_PMC (0xfffffc00 - AT91_BASE_SYS) /* Power Management Controller */
89#define AT91_ST (0xfffffd00 - AT91_BASE_SYS) /* System Timer */ 83#define AT91_ST (0xfffffd00 - AT91_BASE_SYS) /* System Timer */
90#define AT91_RTC (0xfffffe00 - AT91_BASE_SYS) /* Real-Time Clock */
91#define AT91_MC (0xffffff00 - AT91_BASE_SYS) /* Memory Controllers */ 84#define AT91_MC (0xffffff00 - AT91_BASE_SYS) /* Memory Controllers */
92 85
86#define AT91RM9200_BASE_DBGU AT91_BASE_DBGU0 /* Debug Unit */
87#define AT91RM9200_BASE_PIOA 0xfffff400 /* PIO Controller A */
88#define AT91RM9200_BASE_PIOB 0xfffff600 /* PIO Controller B */
89#define AT91RM9200_BASE_PIOC 0xfffff800 /* PIO Controller C */
90#define AT91RM9200_BASE_PIOD 0xfffffa00 /* PIO Controller D */
91#define AT91RM9200_BASE_RTC 0xfffffe00 /* Real-Time Clock */
92
93#define AT91_USART0 AT91RM9200_BASE_US0 93#define AT91_USART0 AT91RM9200_BASE_US0
94#define AT91_USART1 AT91RM9200_BASE_US1 94#define AT91_USART1 AT91RM9200_BASE_US1
95#define AT91_USART2 AT91RM9200_BASE_US2 95#define AT91_USART2 AT91RM9200_BASE_US2
diff --git a/arch/arm/mach-at91/include/mach/at91sam9260.h b/arch/arm/mach-at91/include/mach/at91sam9260.h
index 9a791165913f..f937c476bb67 100644
--- a/arch/arm/mach-at91/include/mach/at91sam9260.h
+++ b/arch/arm/mach-at91/include/mach/at91sam9260.h
@@ -80,24 +80,23 @@
80/* 80/*
81 * System Peripherals (offset from AT91_BASE_SYS) 81 * System Peripherals (offset from AT91_BASE_SYS)
82 */ 82 */
83#define AT91_ECC (0xffffe800 - AT91_BASE_SYS)
84#define AT91_SDRAMC0 (0xffffea00 - AT91_BASE_SYS) 83#define AT91_SDRAMC0 (0xffffea00 - AT91_BASE_SYS)
85#define AT91_SMC (0xffffec00 - AT91_BASE_SYS)
86#define AT91_MATRIX (0xffffee00 - AT91_BASE_SYS) 84#define AT91_MATRIX (0xffffee00 - AT91_BASE_SYS)
87#define AT91_CCFG (0xffffef10 - AT91_BASE_SYS)
88#define AT91_AIC (0xfffff000 - AT91_BASE_SYS)
89#define AT91_DBGU (0xfffff200 - AT91_BASE_SYS)
90#define AT91_PIOA (0xfffff400 - AT91_BASE_SYS)
91#define AT91_PIOB (0xfffff600 - AT91_BASE_SYS)
92#define AT91_PIOC (0xfffff800 - AT91_BASE_SYS)
93#define AT91_PMC (0xfffffc00 - AT91_BASE_SYS) 85#define AT91_PMC (0xfffffc00 - AT91_BASE_SYS)
94#define AT91_RSTC (0xfffffd00 - AT91_BASE_SYS) 86#define AT91_RSTC (0xfffffd00 - AT91_BASE_SYS)
95#define AT91_SHDWC (0xfffffd10 - AT91_BASE_SYS)
96#define AT91_RTT (0xfffffd20 - AT91_BASE_SYS)
97#define AT91_PIT (0xfffffd30 - AT91_BASE_SYS)
98#define AT91_WDT (0xfffffd40 - AT91_BASE_SYS)
99#define AT91_GPBR (0xfffffd50 - AT91_BASE_SYS) 87#define AT91_GPBR (0xfffffd50 - AT91_BASE_SYS)
100 88
89#define AT91SAM9260_BASE_ECC 0xffffe800
90#define AT91SAM9260_BASE_SMC 0xffffec00
91#define AT91SAM9260_BASE_DBGU AT91_BASE_DBGU0
92#define AT91SAM9260_BASE_PIOA 0xfffff400
93#define AT91SAM9260_BASE_PIOB 0xfffff600
94#define AT91SAM9260_BASE_PIOC 0xfffff800
95#define AT91SAM9260_BASE_SHDWC 0xfffffd10
96#define AT91SAM9260_BASE_RTT 0xfffffd20
97#define AT91SAM9260_BASE_PIT 0xfffffd30
98#define AT91SAM9260_BASE_WDT 0xfffffd40
99
101#define AT91_USART0 AT91SAM9260_BASE_US0 100#define AT91_USART0 AT91SAM9260_BASE_US0
102#define AT91_USART1 AT91SAM9260_BASE_US1 101#define AT91_USART1 AT91SAM9260_BASE_US1
103#define AT91_USART2 AT91SAM9260_BASE_US2 102#define AT91_USART2 AT91SAM9260_BASE_US2
diff --git a/arch/arm/mach-at91/include/mach/at91sam9261.h b/arch/arm/mach-at91/include/mach/at91sam9261.h
index ce596204cefa..175604e261be 100644
--- a/arch/arm/mach-at91/include/mach/at91sam9261.h
+++ b/arch/arm/mach-at91/include/mach/at91sam9261.h
@@ -66,21 +66,21 @@
66 * System Peripherals (offset from AT91_BASE_SYS) 66 * System Peripherals (offset from AT91_BASE_SYS)
67 */ 67 */
68#define AT91_SDRAMC0 (0xffffea00 - AT91_BASE_SYS) 68#define AT91_SDRAMC0 (0xffffea00 - AT91_BASE_SYS)
69#define AT91_SMC (0xffffec00 - AT91_BASE_SYS)
70#define AT91_MATRIX (0xffffee00 - AT91_BASE_SYS) 69#define AT91_MATRIX (0xffffee00 - AT91_BASE_SYS)
71#define AT91_AIC (0xfffff000 - AT91_BASE_SYS)
72#define AT91_DBGU (0xfffff200 - AT91_BASE_SYS)
73#define AT91_PIOA (0xfffff400 - AT91_BASE_SYS)
74#define AT91_PIOB (0xfffff600 - AT91_BASE_SYS)
75#define AT91_PIOC (0xfffff800 - AT91_BASE_SYS)
76#define AT91_PMC (0xfffffc00 - AT91_BASE_SYS) 70#define AT91_PMC (0xfffffc00 - AT91_BASE_SYS)
77#define AT91_RSTC (0xfffffd00 - AT91_BASE_SYS) 71#define AT91_RSTC (0xfffffd00 - AT91_BASE_SYS)
78#define AT91_SHDWC (0xfffffd10 - AT91_BASE_SYS)
79#define AT91_RTT (0xfffffd20 - AT91_BASE_SYS)
80#define AT91_PIT (0xfffffd30 - AT91_BASE_SYS)
81#define AT91_WDT (0xfffffd40 - AT91_BASE_SYS)
82#define AT91_GPBR (0xfffffd50 - AT91_BASE_SYS) 72#define AT91_GPBR (0xfffffd50 - AT91_BASE_SYS)
83 73
74#define AT91SAM9261_BASE_SMC 0xffffec00
75#define AT91SAM9261_BASE_DBGU AT91_BASE_DBGU0
76#define AT91SAM9261_BASE_PIOA 0xfffff400
77#define AT91SAM9261_BASE_PIOB 0xfffff600
78#define AT91SAM9261_BASE_PIOC 0xfffff800
79#define AT91SAM9261_BASE_SHDWC 0xfffffd10
80#define AT91SAM9261_BASE_RTT 0xfffffd20
81#define AT91SAM9261_BASE_PIT 0xfffffd30
82#define AT91SAM9261_BASE_WDT 0xfffffd40
83
84#define AT91_USART0 AT91SAM9261_BASE_US0 84#define AT91_USART0 AT91SAM9261_BASE_US0
85#define AT91_USART1 AT91SAM9261_BASE_US1 85#define AT91_USART1 AT91SAM9261_BASE_US1
86#define AT91_USART2 AT91SAM9261_BASE_US2 86#define AT91_USART2 AT91SAM9261_BASE_US2
diff --git a/arch/arm/mach-at91/include/mach/at91sam9263.h b/arch/arm/mach-at91/include/mach/at91sam9263.h
index f1b92961a2b1..80c915002d83 100644
--- a/arch/arm/mach-at91/include/mach/at91sam9263.h
+++ b/arch/arm/mach-at91/include/mach/at91sam9263.h
@@ -74,30 +74,29 @@
74/* 74/*
75 * System Peripherals (offset from AT91_BASE_SYS) 75 * System Peripherals (offset from AT91_BASE_SYS)
76 */ 76 */
77#define AT91_ECC0 (0xffffe000 - AT91_BASE_SYS)
78#define AT91_SDRAMC0 (0xffffe200 - AT91_BASE_SYS) 77#define AT91_SDRAMC0 (0xffffe200 - AT91_BASE_SYS)
79#define AT91_SMC0 (0xffffe400 - AT91_BASE_SYS)
80#define AT91_ECC1 (0xffffe600 - AT91_BASE_SYS)
81#define AT91_SDRAMC1 (0xffffe800 - AT91_BASE_SYS) 78#define AT91_SDRAMC1 (0xffffe800 - AT91_BASE_SYS)
82#define AT91_SMC1 (0xffffea00 - AT91_BASE_SYS)
83#define AT91_MATRIX (0xffffec00 - AT91_BASE_SYS) 79#define AT91_MATRIX (0xffffec00 - AT91_BASE_SYS)
84#define AT91_CCFG (0xffffed10 - AT91_BASE_SYS)
85#define AT91_DBGU (0xffffee00 - AT91_BASE_SYS)
86#define AT91_AIC (0xfffff000 - AT91_BASE_SYS)
87#define AT91_PIOA (0xfffff200 - AT91_BASE_SYS)
88#define AT91_PIOB (0xfffff400 - AT91_BASE_SYS)
89#define AT91_PIOC (0xfffff600 - AT91_BASE_SYS)
90#define AT91_PIOD (0xfffff800 - AT91_BASE_SYS)
91#define AT91_PIOE (0xfffffa00 - AT91_BASE_SYS)
92#define AT91_PMC (0xfffffc00 - AT91_BASE_SYS) 80#define AT91_PMC (0xfffffc00 - AT91_BASE_SYS)
93#define AT91_RSTC (0xfffffd00 - AT91_BASE_SYS) 81#define AT91_RSTC (0xfffffd00 - AT91_BASE_SYS)
94#define AT91_SHDWC (0xfffffd10 - AT91_BASE_SYS)
95#define AT91_RTT0 (0xfffffd20 - AT91_BASE_SYS)
96#define AT91_PIT (0xfffffd30 - AT91_BASE_SYS)
97#define AT91_WDT (0xfffffd40 - AT91_BASE_SYS)
98#define AT91_RTT1 (0xfffffd50 - AT91_BASE_SYS)
99#define AT91_GPBR (0xfffffd60 - AT91_BASE_SYS) 82#define AT91_GPBR (0xfffffd60 - AT91_BASE_SYS)
100 83
84#define AT91SAM9263_BASE_ECC0 0xffffe000
85#define AT91SAM9263_BASE_SMC0 0xffffe400
86#define AT91SAM9263_BASE_ECC1 0xffffe600
87#define AT91SAM9263_BASE_SMC1 0xffffea00
88#define AT91SAM9263_BASE_DBGU AT91_BASE_DBGU1
89#define AT91SAM9263_BASE_PIOA 0xfffff200
90#define AT91SAM9263_BASE_PIOB 0xfffff400
91#define AT91SAM9263_BASE_PIOC 0xfffff600
92#define AT91SAM9263_BASE_PIOD 0xfffff800
93#define AT91SAM9263_BASE_PIOE 0xfffffa00
94#define AT91SAM9263_BASE_SHDWC 0xfffffd10
95#define AT91SAM9263_BASE_RTT0 0xfffffd20
96#define AT91SAM9263_BASE_PIT 0xfffffd30
97#define AT91SAM9263_BASE_WDT 0xfffffd40
98#define AT91SAM9263_BASE_RTT1 0xfffffd50
99
101#define AT91_USART0 AT91SAM9263_BASE_US0 100#define AT91_USART0 AT91SAM9263_BASE_US0
102#define AT91_USART1 AT91SAM9263_BASE_US1 101#define AT91_USART1 AT91SAM9263_BASE_US1
103#define AT91_USART2 AT91SAM9263_BASE_US2 102#define AT91_USART2 AT91SAM9263_BASE_US2
diff --git a/arch/arm/mach-at91/include/mach/at91sam9_smc.h b/arch/arm/mach-at91/include/mach/at91sam9_smc.h
index 57de6207e57e..eb18a70fa647 100644
--- a/arch/arm/mach-at91/include/mach/at91sam9_smc.h
+++ b/arch/arm/mach-at91/include/mach/at91sam9_smc.h
@@ -16,7 +16,9 @@
16#ifndef AT91SAM9_SMC_H 16#ifndef AT91SAM9_SMC_H
17#define AT91SAM9_SMC_H 17#define AT91SAM9_SMC_H
18 18
19#define AT91_SMC_SETUP(n) (AT91_SMC + 0x00 + ((n)*0x10)) /* Setup Register for CS n */ 19#include <mach/cpu.h>
20
21#define AT91_SMC_SETUP 0x00 /* Setup Register for CS n */
20#define AT91_SMC_NWESETUP (0x3f << 0) /* NWE Setup Length */ 22#define AT91_SMC_NWESETUP (0x3f << 0) /* NWE Setup Length */
21#define AT91_SMC_NWESETUP_(x) ((x) << 0) 23#define AT91_SMC_NWESETUP_(x) ((x) << 0)
22#define AT91_SMC_NCS_WRSETUP (0x3f << 8) /* NCS Setup Length in Write Access */ 24#define AT91_SMC_NCS_WRSETUP (0x3f << 8) /* NCS Setup Length in Write Access */
@@ -26,7 +28,7 @@
26#define AT91_SMC_NCS_RDSETUP (0x3f << 24) /* NCS Setup Length in Read Access */ 28#define AT91_SMC_NCS_RDSETUP (0x3f << 24) /* NCS Setup Length in Read Access */
27#define AT91_SMC_NCS_RDSETUP_(x) ((x) << 24) 29#define AT91_SMC_NCS_RDSETUP_(x) ((x) << 24)
28 30
29#define AT91_SMC_PULSE(n) (AT91_SMC + 0x04 + ((n)*0x10)) /* Pulse Register for CS n */ 31#define AT91_SMC_PULSE 0x04 /* Pulse Register for CS n */
30#define AT91_SMC_NWEPULSE (0x7f << 0) /* NWE Pulse Length */ 32#define AT91_SMC_NWEPULSE (0x7f << 0) /* NWE Pulse Length */
31#define AT91_SMC_NWEPULSE_(x) ((x) << 0) 33#define AT91_SMC_NWEPULSE_(x) ((x) << 0)
32#define AT91_SMC_NCS_WRPULSE (0x7f << 8) /* NCS Pulse Length in Write Access */ 34#define AT91_SMC_NCS_WRPULSE (0x7f << 8) /* NCS Pulse Length in Write Access */
@@ -36,13 +38,13 @@
36#define AT91_SMC_NCS_RDPULSE (0x7f << 24) /* NCS Pulse Length in Read Access */ 38#define AT91_SMC_NCS_RDPULSE (0x7f << 24) /* NCS Pulse Length in Read Access */
37#define AT91_SMC_NCS_RDPULSE_(x)((x) << 24) 39#define AT91_SMC_NCS_RDPULSE_(x)((x) << 24)
38 40
39#define AT91_SMC_CYCLE(n) (AT91_SMC + 0x08 + ((n)*0x10)) /* Cycle Register for CS n */ 41#define AT91_SMC_CYCLE 0x08 /* Cycle Register for CS n */
40#define AT91_SMC_NWECYCLE (0x1ff << 0 ) /* Total Write Cycle Length */ 42#define AT91_SMC_NWECYCLE (0x1ff << 0 ) /* Total Write Cycle Length */
41#define AT91_SMC_NWECYCLE_(x) ((x) << 0) 43#define AT91_SMC_NWECYCLE_(x) ((x) << 0)
42#define AT91_SMC_NRDCYCLE (0x1ff << 16) /* Total Read Cycle Length */ 44#define AT91_SMC_NRDCYCLE (0x1ff << 16) /* Total Read Cycle Length */
43#define AT91_SMC_NRDCYCLE_(x) ((x) << 16) 45#define AT91_SMC_NRDCYCLE_(x) ((x) << 16)
44 46
45#define AT91_SMC_MODE(n) (AT91_SMC + 0x0c + ((n)*0x10)) /* Mode Register for CS n */ 47#define AT91_SMC_MODE 0x0c /* Mode Register for CS n */
46#define AT91_SMC_READMODE (1 << 0) /* Read Mode */ 48#define AT91_SMC_READMODE (1 << 0) /* Read Mode */
47#define AT91_SMC_WRITEMODE (1 << 1) /* Write Mode */ 49#define AT91_SMC_WRITEMODE (1 << 1) /* Write Mode */
48#define AT91_SMC_EXNWMODE (3 << 4) /* NWAIT Mode */ 50#define AT91_SMC_EXNWMODE (3 << 4) /* NWAIT Mode */
@@ -66,11 +68,4 @@
66#define AT91_SMC_PS_16 (2 << 28) 68#define AT91_SMC_PS_16 (2 << 28)
67#define AT91_SMC_PS_32 (3 << 28) 69#define AT91_SMC_PS_32 (3 << 28)
68 70
69#if defined(AT91_SMC1) /* The AT91SAM9263 has 2 Static Memory contollers */
70#define AT91_SMC1_SETUP(n) (AT91_SMC1 + 0x00 + ((n)*0x10)) /* Setup Register for CS n */
71#define AT91_SMC1_PULSE(n) (AT91_SMC1 + 0x04 + ((n)*0x10)) /* Pulse Register for CS n */
72#define AT91_SMC1_CYCLE(n) (AT91_SMC1 + 0x08 + ((n)*0x10)) /* Cycle Register for CS n */
73#define AT91_SMC1_MODE(n) (AT91_SMC1 + 0x0c + ((n)*0x10)) /* Mode Register for CS n */
74#endif
75
76#endif 71#endif
diff --git a/arch/arm/mach-at91/include/mach/at91sam9g45.h b/arch/arm/mach-at91/include/mach/at91sam9g45.h
index 406bb6496805..f0c23c960dec 100644
--- a/arch/arm/mach-at91/include/mach/at91sam9g45.h
+++ b/arch/arm/mach-at91/include/mach/at91sam9g45.h
@@ -86,27 +86,27 @@
86/* 86/*
87 * System Peripherals (offset from AT91_BASE_SYS) 87 * System Peripherals (offset from AT91_BASE_SYS)
88 */ 88 */
89#define AT91_ECC (0xffffe200 - AT91_BASE_SYS)
90#define AT91_DDRSDRC1 (0xffffe400 - AT91_BASE_SYS) 89#define AT91_DDRSDRC1 (0xffffe400 - AT91_BASE_SYS)
91#define AT91_DDRSDRC0 (0xffffe600 - AT91_BASE_SYS) 90#define AT91_DDRSDRC0 (0xffffe600 - AT91_BASE_SYS)
92#define AT91_SMC (0xffffe800 - AT91_BASE_SYS)
93#define AT91_MATRIX (0xffffea00 - AT91_BASE_SYS) 91#define AT91_MATRIX (0xffffea00 - AT91_BASE_SYS)
94#define AT91_DMA (0xffffec00 - AT91_BASE_SYS)
95#define AT91_DBGU (0xffffee00 - AT91_BASE_SYS)
96#define AT91_AIC (0xfffff000 - AT91_BASE_SYS)
97#define AT91_PIOA (0xfffff200 - AT91_BASE_SYS)
98#define AT91_PIOB (0xfffff400 - AT91_BASE_SYS)
99#define AT91_PIOC (0xfffff600 - AT91_BASE_SYS)
100#define AT91_PIOD (0xfffff800 - AT91_BASE_SYS)
101#define AT91_PIOE (0xfffffa00 - AT91_BASE_SYS)
102#define AT91_PMC (0xfffffc00 - AT91_BASE_SYS) 92#define AT91_PMC (0xfffffc00 - AT91_BASE_SYS)
103#define AT91_RSTC (0xfffffd00 - AT91_BASE_SYS) 93#define AT91_RSTC (0xfffffd00 - AT91_BASE_SYS)
104#define AT91_SHDWC (0xfffffd10 - AT91_BASE_SYS)
105#define AT91_RTT (0xfffffd20 - AT91_BASE_SYS)
106#define AT91_PIT (0xfffffd30 - AT91_BASE_SYS)
107#define AT91_WDT (0xfffffd40 - AT91_BASE_SYS)
108#define AT91_GPBR (0xfffffd60 - AT91_BASE_SYS) 94#define AT91_GPBR (0xfffffd60 - AT91_BASE_SYS)
109#define AT91_RTC (0xfffffdb0 - AT91_BASE_SYS) 95
96#define AT91SAM9G45_BASE_ECC 0xffffe200
97#define AT91SAM9G45_BASE_DMA 0xffffec00
98#define AT91SAM9G45_BASE_SMC 0xffffe800
99#define AT91SAM9G45_BASE_DBGU AT91_BASE_DBGU1
100#define AT91SAM9G45_BASE_PIOA 0xfffff200
101#define AT91SAM9G45_BASE_PIOB 0xfffff400
102#define AT91SAM9G45_BASE_PIOC 0xfffff600
103#define AT91SAM9G45_BASE_PIOD 0xfffff800
104#define AT91SAM9G45_BASE_PIOE 0xfffffa00
105#define AT91SAM9G45_BASE_SHDWC 0xfffffd10
106#define AT91SAM9G45_BASE_RTT 0xfffffd20
107#define AT91SAM9G45_BASE_PIT 0xfffffd30
108#define AT91SAM9G45_BASE_WDT 0xfffffd40
109#define AT91SAM9G45_BASE_RTC 0xfffffdb0
110 110
111#define AT91_USART0 AT91SAM9G45_BASE_US0 111#define AT91_USART0 AT91SAM9G45_BASE_US0
112#define AT91_USART1 AT91SAM9G45_BASE_US1 112#define AT91_USART1 AT91SAM9G45_BASE_US1
diff --git a/arch/arm/mach-at91/include/mach/at91sam9rl.h b/arch/arm/mach-at91/include/mach/at91sam9rl.h
index 1aabacd315d4..2bb359e60b97 100644
--- a/arch/arm/mach-at91/include/mach/at91sam9rl.h
+++ b/arch/arm/mach-at91/include/mach/at91sam9rl.h
@@ -69,27 +69,26 @@
69/* 69/*
70 * System Peripherals (offset from AT91_BASE_SYS) 70 * System Peripherals (offset from AT91_BASE_SYS)
71 */ 71 */
72#define AT91_DMA (0xffffe600 - AT91_BASE_SYS)
73#define AT91_ECC (0xffffe800 - AT91_BASE_SYS)
74#define AT91_SDRAMC0 (0xffffea00 - AT91_BASE_SYS) 72#define AT91_SDRAMC0 (0xffffea00 - AT91_BASE_SYS)
75#define AT91_SMC (0xffffec00 - AT91_BASE_SYS)
76#define AT91_MATRIX (0xffffee00 - AT91_BASE_SYS) 73#define AT91_MATRIX (0xffffee00 - AT91_BASE_SYS)
77#define AT91_CCFG (0xffffef10 - AT91_BASE_SYS)
78#define AT91_AIC (0xfffff000 - AT91_BASE_SYS)
79#define AT91_DBGU (0xfffff200 - AT91_BASE_SYS)
80#define AT91_PIOA (0xfffff400 - AT91_BASE_SYS)
81#define AT91_PIOB (0xfffff600 - AT91_BASE_SYS)
82#define AT91_PIOC (0xfffff800 - AT91_BASE_SYS)
83#define AT91_PIOD (0xfffffa00 - AT91_BASE_SYS)
84#define AT91_PMC (0xfffffc00 - AT91_BASE_SYS) 74#define AT91_PMC (0xfffffc00 - AT91_BASE_SYS)
85#define AT91_RSTC (0xfffffd00 - AT91_BASE_SYS) 75#define AT91_RSTC (0xfffffd00 - AT91_BASE_SYS)
86#define AT91_SHDWC (0xfffffd10 - AT91_BASE_SYS)
87#define AT91_RTT (0xfffffd20 - AT91_BASE_SYS)
88#define AT91_PIT (0xfffffd30 - AT91_BASE_SYS)
89#define AT91_WDT (0xfffffd40 - AT91_BASE_SYS)
90#define AT91_SCKCR (0xfffffd50 - AT91_BASE_SYS) 76#define AT91_SCKCR (0xfffffd50 - AT91_BASE_SYS)
91#define AT91_GPBR (0xfffffd60 - AT91_BASE_SYS) 77#define AT91_GPBR (0xfffffd60 - AT91_BASE_SYS)
92#define AT91_RTC (0xfffffe00 - AT91_BASE_SYS) 78
79#define AT91SAM9RL_BASE_DMA 0xffffe600
80#define AT91SAM9RL_BASE_ECC 0xffffe800
81#define AT91SAM9RL_BASE_SMC 0xffffec00
82#define AT91SAM9RL_BASE_DBGU AT91_BASE_DBGU0
83#define AT91SAM9RL_BASE_PIOA 0xfffff400
84#define AT91SAM9RL_BASE_PIOB 0xfffff600
85#define AT91SAM9RL_BASE_PIOC 0xfffff800
86#define AT91SAM9RL_BASE_PIOD 0xfffffa00
87#define AT91SAM9RL_BASE_SHDWC 0xfffffd10
88#define AT91SAM9RL_BASE_RTT 0xfffffd20
89#define AT91SAM9RL_BASE_PIT 0xfffffd30
90#define AT91SAM9RL_BASE_WDT 0xfffffd40
91#define AT91SAM9RL_BASE_RTC 0xfffffe00
93 92
94#define AT91_USART0 AT91SAM9RL_BASE_US0 93#define AT91_USART0 AT91SAM9RL_BASE_US0
95#define AT91_USART1 AT91SAM9RL_BASE_US1 94#define AT91_USART1 AT91SAM9RL_BASE_US1
diff --git a/arch/arm/mach-at91/include/mach/at91x40.h b/arch/arm/mach-at91/include/mach/at91x40.h
index a152ff87e688..a57829f4fd18 100644
--- a/arch/arm/mach-at91/include/mach/at91x40.h
+++ b/arch/arm/mach-at91/include/mach/at91x40.h
@@ -40,7 +40,6 @@
40#define AT91_PIOA (0xffff0000 - AT91_BASE_SYS) /* PIO Controller A */ 40#define AT91_PIOA (0xffff0000 - AT91_BASE_SYS) /* PIO Controller A */
41#define AT91_PS (0xffff4000 - AT91_BASE_SYS) /* Power Save */ 41#define AT91_PS (0xffff4000 - AT91_BASE_SYS) /* Power Save */
42#define AT91_WD (0xffff8000 - AT91_BASE_SYS) /* Watchdog Timer */ 42#define AT91_WD (0xffff8000 - AT91_BASE_SYS) /* Watchdog Timer */
43#define AT91_AIC (0xfffff000 - AT91_BASE_SYS) /* Advanced Interrupt Controller */
44 43
45/* 44/*
46 * The AT91x40 series doesn't have a debug unit like the other AT91 parts. 45 * The AT91x40 series doesn't have a debug unit like the other AT91 parts.
diff --git a/arch/arm/mach-at91/include/mach/board.h b/arch/arm/mach-at91/include/mach/board.h
index e209a2992245..d0b377b21bd7 100644
--- a/arch/arm/mach-at91/include/mach/board.h
+++ b/arch/arm/mach-at91/include/mach/board.h
@@ -44,10 +44,10 @@
44 44
45 /* USB Device */ 45 /* USB Device */
46struct at91_udc_data { 46struct at91_udc_data {
47 u8 vbus_pin; /* high == host powering us */ 47 int vbus_pin; /* high == host powering us */
48 u8 vbus_active_low; /* vbus polarity */ 48 u8 vbus_active_low; /* vbus polarity */
49 u8 vbus_polled; /* Use polling, not interrupt */ 49 u8 vbus_polled; /* Use polling, not interrupt */
50 u8 pullup_pin; /* active == D+ pulled up */ 50 int pullup_pin; /* active == D+ pulled up */
51 u8 pullup_active_low; /* true == pullup_pin is active low */ 51 u8 pullup_active_low; /* true == pullup_pin is active low */
52}; 52};
53extern void __init at91_add_device_udc(struct at91_udc_data *data); 53extern void __init at91_add_device_udc(struct at91_udc_data *data);
@@ -57,10 +57,10 @@ extern void __init at91_add_device_usba(struct usba_platform_data *data);
57 57
58 /* Compact Flash */ 58 /* Compact Flash */
59struct at91_cf_data { 59struct at91_cf_data {
60 u8 irq_pin; /* I/O IRQ */ 60 int irq_pin; /* I/O IRQ */
61 u8 det_pin; /* Card detect */ 61 int det_pin; /* Card detect */
62 u8 vcc_pin; /* power switching */ 62 int vcc_pin; /* power switching */
63 u8 rst_pin; /* card reset */ 63 int rst_pin; /* card reset */
64 u8 chipselect; /* EBI Chip Select number */ 64 u8 chipselect; /* EBI Chip Select number */
65 u8 flags; 65 u8 flags;
66#define AT91_CF_TRUE_IDE 0x01 66#define AT91_CF_TRUE_IDE 0x01
@@ -71,11 +71,11 @@ extern void __init at91_add_device_cf(struct at91_cf_data *data);
71 /* MMC / SD */ 71 /* MMC / SD */
72 /* at91_mci platform config */ 72 /* at91_mci platform config */
73struct at91_mmc_data { 73struct at91_mmc_data {
74 u8 det_pin; /* card detect IRQ */ 74 int det_pin; /* card detect IRQ */
75 unsigned slot_b:1; /* uses Slot B */ 75 unsigned slot_b:1; /* uses Slot B */
76 unsigned wire4:1; /* (SD) supports DAT0..DAT3 */ 76 unsigned wire4:1; /* (SD) supports DAT0..DAT3 */
77 u8 wp_pin; /* (SD) writeprotect detect */ 77 int wp_pin; /* (SD) writeprotect detect */
78 u8 vcc_pin; /* power switching (high == on) */ 78 int vcc_pin; /* power switching (high == on) */
79}; 79};
80extern void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data); 80extern void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data);
81 81
@@ -87,10 +87,10 @@ extern void __init at91_add_device_eth(struct macb_platform_data *data);
87 /* USB Host */ 87 /* USB Host */
88struct at91_usbh_data { 88struct at91_usbh_data {
89 u8 ports; /* number of ports on root hub */ 89 u8 ports; /* number of ports on root hub */
90 u8 vbus_pin[2]; /* port power-control pin */ 90 int vbus_pin[2]; /* port power-control pin */
91 u8 vbus_pin_inverted; 91 u8 vbus_pin_inverted;
92 u8 overcurrent_supported; 92 u8 overcurrent_supported;
93 u8 overcurrent_pin[2]; 93 int overcurrent_pin[2];
94 u8 overcurrent_status[2]; 94 u8 overcurrent_status[2];
95 u8 overcurrent_changed[2]; 95 u8 overcurrent_changed[2];
96}; 96};
@@ -100,9 +100,9 @@ extern void __init at91_add_device_usbh_ehci(struct at91_usbh_data *data);
100 100
101 /* NAND / SmartMedia */ 101 /* NAND / SmartMedia */
102struct atmel_nand_data { 102struct atmel_nand_data {
103 u8 enable_pin; /* chip enable */ 103 int enable_pin; /* chip enable */
104 u8 det_pin; /* card detect */ 104 int det_pin; /* card detect */
105 u8 rdy_pin; /* ready/busy */ 105 int rdy_pin; /* ready/busy */
106 u8 rdy_pin_active_low; /* rdy_pin value is inverted */ 106 u8 rdy_pin_active_low; /* rdy_pin value is inverted */
107 u8 ale; /* address line number connected to ALE */ 107 u8 ale; /* address line number connected to ALE */
108 u8 cle; /* address line number connected to CLE */ 108 u8 cle; /* address line number connected to CLE */
diff --git a/arch/arm/mach-at91/include/mach/debug-macro.S b/arch/arm/mach-at91/include/mach/debug-macro.S
index 0ed8648c6452..c6bb9e2d9baa 100644
--- a/arch/arm/mach-at91/include/mach/debug-macro.S
+++ b/arch/arm/mach-at91/include/mach/debug-macro.S
@@ -14,9 +14,15 @@
14#include <mach/hardware.h> 14#include <mach/hardware.h>
15#include <mach/at91_dbgu.h> 15#include <mach/at91_dbgu.h>
16 16
17#if defined(CONFIG_AT91_DEBUG_LL_DBGU0)
18#define AT91_DBGU AT91_BASE_DBGU0
19#else
20#define AT91_DBGU AT91_BASE_DBGU1
21#endif
22
17 .macro addruart, rp, rv, tmp 23 .macro addruart, rp, rv, tmp
18 ldr \rp, =(AT91_BASE_SYS + AT91_DBGU) @ System peripherals (phys address) 24 ldr \rp, =AT91_DBGU @ System peripherals (phys address)
19 ldr \rv, =(AT91_VA_BASE_SYS + AT91_DBGU) @ System peripherals (virt address) 25 ldr \rv, =AT91_IO_P2V(AT91_DBGU) @ System peripherals (virt address)
20 .endm 26 .endm
21 27
22 .macro senduart,rd,rx 28 .macro senduart,rd,rx
diff --git a/arch/arm/mach-at91/include/mach/entry-macro.S b/arch/arm/mach-at91/include/mach/entry-macro.S
index 7ab68f972227..423eea0ed74c 100644
--- a/arch/arm/mach-at91/include/mach/entry-macro.S
+++ b/arch/arm/mach-at91/include/mach/entry-macro.S
@@ -17,16 +17,17 @@
17 .endm 17 .endm
18 18
19 .macro get_irqnr_preamble, base, tmp 19 .macro get_irqnr_preamble, base, tmp
20 ldr \base, =(AT91_VA_BASE_SYS + AT91_AIC) @ base virtual address of AIC peripheral 20 ldr \base, =at91_aic_base @ base virtual address of AIC peripheral
21 ldr \base, [\base]
21 .endm 22 .endm
22 23
23 .macro arch_ret_to_user, tmp1, tmp2 24 .macro arch_ret_to_user, tmp1, tmp2
24 .endm 25 .endm
25 26
26 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp 27 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
27 ldr \irqnr, [\base, #(AT91_AIC_IVR - AT91_AIC)] @ read IRQ vector register: de-asserts nIRQ to processor (and clears interrupt) 28 ldr \irqnr, [\base, #AT91_AIC_IVR] @ read IRQ vector register: de-asserts nIRQ to processor (and clears interrupt)
28 ldr \irqstat, [\base, #(AT91_AIC_ISR - AT91_AIC)] @ read interrupt source number 29 ldr \irqstat, [\base, #AT91_AIC_ISR] @ read interrupt source number
29 teq \irqstat, #0 @ ISR is 0 when no current interrupt, or spurious interrupt 30 teq \irqstat, #0 @ ISR is 0 when no current interrupt, or spurious interrupt
30 streq \tmp, [\base, #(AT91_AIC_EOICR - AT91_AIC)] @ not going to be handled further, then ACK it now. 31 streq \tmp, [\base, #AT91_AIC_EOICR] @ not going to be handled further, then ACK it now.
31 .endm 32 .endm
32 33
diff --git a/arch/arm/mach-at91/include/mach/gpio.h b/arch/arm/mach-at91/include/mach/gpio.h
index 2b9a1f51210f..e3fd225121c7 100644
--- a/arch/arm/mach-at91/include/mach/gpio.h
+++ b/arch/arm/mach-at91/include/mach/gpio.h
@@ -16,177 +16,175 @@
16#include <linux/kernel.h> 16#include <linux/kernel.h>
17#include <asm/irq.h> 17#include <asm/irq.h>
18 18
19#define PIN_BASE NR_AIC_IRQS
20
21#define MAX_GPIO_BANKS 5 19#define MAX_GPIO_BANKS 5
22#define NR_BUILTIN_GPIO (PIN_BASE + (MAX_GPIO_BANKS * 32)) 20#define NR_BUILTIN_GPIO (MAX_GPIO_BANKS * 32)
23 21
24/* these pin numbers double as IRQ numbers, like AT91xxx_ID_* values */ 22/* these pin numbers double as IRQ numbers, like AT91xxx_ID_* values */
25 23
26#define AT91_PIN_PA0 (PIN_BASE + 0x00 + 0) 24#define AT91_PIN_PA0 (0x00 + 0)
27#define AT91_PIN_PA1 (PIN_BASE + 0x00 + 1) 25#define AT91_PIN_PA1 (0x00 + 1)
28#define AT91_PIN_PA2 (PIN_BASE + 0x00 + 2) 26#define AT91_PIN_PA2 (0x00 + 2)
29#define AT91_PIN_PA3 (PIN_BASE + 0x00 + 3) 27#define AT91_PIN_PA3 (0x00 + 3)
30#define AT91_PIN_PA4 (PIN_BASE + 0x00 + 4) 28#define AT91_PIN_PA4 (0x00 + 4)
31#define AT91_PIN_PA5 (PIN_BASE + 0x00 + 5) 29#define AT91_PIN_PA5 (0x00 + 5)
32#define AT91_PIN_PA6 (PIN_BASE + 0x00 + 6) 30#define AT91_PIN_PA6 (0x00 + 6)
33#define AT91_PIN_PA7 (PIN_BASE + 0x00 + 7) 31#define AT91_PIN_PA7 (0x00 + 7)
34#define AT91_PIN_PA8 (PIN_BASE + 0x00 + 8) 32#define AT91_PIN_PA8 (0x00 + 8)
35#define AT91_PIN_PA9 (PIN_BASE + 0x00 + 9) 33#define AT91_PIN_PA9 (0x00 + 9)
36#define AT91_PIN_PA10 (PIN_BASE + 0x00 + 10) 34#define AT91_PIN_PA10 (0x00 + 10)
37#define AT91_PIN_PA11 (PIN_BASE + 0x00 + 11) 35#define AT91_PIN_PA11 (0x00 + 11)
38#define AT91_PIN_PA12 (PIN_BASE + 0x00 + 12) 36#define AT91_PIN_PA12 (0x00 + 12)
39#define AT91_PIN_PA13 (PIN_BASE + 0x00 + 13) 37#define AT91_PIN_PA13 (0x00 + 13)
40#define AT91_PIN_PA14 (PIN_BASE + 0x00 + 14) 38#define AT91_PIN_PA14 (0x00 + 14)
41#define AT91_PIN_PA15 (PIN_BASE + 0x00 + 15) 39#define AT91_PIN_PA15 (0x00 + 15)
42#define AT91_PIN_PA16 (PIN_BASE + 0x00 + 16) 40#define AT91_PIN_PA16 (0x00 + 16)
43#define AT91_PIN_PA17 (PIN_BASE + 0x00 + 17) 41#define AT91_PIN_PA17 (0x00 + 17)
44#define AT91_PIN_PA18 (PIN_BASE + 0x00 + 18) 42#define AT91_PIN_PA18 (0x00 + 18)
45#define AT91_PIN_PA19 (PIN_BASE + 0x00 + 19) 43#define AT91_PIN_PA19 (0x00 + 19)
46#define AT91_PIN_PA20 (PIN_BASE + 0x00 + 20) 44#define AT91_PIN_PA20 (0x00 + 20)
47#define AT91_PIN_PA21 (PIN_BASE + 0x00 + 21) 45#define AT91_PIN_PA21 (0x00 + 21)
48#define AT91_PIN_PA22 (PIN_BASE + 0x00 + 22) 46#define AT91_PIN_PA22 (0x00 + 22)
49#define AT91_PIN_PA23 (PIN_BASE + 0x00 + 23) 47#define AT91_PIN_PA23 (0x00 + 23)
50#define AT91_PIN_PA24 (PIN_BASE + 0x00 + 24) 48#define AT91_PIN_PA24 (0x00 + 24)
51#define AT91_PIN_PA25 (PIN_BASE + 0x00 + 25) 49#define AT91_PIN_PA25 (0x00 + 25)
52#define AT91_PIN_PA26 (PIN_BASE + 0x00 + 26) 50#define AT91_PIN_PA26 (0x00 + 26)
53#define AT91_PIN_PA27 (PIN_BASE + 0x00 + 27) 51#define AT91_PIN_PA27 (0x00 + 27)
54#define AT91_PIN_PA28 (PIN_BASE + 0x00 + 28) 52#define AT91_PIN_PA28 (0x00 + 28)
55#define AT91_PIN_PA29 (PIN_BASE + 0x00 + 29) 53#define AT91_PIN_PA29 (0x00 + 29)
56#define AT91_PIN_PA30 (PIN_BASE + 0x00 + 30) 54#define AT91_PIN_PA30 (0x00 + 30)
57#define AT91_PIN_PA31 (PIN_BASE + 0x00 + 31) 55#define AT91_PIN_PA31 (0x00 + 31)
58 56
59#define AT91_PIN_PB0 (PIN_BASE + 0x20 + 0) 57#define AT91_PIN_PB0 (0x20 + 0)
60#define AT91_PIN_PB1 (PIN_BASE + 0x20 + 1) 58#define AT91_PIN_PB1 (0x20 + 1)
61#define AT91_PIN_PB2 (PIN_BASE + 0x20 + 2) 59#define AT91_PIN_PB2 (0x20 + 2)
62#define AT91_PIN_PB3 (PIN_BASE + 0x20 + 3) 60#define AT91_PIN_PB3 (0x20 + 3)
63#define AT91_PIN_PB4 (PIN_BASE + 0x20 + 4) 61#define AT91_PIN_PB4 (0x20 + 4)
64#define AT91_PIN_PB5 (PIN_BASE + 0x20 + 5) 62#define AT91_PIN_PB5 (0x20 + 5)
65#define AT91_PIN_PB6 (PIN_BASE + 0x20 + 6) 63#define AT91_PIN_PB6 (0x20 + 6)
66#define AT91_PIN_PB7 (PIN_BASE + 0x20 + 7) 64#define AT91_PIN_PB7 (0x20 + 7)
67#define AT91_PIN_PB8 (PIN_BASE + 0x20 + 8) 65#define AT91_PIN_PB8 (0x20 + 8)
68#define AT91_PIN_PB9 (PIN_BASE + 0x20 + 9) 66#define AT91_PIN_PB9 (0x20 + 9)
69#define AT91_PIN_PB10 (PIN_BASE + 0x20 + 10) 67#define AT91_PIN_PB10 (0x20 + 10)
70#define AT91_PIN_PB11 (PIN_BASE + 0x20 + 11) 68#define AT91_PIN_PB11 (0x20 + 11)
71#define AT91_PIN_PB12 (PIN_BASE + 0x20 + 12) 69#define AT91_PIN_PB12 (0x20 + 12)
72#define AT91_PIN_PB13 (PIN_BASE + 0x20 + 13) 70#define AT91_PIN_PB13 (0x20 + 13)
73#define AT91_PIN_PB14 (PIN_BASE + 0x20 + 14) 71#define AT91_PIN_PB14 (0x20 + 14)
74#define AT91_PIN_PB15 (PIN_BASE + 0x20 + 15) 72#define AT91_PIN_PB15 (0x20 + 15)
75#define AT91_PIN_PB16 (PIN_BASE + 0x20 + 16) 73#define AT91_PIN_PB16 (0x20 + 16)
76#define AT91_PIN_PB17 (PIN_BASE + 0x20 + 17) 74#define AT91_PIN_PB17 (0x20 + 17)
77#define AT91_PIN_PB18 (PIN_BASE + 0x20 + 18) 75#define AT91_PIN_PB18 (0x20 + 18)
78#define AT91_PIN_PB19 (PIN_BASE + 0x20 + 19) 76#define AT91_PIN_PB19 (0x20 + 19)
79#define AT91_PIN_PB20 (PIN_BASE + 0x20 + 20) 77#define AT91_PIN_PB20 (0x20 + 20)
80#define AT91_PIN_PB21 (PIN_BASE + 0x20 + 21) 78#define AT91_PIN_PB21 (0x20 + 21)
81#define AT91_PIN_PB22 (PIN_BASE + 0x20 + 22) 79#define AT91_PIN_PB22 (0x20 + 22)
82#define AT91_PIN_PB23 (PIN_BASE + 0x20 + 23) 80#define AT91_PIN_PB23 (0x20 + 23)
83#define AT91_PIN_PB24 (PIN_BASE + 0x20 + 24) 81#define AT91_PIN_PB24 (0x20 + 24)
84#define AT91_PIN_PB25 (PIN_BASE + 0x20 + 25) 82#define AT91_PIN_PB25 (0x20 + 25)
85#define AT91_PIN_PB26 (PIN_BASE + 0x20 + 26) 83#define AT91_PIN_PB26 (0x20 + 26)
86#define AT91_PIN_PB27 (PIN_BASE + 0x20 + 27) 84#define AT91_PIN_PB27 (0x20 + 27)
87#define AT91_PIN_PB28 (PIN_BASE + 0x20 + 28) 85#define AT91_PIN_PB28 (0x20 + 28)
88#define AT91_PIN_PB29 (PIN_BASE + 0x20 + 29) 86#define AT91_PIN_PB29 (0x20 + 29)
89#define AT91_PIN_PB30 (PIN_BASE + 0x20 + 30) 87#define AT91_PIN_PB30 (0x20 + 30)
90#define AT91_PIN_PB31 (PIN_BASE + 0x20 + 31) 88#define AT91_PIN_PB31 (0x20 + 31)
91 89
92#define AT91_PIN_PC0 (PIN_BASE + 0x40 + 0) 90#define AT91_PIN_PC0 (0x40 + 0)
93#define AT91_PIN_PC1 (PIN_BASE + 0x40 + 1) 91#define AT91_PIN_PC1 (0x40 + 1)
94#define AT91_PIN_PC2 (PIN_BASE + 0x40 + 2) 92#define AT91_PIN_PC2 (0x40 + 2)
95#define AT91_PIN_PC3 (PIN_BASE + 0x40 + 3) 93#define AT91_PIN_PC3 (0x40 + 3)
96#define AT91_PIN_PC4 (PIN_BASE + 0x40 + 4) 94#define AT91_PIN_PC4 (0x40 + 4)
97#define AT91_PIN_PC5 (PIN_BASE + 0x40 + 5) 95#define AT91_PIN_PC5 (0x40 + 5)
98#define AT91_PIN_PC6 (PIN_BASE + 0x40 + 6) 96#define AT91_PIN_PC6 (0x40 + 6)
99#define AT91_PIN_PC7 (PIN_BASE + 0x40 + 7) 97#define AT91_PIN_PC7 (0x40 + 7)
100#define AT91_PIN_PC8 (PIN_BASE + 0x40 + 8) 98#define AT91_PIN_PC8 (0x40 + 8)
101#define AT91_PIN_PC9 (PIN_BASE + 0x40 + 9) 99#define AT91_PIN_PC9 (0x40 + 9)
102#define AT91_PIN_PC10 (PIN_BASE + 0x40 + 10) 100#define AT91_PIN_PC10 (0x40 + 10)
103#define AT91_PIN_PC11 (PIN_BASE + 0x40 + 11) 101#define AT91_PIN_PC11 (0x40 + 11)
104#define AT91_PIN_PC12 (PIN_BASE + 0x40 + 12) 102#define AT91_PIN_PC12 (0x40 + 12)
105#define AT91_PIN_PC13 (PIN_BASE + 0x40 + 13) 103#define AT91_PIN_PC13 (0x40 + 13)
106#define AT91_PIN_PC14 (PIN_BASE + 0x40 + 14) 104#define AT91_PIN_PC14 (0x40 + 14)
107#define AT91_PIN_PC15 (PIN_BASE + 0x40 + 15) 105#define AT91_PIN_PC15 (0x40 + 15)
108#define AT91_PIN_PC16 (PIN_BASE + 0x40 + 16) 106#define AT91_PIN_PC16 (0x40 + 16)
109#define AT91_PIN_PC17 (PIN_BASE + 0x40 + 17) 107#define AT91_PIN_PC17 (0x40 + 17)
110#define AT91_PIN_PC18 (PIN_BASE + 0x40 + 18) 108#define AT91_PIN_PC18 (0x40 + 18)
111#define AT91_PIN_PC19 (PIN_BASE + 0x40 + 19) 109#define AT91_PIN_PC19 (0x40 + 19)
112#define AT91_PIN_PC20 (PIN_BASE + 0x40 + 20) 110#define AT91_PIN_PC20 (0x40 + 20)
113#define AT91_PIN_PC21 (PIN_BASE + 0x40 + 21) 111#define AT91_PIN_PC21 (0x40 + 21)
114#define AT91_PIN_PC22 (PIN_BASE + 0x40 + 22) 112#define AT91_PIN_PC22 (0x40 + 22)
115#define AT91_PIN_PC23 (PIN_BASE + 0x40 + 23) 113#define AT91_PIN_PC23 (0x40 + 23)
116#define AT91_PIN_PC24 (PIN_BASE + 0x40 + 24) 114#define AT91_PIN_PC24 (0x40 + 24)
117#define AT91_PIN_PC25 (PIN_BASE + 0x40 + 25) 115#define AT91_PIN_PC25 (0x40 + 25)
118#define AT91_PIN_PC26 (PIN_BASE + 0x40 + 26) 116#define AT91_PIN_PC26 (0x40 + 26)
119#define AT91_PIN_PC27 (PIN_BASE + 0x40 + 27) 117#define AT91_PIN_PC27 (0x40 + 27)
120#define AT91_PIN_PC28 (PIN_BASE + 0x40 + 28) 118#define AT91_PIN_PC28 (0x40 + 28)
121#define AT91_PIN_PC29 (PIN_BASE + 0x40 + 29) 119#define AT91_PIN_PC29 (0x40 + 29)
122#define AT91_PIN_PC30 (PIN_BASE + 0x40 + 30) 120#define AT91_PIN_PC30 (0x40 + 30)
123#define AT91_PIN_PC31 (PIN_BASE + 0x40 + 31) 121#define AT91_PIN_PC31 (0x40 + 31)
124 122
125#define AT91_PIN_PD0 (PIN_BASE + 0x60 + 0) 123#define AT91_PIN_PD0 (0x60 + 0)
126#define AT91_PIN_PD1 (PIN_BASE + 0x60 + 1) 124#define AT91_PIN_PD1 (0x60 + 1)
127#define AT91_PIN_PD2 (PIN_BASE + 0x60 + 2) 125#define AT91_PIN_PD2 (0x60 + 2)
128#define AT91_PIN_PD3 (PIN_BASE + 0x60 + 3) 126#define AT91_PIN_PD3 (0x60 + 3)
129#define AT91_PIN_PD4 (PIN_BASE + 0x60 + 4) 127#define AT91_PIN_PD4 (0x60 + 4)
130#define AT91_PIN_PD5 (PIN_BASE + 0x60 + 5) 128#define AT91_PIN_PD5 (0x60 + 5)
131#define AT91_PIN_PD6 (PIN_BASE + 0x60 + 6) 129#define AT91_PIN_PD6 (0x60 + 6)
132#define AT91_PIN_PD7 (PIN_BASE + 0x60 + 7) 130#define AT91_PIN_PD7 (0x60 + 7)
133#define AT91_PIN_PD8 (PIN_BASE + 0x60 + 8) 131#define AT91_PIN_PD8 (0x60 + 8)
134#define AT91_PIN_PD9 (PIN_BASE + 0x60 + 9) 132#define AT91_PIN_PD9 (0x60 + 9)
135#define AT91_PIN_PD10 (PIN_BASE + 0x60 + 10) 133#define AT91_PIN_PD10 (0x60 + 10)
136#define AT91_PIN_PD11 (PIN_BASE + 0x60 + 11) 134#define AT91_PIN_PD11 (0x60 + 11)
137#define AT91_PIN_PD12 (PIN_BASE + 0x60 + 12) 135#define AT91_PIN_PD12 (0x60 + 12)
138#define AT91_PIN_PD13 (PIN_BASE + 0x60 + 13) 136#define AT91_PIN_PD13 (0x60 + 13)
139#define AT91_PIN_PD14 (PIN_BASE + 0x60 + 14) 137#define AT91_PIN_PD14 (0x60 + 14)
140#define AT91_PIN_PD15 (PIN_BASE + 0x60 + 15) 138#define AT91_PIN_PD15 (0x60 + 15)
141#define AT91_PIN_PD16 (PIN_BASE + 0x60 + 16) 139#define AT91_PIN_PD16 (0x60 + 16)
142#define AT91_PIN_PD17 (PIN_BASE + 0x60 + 17) 140#define AT91_PIN_PD17 (0x60 + 17)
143#define AT91_PIN_PD18 (PIN_BASE + 0x60 + 18) 141#define AT91_PIN_PD18 (0x60 + 18)
144#define AT91_PIN_PD19 (PIN_BASE + 0x60 + 19) 142#define AT91_PIN_PD19 (0x60 + 19)
145#define AT91_PIN_PD20 (PIN_BASE + 0x60 + 20) 143#define AT91_PIN_PD20 (0x60 + 20)
146#define AT91_PIN_PD21 (PIN_BASE + 0x60 + 21) 144#define AT91_PIN_PD21 (0x60 + 21)
147#define AT91_PIN_PD22 (PIN_BASE + 0x60 + 22) 145#define AT91_PIN_PD22 (0x60 + 22)
148#define AT91_PIN_PD23 (PIN_BASE + 0x60 + 23) 146#define AT91_PIN_PD23 (0x60 + 23)
149#define AT91_PIN_PD24 (PIN_BASE + 0x60 + 24) 147#define AT91_PIN_PD24 (0x60 + 24)
150#define AT91_PIN_PD25 (PIN_BASE + 0x60 + 25) 148#define AT91_PIN_PD25 (0x60 + 25)
151#define AT91_PIN_PD26 (PIN_BASE + 0x60 + 26) 149#define AT91_PIN_PD26 (0x60 + 26)
152#define AT91_PIN_PD27 (PIN_BASE + 0x60 + 27) 150#define AT91_PIN_PD27 (0x60 + 27)
153#define AT91_PIN_PD28 (PIN_BASE + 0x60 + 28) 151#define AT91_PIN_PD28 (0x60 + 28)
154#define AT91_PIN_PD29 (PIN_BASE + 0x60 + 29) 152#define AT91_PIN_PD29 (0x60 + 29)
155#define AT91_PIN_PD30 (PIN_BASE + 0x60 + 30) 153#define AT91_PIN_PD30 (0x60 + 30)
156#define AT91_PIN_PD31 (PIN_BASE + 0x60 + 31) 154#define AT91_PIN_PD31 (0x60 + 31)
157 155
158#define AT91_PIN_PE0 (PIN_BASE + 0x80 + 0) 156#define AT91_PIN_PE0 (0x80 + 0)
159#define AT91_PIN_PE1 (PIN_BASE + 0x80 + 1) 157#define AT91_PIN_PE1 (0x80 + 1)
160#define AT91_PIN_PE2 (PIN_BASE + 0x80 + 2) 158#define AT91_PIN_PE2 (0x80 + 2)
161#define AT91_PIN_PE3 (PIN_BASE + 0x80 + 3) 159#define AT91_PIN_PE3 (0x80 + 3)
162#define AT91_PIN_PE4 (PIN_BASE + 0x80 + 4) 160#define AT91_PIN_PE4 (0x80 + 4)
163#define AT91_PIN_PE5 (PIN_BASE + 0x80 + 5) 161#define AT91_PIN_PE5 (0x80 + 5)
164#define AT91_PIN_PE6 (PIN_BASE + 0x80 + 6) 162#define AT91_PIN_PE6 (0x80 + 6)
165#define AT91_PIN_PE7 (PIN_BASE + 0x80 + 7) 163#define AT91_PIN_PE7 (0x80 + 7)
166#define AT91_PIN_PE8 (PIN_BASE + 0x80 + 8) 164#define AT91_PIN_PE8 (0x80 + 8)
167#define AT91_PIN_PE9 (PIN_BASE + 0x80 + 9) 165#define AT91_PIN_PE9 (0x80 + 9)
168#define AT91_PIN_PE10 (PIN_BASE + 0x80 + 10) 166#define AT91_PIN_PE10 (0x80 + 10)
169#define AT91_PIN_PE11 (PIN_BASE + 0x80 + 11) 167#define AT91_PIN_PE11 (0x80 + 11)
170#define AT91_PIN_PE12 (PIN_BASE + 0x80 + 12) 168#define AT91_PIN_PE12 (0x80 + 12)
171#define AT91_PIN_PE13 (PIN_BASE + 0x80 + 13) 169#define AT91_PIN_PE13 (0x80 + 13)
172#define AT91_PIN_PE14 (PIN_BASE + 0x80 + 14) 170#define AT91_PIN_PE14 (0x80 + 14)
173#define AT91_PIN_PE15 (PIN_BASE + 0x80 + 15) 171#define AT91_PIN_PE15 (0x80 + 15)
174#define AT91_PIN_PE16 (PIN_BASE + 0x80 + 16) 172#define AT91_PIN_PE16 (0x80 + 16)
175#define AT91_PIN_PE17 (PIN_BASE + 0x80 + 17) 173#define AT91_PIN_PE17 (0x80 + 17)
176#define AT91_PIN_PE18 (PIN_BASE + 0x80 + 18) 174#define AT91_PIN_PE18 (0x80 + 18)
177#define AT91_PIN_PE19 (PIN_BASE + 0x80 + 19) 175#define AT91_PIN_PE19 (0x80 + 19)
178#define AT91_PIN_PE20 (PIN_BASE + 0x80 + 20) 176#define AT91_PIN_PE20 (0x80 + 20)
179#define AT91_PIN_PE21 (PIN_BASE + 0x80 + 21) 177#define AT91_PIN_PE21 (0x80 + 21)
180#define AT91_PIN_PE22 (PIN_BASE + 0x80 + 22) 178#define AT91_PIN_PE22 (0x80 + 22)
181#define AT91_PIN_PE23 (PIN_BASE + 0x80 + 23) 179#define AT91_PIN_PE23 (0x80 + 23)
182#define AT91_PIN_PE24 (PIN_BASE + 0x80 + 24) 180#define AT91_PIN_PE24 (0x80 + 24)
183#define AT91_PIN_PE25 (PIN_BASE + 0x80 + 25) 181#define AT91_PIN_PE25 (0x80 + 25)
184#define AT91_PIN_PE26 (PIN_BASE + 0x80 + 26) 182#define AT91_PIN_PE26 (0x80 + 26)
185#define AT91_PIN_PE27 (PIN_BASE + 0x80 + 27) 183#define AT91_PIN_PE27 (0x80 + 27)
186#define AT91_PIN_PE28 (PIN_BASE + 0x80 + 28) 184#define AT91_PIN_PE28 (0x80 + 28)
187#define AT91_PIN_PE29 (PIN_BASE + 0x80 + 29) 185#define AT91_PIN_PE29 (0x80 + 29)
188#define AT91_PIN_PE30 (PIN_BASE + 0x80 + 30) 186#define AT91_PIN_PE30 (0x80 + 30)
189#define AT91_PIN_PE31 (PIN_BASE + 0x80 + 31) 187#define AT91_PIN_PE31 (0x80 + 31)
190 188
191#ifndef __ASSEMBLY__ 189#ifndef __ASSEMBLY__
192/* setup setup routines, called from board init or driver probe() */ 190/* setup setup routines, called from board init or driver probe() */
@@ -215,8 +213,8 @@ extern void at91_gpio_resume(void);
215 213
216#include <asm/errno.h> 214#include <asm/errno.h>
217 215
218#define gpio_to_irq(gpio) (gpio) 216#define gpio_to_irq(gpio) (gpio + NR_AIC_IRQS)
219#define irq_to_gpio(irq) (irq) 217#define irq_to_gpio(irq) (irq - NR_AIC_IRQS)
220 218
221#endif /* __ASSEMBLY__ */ 219#endif /* __ASSEMBLY__ */
222 220
diff --git a/arch/arm/mach-at91/include/mach/hardware.h b/arch/arm/mach-at91/include/mach/hardware.h
index 483478d8be6b..2d0e4e998566 100644
--- a/arch/arm/mach-at91/include/mach/hardware.h
+++ b/arch/arm/mach-at91/include/mach/hardware.h
@@ -16,6 +16,12 @@
16 16
17#include <asm/sizes.h> 17#include <asm/sizes.h>
18 18
19/* DBGU base */
20/* rm9200, 9260/9g20, 9261/9g10, 9rl */
21#define AT91_BASE_DBGU0 0xfffff200
22/* 9263, 9g45, cap9 */
23#define AT91_BASE_DBGU1 0xffffee00
24
19#if defined(CONFIG_ARCH_AT91RM9200) 25#if defined(CONFIG_ARCH_AT91RM9200)
20#include <mach/at91rm9200.h> 26#include <mach/at91rm9200.h>
21#elif defined(CONFIG_ARCH_AT91SAM9260) || defined(CONFIG_ARCH_AT91SAM9G20) 27#elif defined(CONFIG_ARCH_AT91SAM9260) || defined(CONFIG_ARCH_AT91SAM9G20)
@@ -52,6 +58,12 @@
52#endif 58#endif
53 59
54/* 60/*
61 * On all at91 have the Advanced Interrupt Controller starts at address
62 * 0xfffff000
63 */
64#define AT91_AIC 0xfffff000
65
66/*
55 * Peripheral identifiers/interrupts. 67 * Peripheral identifiers/interrupts.
56 */ 68 */
57#define AT91_ID_FIQ 0 /* Advanced Interrupt Controller (FIQ) */ 69#define AT91_ID_FIQ 0 /* Advanced Interrupt Controller (FIQ) */
diff --git a/arch/arm/mach-at91/include/mach/io.h b/arch/arm/mach-at91/include/mach/io.h
index 4298e7806c76..4ca09ef7ca29 100644
--- a/arch/arm/mach-at91/include/mach/io.h
+++ b/arch/arm/mach-at91/include/mach/io.h
@@ -30,14 +30,6 @@
30 30
31#ifndef __ASSEMBLY__ 31#ifndef __ASSEMBLY__
32 32
33#ifndef CONFIG_ARCH_AT91X40
34#define __arch_ioremap at91_ioremap
35#define __arch_iounmap at91_iounmap
36#endif
37
38void __iomem *at91_ioremap(unsigned long phys, size_t size, unsigned int type);
39void at91_iounmap(volatile void __iomem *addr);
40
41static inline unsigned int at91_sys_read(unsigned int reg_offset) 33static inline unsigned int at91_sys_read(unsigned int reg_offset)
42{ 34{
43 void __iomem *addr = (void __iomem *)AT91_VA_BASE_SYS; 35 void __iomem *addr = (void __iomem *)AT91_VA_BASE_SYS;
diff --git a/arch/arm/mach-at91/include/mach/irqs.h b/arch/arm/mach-at91/include/mach/irqs.h
index 36bd55f3fc6e..ac8b7dfc85ef 100644
--- a/arch/arm/mach-at91/include/mach/irqs.h
+++ b/arch/arm/mach-at91/include/mach/irqs.h
@@ -31,7 +31,7 @@
31 * Acknowledge interrupt with AIC after interrupt has been handled. 31 * Acknowledge interrupt with AIC after interrupt has been handled.
32 * (by kernel/irq.c) 32 * (by kernel/irq.c)
33 */ 33 */
34#define irq_finish(irq) do { at91_sys_write(AT91_AIC_EOICR, 0); } while (0) 34#define irq_finish(irq) do { at91_aic_write(AT91_AIC_EOICR, 0); } while (0)
35 35
36 36
37/* 37/*
diff --git a/arch/arm/mach-at91/include/mach/system.h b/arch/arm/mach-at91/include/mach/system.h
index 36af14bc13bb..cbd64f3bcecd 100644
--- a/arch/arm/mach-at91/include/mach/system.h
+++ b/arch/arm/mach-at91/include/mach/system.h
@@ -47,13 +47,4 @@ static inline void arch_idle(void)
47#endif 47#endif
48} 48}
49 49
50void (*at91_arch_reset)(void);
51
52static inline void arch_reset(char mode, const char *cmd)
53{
54 /* call the CPU-specific reset function */
55 if (at91_arch_reset)
56 (at91_arch_reset)();
57}
58
59#endif 50#endif
diff --git a/arch/arm/mach-at91/include/mach/timex.h b/arch/arm/mach-at91/include/mach/timex.h
index 85820ad801cc..5e917a66edd7 100644
--- a/arch/arm/mach-at91/include/mach/timex.h
+++ b/arch/arm/mach-at91/include/mach/timex.h
@@ -23,70 +23,15 @@
23 23
24#include <mach/hardware.h> 24#include <mach/hardware.h>
25 25
26#if defined(CONFIG_ARCH_AT91RM9200) 26#ifdef CONFIG_ARCH_AT91X40
27 27
28#define CLOCK_TICK_RATE (AT91_SLOW_CLOCK) 28#define AT91X40_MASTER_CLOCK 40000000
29 29#define CLOCK_TICK_RATE (AT91X40_MASTER_CLOCK)
30#elif defined(CONFIG_ARCH_AT91SAM9260)
31
32#if defined(CONFIG_MACH_USB_A9260) || defined(CONFIG_MACH_QIL_A9260)
33#define AT91SAM9_MASTER_CLOCK 90000000
34#else
35#define AT91SAM9_MASTER_CLOCK 99300000
36#endif
37
38#define CLOCK_TICK_RATE (AT91SAM9_MASTER_CLOCK/16)
39
40#elif defined(CONFIG_ARCH_AT91SAM9261)
41
42#define AT91SAM9_MASTER_CLOCK 99300000
43#define CLOCK_TICK_RATE (AT91SAM9_MASTER_CLOCK/16)
44
45#elif defined(CONFIG_ARCH_AT91SAM9G10)
46
47#define AT91SAM9_MASTER_CLOCK 133000000
48#define CLOCK_TICK_RATE (AT91SAM9_MASTER_CLOCK/16)
49
50#elif defined(CONFIG_ARCH_AT91SAM9263)
51
52#if defined(CONFIG_MACH_USB_A9263)
53#define AT91SAM9_MASTER_CLOCK 90000000
54#else
55#define AT91SAM9_MASTER_CLOCK 99959500
56#endif
57
58#define CLOCK_TICK_RATE (AT91SAM9_MASTER_CLOCK/16)
59
60#elif defined(CONFIG_ARCH_AT91SAM9RL)
61
62#define AT91SAM9_MASTER_CLOCK 100000000
63#define CLOCK_TICK_RATE (AT91SAM9_MASTER_CLOCK/16)
64
65#elif defined(CONFIG_ARCH_AT91SAM9G20)
66 30
67#if defined(CONFIG_MACH_USB_A9G20)
68#define AT91SAM9_MASTER_CLOCK 133000000
69#else 31#else
70#define AT91SAM9_MASTER_CLOCK 132096000
71#endif
72
73#define CLOCK_TICK_RATE (AT91SAM9_MASTER_CLOCK/16)
74
75#elif defined(CONFIG_ARCH_AT91SAM9G45)
76 32
77#define AT91SAM9_MASTER_CLOCK 133333333 33#define CLOCK_TICK_RATE 12345678
78#define CLOCK_TICK_RATE (AT91SAM9_MASTER_CLOCK/16)
79
80#elif defined(CONFIG_ARCH_AT91CAP9)
81
82#define AT91CAP9_MASTER_CLOCK 100000000
83#define CLOCK_TICK_RATE (AT91CAP9_MASTER_CLOCK/16)
84
85#elif defined(CONFIG_ARCH_AT91X40)
86
87#define AT91X40_MASTER_CLOCK 40000000
88#define CLOCK_TICK_RATE (AT91X40_MASTER_CLOCK)
89 34
90#endif 35#endif
91 36
92#endif 37#endif /* __ASM_ARCH_TIMEX_H */
diff --git a/arch/arm/mach-at91/include/mach/uncompress.h b/arch/arm/mach-at91/include/mach/uncompress.h
index 18bdcdeb474f..0234fd9d20d6 100644
--- a/arch/arm/mach-at91/include/mach/uncompress.h
+++ b/arch/arm/mach-at91/include/mach/uncompress.h
@@ -24,8 +24,10 @@
24#include <linux/io.h> 24#include <linux/io.h>
25#include <linux/atmel_serial.h> 25#include <linux/atmel_serial.h>
26 26
27#if defined(CONFIG_AT91_EARLY_DBGU) 27#if defined(CONFIG_AT91_EARLY_DBGU0)
28#define UART_OFFSET (AT91_DBGU + AT91_BASE_SYS) 28#define UART_OFFSET AT91_BASE_DBGU0
29#elif defined(CONFIG_AT91_EARLY_DBGU1)
30#define UART_OFFSET AT91_BASE_DBGU1
29#elif defined(CONFIG_AT91_EARLY_USART0) 31#elif defined(CONFIG_AT91_EARLY_USART0)
30#define UART_OFFSET AT91_USART0 32#define UART_OFFSET AT91_USART0
31#elif defined(CONFIG_AT91_EARLY_USART1) 33#elif defined(CONFIG_AT91_EARLY_USART1)
diff --git a/arch/arm/mach-at91/include/mach/vmalloc.h b/arch/arm/mach-at91/include/mach/vmalloc.h
deleted file mode 100644
index 8e4a1bd0ab1d..000000000000
--- a/arch/arm/mach-at91/include/mach/vmalloc.h
+++ /dev/null
@@ -1,28 +0,0 @@
1/*
2 * arch/arm/mach-at91/include/mach/vmalloc.h
3 *
4 * Copyright (C) 2003 SAN People
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */
20
21#ifndef __ASM_ARCH_VMALLOC_H
22#define __ASM_ARCH_VMALLOC_H
23
24#include <mach/hardware.h>
25
26#define VMALLOC_END (AT91_VIRT_BASE & PGDIR_MASK)
27
28#endif
diff --git a/arch/arm/mach-at91/irq.c b/arch/arm/mach-at91/irq.c
index 9665265ec757..be6b639ecd7b 100644
--- a/arch/arm/mach-at91/irq.c
+++ b/arch/arm/mach-at91/irq.c
@@ -33,17 +33,18 @@
33#include <asm/mach/irq.h> 33#include <asm/mach/irq.h>
34#include <asm/mach/map.h> 34#include <asm/mach/map.h>
35 35
36void __iomem *at91_aic_base;
36 37
37static void at91_aic_mask_irq(struct irq_data *d) 38static void at91_aic_mask_irq(struct irq_data *d)
38{ 39{
39 /* Disable interrupt on AIC */ 40 /* Disable interrupt on AIC */
40 at91_sys_write(AT91_AIC_IDCR, 1 << d->irq); 41 at91_aic_write(AT91_AIC_IDCR, 1 << d->irq);
41} 42}
42 43
43static void at91_aic_unmask_irq(struct irq_data *d) 44static void at91_aic_unmask_irq(struct irq_data *d)
44{ 45{
45 /* Enable interrupt on AIC */ 46 /* Enable interrupt on AIC */
46 at91_sys_write(AT91_AIC_IECR, 1 << d->irq); 47 at91_aic_write(AT91_AIC_IECR, 1 << d->irq);
47} 48}
48 49
49unsigned int at91_extern_irq; 50unsigned int at91_extern_irq;
@@ -77,8 +78,8 @@ static int at91_aic_set_type(struct irq_data *d, unsigned type)
77 return -EINVAL; 78 return -EINVAL;
78 } 79 }
79 80
80 smr = at91_sys_read(AT91_AIC_SMR(d->irq)) & ~AT91_AIC_SRCTYPE; 81 smr = at91_aic_read(AT91_AIC_SMR(d->irq)) & ~AT91_AIC_SRCTYPE;
81 at91_sys_write(AT91_AIC_SMR(d->irq), smr | srctype); 82 at91_aic_write(AT91_AIC_SMR(d->irq), smr | srctype);
82 return 0; 83 return 0;
83} 84}
84 85
@@ -102,15 +103,15 @@ static int at91_aic_set_wake(struct irq_data *d, unsigned value)
102 103
103void at91_irq_suspend(void) 104void at91_irq_suspend(void)
104{ 105{
105 backups = at91_sys_read(AT91_AIC_IMR); 106 backups = at91_aic_read(AT91_AIC_IMR);
106 at91_sys_write(AT91_AIC_IDCR, backups); 107 at91_aic_write(AT91_AIC_IDCR, backups);
107 at91_sys_write(AT91_AIC_IECR, wakeups); 108 at91_aic_write(AT91_AIC_IECR, wakeups);
108} 109}
109 110
110void at91_irq_resume(void) 111void at91_irq_resume(void)
111{ 112{
112 at91_sys_write(AT91_AIC_IDCR, wakeups); 113 at91_aic_write(AT91_AIC_IDCR, wakeups);
113 at91_sys_write(AT91_AIC_IECR, backups); 114 at91_aic_write(AT91_AIC_IECR, backups);
114} 115}
115 116
116#else 117#else
@@ -133,34 +134,39 @@ void __init at91_aic_init(unsigned int priority[NR_AIC_IRQS])
133{ 134{
134 unsigned int i; 135 unsigned int i;
135 136
137 at91_aic_base = ioremap(AT91_AIC, 512);
138
139 if (!at91_aic_base)
140 panic("Impossible to ioremap AT91_AIC\n");
141
136 /* 142 /*
137 * The IVR is used by macro get_irqnr_and_base to read and verify. 143 * The IVR is used by macro get_irqnr_and_base to read and verify.
138 * The irq number is NR_AIC_IRQS when a spurious interrupt has occurred. 144 * The irq number is NR_AIC_IRQS when a spurious interrupt has occurred.
139 */ 145 */
140 for (i = 0; i < NR_AIC_IRQS; i++) { 146 for (i = 0; i < NR_AIC_IRQS; i++) {
141 /* Put irq number in Source Vector Register: */ 147 /* Put irq number in Source Vector Register: */
142 at91_sys_write(AT91_AIC_SVR(i), i); 148 at91_aic_write(AT91_AIC_SVR(i), i);
143 /* Active Low interrupt, with the specified priority */ 149 /* Active Low interrupt, with the specified priority */
144 at91_sys_write(AT91_AIC_SMR(i), AT91_AIC_SRCTYPE_LOW | priority[i]); 150 at91_aic_write(AT91_AIC_SMR(i), AT91_AIC_SRCTYPE_LOW | priority[i]);
145 151
146 irq_set_chip_and_handler(i, &at91_aic_chip, handle_level_irq); 152 irq_set_chip_and_handler(i, &at91_aic_chip, handle_level_irq);
147 set_irq_flags(i, IRQF_VALID | IRQF_PROBE); 153 set_irq_flags(i, IRQF_VALID | IRQF_PROBE);
148 154
149 /* Perform 8 End Of Interrupt Command to make sure AIC will not Lock out nIRQ */ 155 /* Perform 8 End Of Interrupt Command to make sure AIC will not Lock out nIRQ */
150 if (i < 8) 156 if (i < 8)
151 at91_sys_write(AT91_AIC_EOICR, 0); 157 at91_aic_write(AT91_AIC_EOICR, 0);
152 } 158 }
153 159
154 /* 160 /*
155 * Spurious Interrupt ID in Spurious Vector Register is NR_AIC_IRQS 161 * Spurious Interrupt ID in Spurious Vector Register is NR_AIC_IRQS
156 * When there is no current interrupt, the IRQ Vector Register reads the value stored in AIC_SPU 162 * When there is no current interrupt, the IRQ Vector Register reads the value stored in AIC_SPU
157 */ 163 */
158 at91_sys_write(AT91_AIC_SPU, NR_AIC_IRQS); 164 at91_aic_write(AT91_AIC_SPU, NR_AIC_IRQS);
159 165
160 /* No debugging in AIC: Debug (Protect) Control Register */ 166 /* No debugging in AIC: Debug (Protect) Control Register */
161 at91_sys_write(AT91_AIC_DCR, 0); 167 at91_aic_write(AT91_AIC_DCR, 0);
162 168
163 /* Disable and clear all interrupts initially */ 169 /* Disable and clear all interrupts initially */
164 at91_sys_write(AT91_AIC_IDCR, 0xFFFFFFFF); 170 at91_aic_write(AT91_AIC_IDCR, 0xFFFFFFFF);
165 at91_sys_write(AT91_AIC_ICCR, 0xFFFFFFFF); 171 at91_aic_write(AT91_AIC_ICCR, 0xFFFFFFFF);
166} 172}
diff --git a/arch/arm/mach-at91/pm.c b/arch/arm/mach-at91/pm.c
index 7046158109d7..62ad95556c36 100644
--- a/arch/arm/mach-at91/pm.c
+++ b/arch/arm/mach-at91/pm.c
@@ -34,7 +34,7 @@
34/* 34/*
35 * Show the reason for the previous system reset. 35 * Show the reason for the previous system reset.
36 */ 36 */
37#if defined(AT91_SHDWC) 37#if defined(AT91_RSTC)
38 38
39#include <mach/at91_rstc.h> 39#include <mach/at91_rstc.h>
40#include <mach/at91_shdwc.h> 40#include <mach/at91_shdwc.h>
@@ -58,8 +58,11 @@ static void __init show_reset_status(void)
58 char *reason, *r2 = reset; 58 char *reason, *r2 = reset;
59 u32 reset_type, wake_type; 59 u32 reset_type, wake_type;
60 60
61 if (!at91_shdwc_base)
62 return;
63
61 reset_type = at91_sys_read(AT91_RSTC_SR) & AT91_RSTC_RSTTYP; 64 reset_type = at91_sys_read(AT91_RSTC_SR) & AT91_RSTC_RSTTYP;
62 wake_type = at91_sys_read(AT91_SHDW_SR); 65 wake_type = at91_shdwc_read(AT91_SHDW_SR);
63 66
64 switch (reset_type) { 67 switch (reset_type) {
65 case AT91_RSTC_RSTTYP_GENERAL: 68 case AT91_RSTC_RSTTYP_GENERAL:
@@ -215,7 +218,7 @@ static int at91_pm_enter(suspend_state_t state)
215 | (1 << AT91_ID_FIQ) 218 | (1 << AT91_ID_FIQ)
216 | (1 << AT91_ID_SYS) 219 | (1 << AT91_ID_SYS)
217 | (at91_extern_irq)) 220 | (at91_extern_irq))
218 & at91_sys_read(AT91_AIC_IMR), 221 & at91_aic_read(AT91_AIC_IMR),
219 state); 222 state);
220 223
221 switch (state) { 224 switch (state) {
@@ -283,7 +286,7 @@ static int at91_pm_enter(suspend_state_t state)
283 } 286 }
284 287
285 pr_debug("AT91: PM - wakeup %08x\n", 288 pr_debug("AT91: PM - wakeup %08x\n",
286 at91_sys_read(AT91_AIC_IPR) & at91_sys_read(AT91_AIC_IMR)); 289 at91_aic_read(AT91_AIC_IPR) & at91_aic_read(AT91_AIC_IMR));
287 290
288error: 291error:
289 target_state = PM_SUSPEND_ON; 292 target_state = PM_SUSPEND_ON;
diff --git a/arch/arm/mach-at91/sam9_smc.c b/arch/arm/mach-at91/sam9_smc.c
index 5eab6aa621d0..8294783b679d 100644
--- a/arch/arm/mach-at91/sam9_smc.c
+++ b/arch/arm/mach-at91/sam9_smc.c
@@ -10,38 +10,58 @@
10 10
11#include <linux/module.h> 11#include <linux/module.h>
12#include <linux/io.h> 12#include <linux/io.h>
13#include <linux/of.h>
14#include <linux/of_address.h>
13 15
14#include <mach/at91sam9_smc.h> 16#include <mach/at91sam9_smc.h>
15 17
16#include "sam9_smc.h" 18#include "sam9_smc.h"
17 19
18void __init sam9_smc_configure(int cs, struct sam9_smc_config* config) 20
21#define AT91_SMC_CS(id, n) (smc_base_addr[id] + ((n) * 0x10))
22
23static void __iomem *smc_base_addr[2];
24
25static void __init sam9_smc_cs_configure(void __iomem *base, struct sam9_smc_config* config)
19{ 26{
27
20 /* Setup register */ 28 /* Setup register */
21 at91_sys_write(AT91_SMC_SETUP(cs), 29 __raw_writel(AT91_SMC_NWESETUP_(config->nwe_setup)
22 AT91_SMC_NWESETUP_(config->nwe_setup) 30 | AT91_SMC_NCS_WRSETUP_(config->ncs_write_setup)
23 | AT91_SMC_NCS_WRSETUP_(config->ncs_write_setup) 31 | AT91_SMC_NRDSETUP_(config->nrd_setup)
24 | AT91_SMC_NRDSETUP_(config->nrd_setup) 32 | AT91_SMC_NCS_RDSETUP_(config->ncs_read_setup),
25 | AT91_SMC_NCS_RDSETUP_(config->ncs_read_setup) 33 base + AT91_SMC_SETUP);
26 );
27 34
28 /* Pulse register */ 35 /* Pulse register */
29 at91_sys_write(AT91_SMC_PULSE(cs), 36 __raw_writel(AT91_SMC_NWEPULSE_(config->nwe_pulse)
30 AT91_SMC_NWEPULSE_(config->nwe_pulse) 37 | AT91_SMC_NCS_WRPULSE_(config->ncs_write_pulse)
31 | AT91_SMC_NCS_WRPULSE_(config->ncs_write_pulse) 38 | AT91_SMC_NRDPULSE_(config->nrd_pulse)
32 | AT91_SMC_NRDPULSE_(config->nrd_pulse) 39 | AT91_SMC_NCS_RDPULSE_(config->ncs_read_pulse),
33 | AT91_SMC_NCS_RDPULSE_(config->ncs_read_pulse) 40 base + AT91_SMC_PULSE);
34 );
35 41
36 /* Cycle register */ 42 /* Cycle register */
37 at91_sys_write(AT91_SMC_CYCLE(cs), 43 __raw_writel(AT91_SMC_NWECYCLE_(config->write_cycle)
38 AT91_SMC_NWECYCLE_(config->write_cycle) 44 | AT91_SMC_NRDCYCLE_(config->read_cycle),
39 | AT91_SMC_NRDCYCLE_(config->read_cycle) 45 base + AT91_SMC_CYCLE);
40 );
41 46
42 /* Mode register */ 47 /* Mode register */
43 at91_sys_write(AT91_SMC_MODE(cs), 48 __raw_writel(config->mode
44 config->mode 49 | AT91_SMC_TDF_(config->tdf_cycles),
45 | AT91_SMC_TDF_(config->tdf_cycles) 50 base + AT91_SMC_MODE);
46 ); 51}
52
53void __init sam9_smc_configure(int id, int cs, struct sam9_smc_config* config)
54{
55 sam9_smc_cs_configure(AT91_SMC_CS(id, cs), config);
56}
57
58void __init at91sam9_ioremap_smc(int id, u32 addr)
59{
60 if (id > 1) {
61 pr_warn("%s: id > 2\n", __func__);
62 return;
63 }
64 smc_base_addr[id] = ioremap(addr, 512);
65 if (!smc_base_addr[id])
66 pr_warn("Impossible to ioremap smc.%d 0x%x\n", id, addr);
47} 67}
diff --git a/arch/arm/mach-at91/sam9_smc.h b/arch/arm/mach-at91/sam9_smc.h
index bf72cfb3455b..039c5ce17aec 100644
--- a/arch/arm/mach-at91/sam9_smc.h
+++ b/arch/arm/mach-at91/sam9_smc.h
@@ -30,4 +30,5 @@ struct sam9_smc_config {
30 u8 tdf_cycles:4; 30 u8 tdf_cycles:4;
31}; 31};
32 32
33extern void __init sam9_smc_configure(int cs, struct sam9_smc_config* config); 33extern void __init sam9_smc_configure(int id, int cs, struct sam9_smc_config* config);
34extern void __init at91sam9_ioremap_smc(int id, u32 addr);
diff --git a/arch/arm/mach-at91/setup.c b/arch/arm/mach-at91/setup.c
index aa64294c7db3..8bdcc3cb6012 100644
--- a/arch/arm/mach-at91/setup.c
+++ b/arch/arm/mach-at91/setup.c
@@ -8,6 +8,7 @@
8#include <linux/module.h> 8#include <linux/module.h>
9#include <linux/io.h> 9#include <linux/io.h>
10#include <linux/mm.h> 10#include <linux/mm.h>
11#include <linux/pm.h>
11 12
12#include <asm/mach/map.h> 13#include <asm/mach/map.h>
13 14
@@ -15,6 +16,7 @@
15#include <mach/cpu.h> 16#include <mach/cpu.h>
16#include <mach/at91_dbgu.h> 17#include <mach/at91_dbgu.h>
17#include <mach/at91_pmc.h> 18#include <mach/at91_pmc.h>
19#include <mach/at91_shdwc.h>
18 20
19#include "soc.h" 21#include "soc.h"
20#include "generic.h" 22#include "generic.h"
@@ -73,27 +75,6 @@ static struct map_desc at91_io_desc __initdata = {
73 .type = MT_DEVICE, 75 .type = MT_DEVICE,
74}; 76};
75 77
76void __iomem *at91_ioremap(unsigned long p, size_t size, unsigned int type)
77{
78 if (p >= AT91_BASE_SYS && p <= (AT91_BASE_SYS + SZ_16K - 1))
79 return (void __iomem *)AT91_IO_P2V(p);
80
81 return __arm_ioremap_caller(p, size, type, __builtin_return_address(0));
82}
83EXPORT_SYMBOL(at91_ioremap);
84
85void at91_iounmap(volatile void __iomem *addr)
86{
87 unsigned long virt = (unsigned long)addr;
88
89 if (virt >= VMALLOC_START && virt < VMALLOC_END)
90 __iounmap(addr);
91}
92EXPORT_SYMBOL(at91_iounmap);
93
94#define AT91_DBGU0 0xfffff200
95#define AT91_DBGU1 0xffffee00
96
97static void __init soc_detect(u32 dbgu_base) 78static void __init soc_detect(u32 dbgu_base)
98{ 79{
99 u32 cidr, socid; 80 u32 cidr, socid;
@@ -266,9 +247,9 @@ void __init at91_map_io(void)
266 at91_soc_initdata.type = AT91_SOC_NONE; 247 at91_soc_initdata.type = AT91_SOC_NONE;
267 at91_soc_initdata.subtype = AT91_SOC_SUBTYPE_NONE; 248 at91_soc_initdata.subtype = AT91_SOC_SUBTYPE_NONE;
268 249
269 soc_detect(AT91_DBGU0); 250 soc_detect(AT91_BASE_DBGU0);
270 if (!at91_soc_is_detected()) 251 if (!at91_soc_is_detected())
271 soc_detect(AT91_DBGU1); 252 soc_detect(AT91_BASE_DBGU1);
272 253
273 if (!at91_soc_is_detected()) 254 if (!at91_soc_is_detected())
274 panic("AT91: Impossible to detect the SOC type"); 255 panic("AT91: Impossible to detect the SOC type");
@@ -285,8 +266,25 @@ void __init at91_map_io(void)
285 at91_boot_soc.map_io(); 266 at91_boot_soc.map_io();
286} 267}
287 268
269void __iomem *at91_shdwc_base = NULL;
270
271static void at91sam9_poweroff(void)
272{
273 at91_shdwc_write(AT91_SHDW_CR, AT91_SHDW_KEY | AT91_SHDW_SHDW);
274}
275
276void __init at91_ioremap_shdwc(u32 base_addr)
277{
278 at91_shdwc_base = ioremap(base_addr, 16);
279 if (!at91_shdwc_base)
280 panic("Impossible to ioremap at91_shdwc_base\n");
281 pm_power_off = at91sam9_poweroff;
282}
283
288void __init at91_initialize(unsigned long main_clock) 284void __init at91_initialize(unsigned long main_clock)
289{ 285{
286 at91_boot_soc.ioremap_registers();
287
290 /* Init clock subsystem */ 288 /* Init clock subsystem */
291 at91_clock_init(main_clock); 289 at91_clock_init(main_clock);
292 290
diff --git a/arch/arm/mach-at91/soc.h b/arch/arm/mach-at91/soc.h
index 21ed8816e6f7..4588ae6f7acd 100644
--- a/arch/arm/mach-at91/soc.h
+++ b/arch/arm/mach-at91/soc.h
@@ -7,6 +7,7 @@
7struct at91_init_soc { 7struct at91_init_soc {
8 unsigned int *default_irq_priority; 8 unsigned int *default_irq_priority;
9 void (*map_io)(void); 9 void (*map_io)(void);
10 void (*ioremap_registers)(void);
10 void (*register_clocks)(void); 11 void (*register_clocks)(void);
11 void (*init)(void); 12 void (*init)(void);
12}; 13};