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authorLinus Torvalds <torvalds@linux-foundation.org>2012-05-25 12:31:59 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2012-05-25 12:31:59 -0400
commitd5adf235adc8d8d67c10afd43922c92753f6be3c (patch)
tree18c3cdcbc9a50a8cd00b03d83ec76bad7c7594f8 /arch/arm/mach-at91
parentd484864dd96e1830e7689510597707c1df8cd681 (diff)
parent1dd1ea8eb46a71201943148cc0ed3182cd04e288 (diff)
Merge branch 'next' of git://git.infradead.org/users/vkoul/slave-dma
Pull slave-dmaengine updates from Vinod Koul: "Nothing exciting this time, odd fixes in a bunch of drivers" * 'next' of git://git.infradead.org/users/vkoul/slave-dma: dmaengine: at_hdmac: take maxburst from slave configuration dmaengine: at_hdmac: remove ATC_DEFAULT_CTRLA constant dmaengine: at_hdmac: remove some at_dma_slave comments dma: imx-sdma: make channel0 operations atomic dmaengine: Fixup dmaengine_prep_slave_single() to be actually useful dmaengine: Use dma_sg_len(sg) instead of sg->length dmaengine: Use sg_dma_address instead of sg_phys DMA: PL330: Remove duplicate header file inclusion dma: imx-sdma: keep the callbacks invoked in the tasklet dmaengine: dw_dma: add Device Tree probing capability dmaengine: dw_dmac: Add clk_{un}prepare() support dma/amba-pl08x: add support for the Nomadik variant dma/amba-pl08x: check for terminal count status only
Diffstat (limited to 'arch/arm/mach-at91')
-rw-r--r--arch/arm/mach-at91/at91sam9g45_devices.c1
-rw-r--r--arch/arm/mach-at91/include/mach/at_hdmac.h26
2 files changed, 0 insertions, 27 deletions
diff --git a/arch/arm/mach-at91/at91sam9g45_devices.c b/arch/arm/mach-at91/at91sam9g45_devices.c
index f6747246d649..933fc9afe7d0 100644
--- a/arch/arm/mach-at91/at91sam9g45_devices.c
+++ b/arch/arm/mach-at91/at91sam9g45_devices.c
@@ -436,7 +436,6 @@ void __init at91_add_device_mci(short mmc_id, struct mci_platform_data *data)
436 atslave->dma_dev = &at_hdmac_device.dev; 436 atslave->dma_dev = &at_hdmac_device.dev;
437 atslave->cfg = ATC_FIFOCFG_HALFFIFO 437 atslave->cfg = ATC_FIFOCFG_HALFFIFO
438 | ATC_SRC_H2SEL_HW | ATC_DST_H2SEL_HW; 438 | ATC_SRC_H2SEL_HW | ATC_DST_H2SEL_HW;
439 atslave->ctrla = ATC_SCSIZE_16 | ATC_DCSIZE_16;
440 if (mmc_id == 0) /* MCI0 */ 439 if (mmc_id == 0) /* MCI0 */
441 atslave->cfg |= ATC_SRC_PER(AT_DMA_ID_MCI0) 440 atslave->cfg |= ATC_SRC_PER(AT_DMA_ID_MCI0)
442 | ATC_DST_PER(AT_DMA_ID_MCI0); 441 | ATC_DST_PER(AT_DMA_ID_MCI0);
diff --git a/arch/arm/mach-at91/include/mach/at_hdmac.h b/arch/arm/mach-at91/include/mach/at_hdmac.h
index fff48d1a0f4e..cab0997be3de 100644
--- a/arch/arm/mach-at91/include/mach/at_hdmac.h
+++ b/arch/arm/mach-at91/include/mach/at_hdmac.h
@@ -26,18 +26,11 @@ struct at_dma_platform_data {
26/** 26/**
27 * struct at_dma_slave - Controller-specific information about a slave 27 * struct at_dma_slave - Controller-specific information about a slave
28 * @dma_dev: required DMA master device 28 * @dma_dev: required DMA master device
29 * @tx_reg: physical address of data register used for
30 * memory-to-peripheral transfers
31 * @rx_reg: physical address of data register used for
32 * peripheral-to-memory transfers
33 * @reg_width: peripheral register width
34 * @cfg: Platform-specific initializer for the CFG register 29 * @cfg: Platform-specific initializer for the CFG register
35 * @ctrla: Platform-specific initializer for the CTRLA register
36 */ 30 */
37struct at_dma_slave { 31struct at_dma_slave {
38 struct device *dma_dev; 32 struct device *dma_dev;
39 u32 cfg; 33 u32 cfg;
40 u32 ctrla;
41}; 34};
42 35
43 36
@@ -64,24 +57,5 @@ struct at_dma_slave {
64#define ATC_FIFOCFG_HALFFIFO (0x1 << 28) 57#define ATC_FIFOCFG_HALFFIFO (0x1 << 28)
65#define ATC_FIFOCFG_ENOUGHSPACE (0x2 << 28) 58#define ATC_FIFOCFG_ENOUGHSPACE (0x2 << 28)
66 59
67/* Platform-configurable bits in CTRLA */
68#define ATC_SCSIZE_MASK (0x7 << 16) /* Source Chunk Transfer Size */
69#define ATC_SCSIZE_1 (0x0 << 16)
70#define ATC_SCSIZE_4 (0x1 << 16)
71#define ATC_SCSIZE_8 (0x2 << 16)
72#define ATC_SCSIZE_16 (0x3 << 16)
73#define ATC_SCSIZE_32 (0x4 << 16)
74#define ATC_SCSIZE_64 (0x5 << 16)
75#define ATC_SCSIZE_128 (0x6 << 16)
76#define ATC_SCSIZE_256 (0x7 << 16)
77#define ATC_DCSIZE_MASK (0x7 << 20) /* Destination Chunk Transfer Size */
78#define ATC_DCSIZE_1 (0x0 << 20)
79#define ATC_DCSIZE_4 (0x1 << 20)
80#define ATC_DCSIZE_8 (0x2 << 20)
81#define ATC_DCSIZE_16 (0x3 << 20)
82#define ATC_DCSIZE_32 (0x4 << 20)
83#define ATC_DCSIZE_64 (0x5 << 20)
84#define ATC_DCSIZE_128 (0x6 << 20)
85#define ATC_DCSIZE_256 (0x7 << 20)
86 60
87#endif /* AT_HDMAC_H */ 61#endif /* AT_HDMAC_H */