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authorAlexandre Belloni <alexandre.belloni@free-electrons.com>2015-01-15 09:59:26 -0500
committerNicolas Ferre <nicolas.ferre@atmel.com>2015-01-16 12:07:25 -0500
commita63ba4114690cad6e71cbcfd187b0ebf20321dfa (patch)
treef4970ed6c4b3749ba1bad9532e6a41b95c992c14 /arch/arm/mach-at91
parentd2e467905596760f1218e3382de24ab2c14d5baf (diff)
ARM: at91: pm: add UDP and UHP checks to newer SoCs
Check UDP and UHP on sam9x5, sam9n12 and the sama5 series. Check UHP on the sam9g45. Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Diffstat (limited to 'arch/arm/mach-at91')
-rw-r--r--arch/arm/mach-at91/pm.c9
1 files changed, 2 insertions, 7 deletions
diff --git a/arch/arm/mach-at91/pm.c b/arch/arm/mach-at91/pm.c
index 515791edcc60..71cc845263dc 100644
--- a/arch/arm/mach-at91/pm.c
+++ b/arch/arm/mach-at91/pm.c
@@ -275,6 +275,7 @@ static int __init at91_pm_init(void)
275 pr_info("AT91: Power Management%s\n", (slow_clock ? " (with slow clock mode)" : "")); 275 pr_info("AT91: Power Management%s\n", (slow_clock ? " (with slow clock mode)" : ""));
276 276
277 at91_pm_data.memctrl = AT91_MEMCTRL_SDRAMC; 277 at91_pm_data.memctrl = AT91_MEMCTRL_SDRAMC;
278 at91_pm_data.uhp_udp_mask = AT91SAM926x_PMC_UHP | AT91SAM926x_PMC_UDP;
278 279
279 if (of_machine_is_compatible("atmel,at91rm9200")) { 280 if (of_machine_is_compatible("atmel,at91rm9200")) {
280 /* 281 /*
@@ -286,14 +287,8 @@ static int __init at91_pm_init(void)
286 at91_pm_data.uhp_udp_mask = AT91RM9200_PMC_UHP | 287 at91_pm_data.uhp_udp_mask = AT91RM9200_PMC_UHP |
287 AT91RM9200_PMC_UDP; 288 AT91RM9200_PMC_UDP;
288 at91_pm_data.memctrl = AT91_MEMCTRL_MC; 289 at91_pm_data.memctrl = AT91_MEMCTRL_MC;
289 } else if (of_machine_is_compatible("atmel,at91sam9260") ||
290 of_machine_is_compatible("atmel,at91sam9g20") ||
291 of_machine_is_compatible("atmel,at91sam9261") ||
292 of_machine_is_compatible("atmel,at91sam9g10") ||
293 of_machine_is_compatible("atmel,at91sam9263")) {
294 at91_pm_data.uhp_udp_mask = AT91SAM926x_PMC_UHP |
295 AT91SAM926x_PMC_UDP;
296 } else if (of_machine_is_compatible("atmel,at91sam9g45")) { 290 } else if (of_machine_is_compatible("atmel,at91sam9g45")) {
291 at91_pm_data.uhp_udp_mask = AT91RM9200_PMC_UHP;
297 at91_pm_data.memctrl = AT91_MEMCTRL_DDRSDR; 292 at91_pm_data.memctrl = AT91_MEMCTRL_DDRSDR;
298 } 293 }
299 294