Merge tag 'at91-soc' of git://github.com/at91linux/linux-at91 into late/all

From Nicolas Ferre:
AT91 SoC update for 3.12 take 1
- enable kernel uncompress information output for
  SoC where it was missing: at91sam9n12 and sama5d3
- addition of at91rm9200 to the generic at91_dt_defconfig

* tag 'at91-soc' of git://github.com/at91linux/linux-at91:
  ARM: at91: at91_dt_defconfig: enable rm9200 support
  ARM: at91: sam9n12: enable kernel uncompress info output
  ARM: at91: sama5: enable kernel uncompress info output
  ARM: at91: include sama5d3.h into hardware.h
  ARM: at91: sama5d3: add definition for usart base address

3 files changed, 22 insertions, 0 deletions

diff --git a/arch/arm/mach-at91/include/mach/hardware.h b/arch/arm/mach-at91/include/mach/hardware.h
index a832e0707611..f17aa3150019 100644
--- a/arch/arm/mach-at91/include/mach/hardware.h
+++ b/arch/arm/mach-at91/include/mach/hardware.h
@@ -33,6 +33,7 @@
 #include <mach/at91sam9g45.h>
 #include <mach/at91sam9x5.h>
 #include <mach/at91sam9n12.h>
+#include <mach/sama5d3.h>
 
 /*
  * On all at91 except rm9200 and x40 have the System Controller starts
diff --git a/arch/arm/mach-at91/include/mach/sama5d3.h b/arch/arm/mach-at91/include/mach/sama5d3.h
index 6dc81ee38048..31096a8aaf1d 100644
--- a/arch/arm/mach-at91/include/mach/sama5d3.h
+++ b/arch/arm/mach-at91/include/mach/sama5d3.h
@@ -65,6 +65,14 @@
 #define SAMA5D3_ID_IRQ0         47      /* Advanced Interrupt Controller (IRQ0) */
 
 /*
+ * User Peripheral physical base addresses.
+ */
+#define SAMA5D3_BASE_USART0     0xf001c000
+#define SAMA5D3_BASE_USART1     0xf0020000
+#define SAMA5D3_BASE_USART2     0xf8020000
+#define SAMA5D3_BASE_USART3     0xf8024000
+
+/*
  * Internal Memory
  */
 #define SAMA5D3_SRAM_BASE       0x00300000      /* Internal SRAM base address */
diff --git a/arch/arm/mach-at91/include/mach/uncompress.h b/arch/arm/mach-at91/include/mach/uncompress.h
index 5659f7c72120..4bb644f8e87c 100644
--- a/arch/arm/mach-at91/include/mach/uncompress.h
+++ b/arch/arm/mach-at91/include/mach/uncompress.h
@@ -94,6 +94,15 @@ static const u32 uarts_sam9x5[] = {
         0,
 };
 
+static const u32 uarts_sama5[] = {
+        AT91_BASE_DBGU1,
+        SAMA5D3_BASE_USART0,
+        SAMA5D3_BASE_USART1,
+        SAMA5D3_BASE_USART2,
+        SAMA5D3_BASE_USART3,
+        0,
+};
+
 static inline const u32* decomp_soc_detect(void __iomem *dbgu_base)
 {
         u32 cidr, socid;
@@ -121,8 +130,12 @@ static inline const u32* decomp_soc_detect(void __iomem *dbgu_base)
         case ARCH_ID_AT91SAM9RL64:
                 return uarts_sam9rl;
 
+        case ARCH_ID_AT91SAM9N12:
         case ARCH_ID_AT91SAM9X5:
                 return uarts_sam9x5;
+
+        case ARCH_ID_SAMA5D3:
+                return uarts_sama5;
         }
 
         /* at91sam9g10 */