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authorAlexandre Belloni <alexandre.belloni@free-electrons.com>2015-03-13 17:57:21 -0400
committerNicolas Ferre <nicolas.ferre@atmel.com>2015-03-19 11:37:45 -0400
commitf56d8f7c29320abe6f923fa1b3cb7adcc3252a24 (patch)
tree73f0e60623fbf1d858a963a83ada772b4aece052 /arch/arm/mach-at91/include
parent0794261104c593c11be48c2e3b5b38e14a036cba (diff)
ARM: at91: remove useless mach/cpu.h
mach/cpu.h is not used anymore, remove it. Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Diffstat (limited to 'arch/arm/mach-at91/include')
-rw-r--r--arch/arm/mach-at91/include/mach/at91sam9_smc.h2
-rw-r--r--arch/arm/mach-at91/include/mach/cpu.h216
2 files changed, 0 insertions, 218 deletions
diff --git a/arch/arm/mach-at91/include/mach/at91sam9_smc.h b/arch/arm/mach-at91/include/mach/at91sam9_smc.h
index 175e1fdd9fe8..ff54a0ce90e3 100644
--- a/arch/arm/mach-at91/include/mach/at91sam9_smc.h
+++ b/arch/arm/mach-at91/include/mach/at91sam9_smc.h
@@ -16,8 +16,6 @@
16#ifndef AT91SAM9_SMC_H 16#ifndef AT91SAM9_SMC_H
17#define AT91SAM9_SMC_H 17#define AT91SAM9_SMC_H
18 18
19#include <mach/cpu.h>
20
21#ifndef __ASSEMBLY__ 19#ifndef __ASSEMBLY__
22struct sam9_smc_config { 20struct sam9_smc_config {
23 /* Setup register */ 21 /* Setup register */
diff --git a/arch/arm/mach-at91/include/mach/cpu.h b/arch/arm/mach-at91/include/mach/cpu.h
deleted file mode 100644
index ce7c80a44983..000000000000
--- a/arch/arm/mach-at91/include/mach/cpu.h
+++ /dev/null
@@ -1,216 +0,0 @@
1/*
2 * arch/arm/mach-at91/include/mach/cpu.h
3 *
4 * Copyright (C) 2006 SAN People
5 * Copyright (C) 2011 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 */
13
14#ifndef __MACH_CPU_H__
15#define __MACH_CPU_H__
16
17#define ARCH_ID_AT91RM9200 0x09290780
18#define ARCH_ID_AT91SAM9260 0x019803a0
19#define ARCH_ID_AT91SAM9261 0x019703a0
20#define ARCH_ID_AT91SAM9263 0x019607a0
21#define ARCH_ID_AT91SAM9G10 0x019903a0
22#define ARCH_ID_AT91SAM9G20 0x019905a0
23#define ARCH_ID_AT91SAM9RL64 0x019b03a0
24#define ARCH_ID_AT91SAM9G45 0x819b05a0
25#define ARCH_ID_AT91SAM9G45MRL 0x819b05a2 /* aka 9G45-ES2 & non ES lots */
26#define ARCH_ID_AT91SAM9G45ES 0x819b05a1 /* 9G45-ES (Engineering Sample) */
27#define ARCH_ID_AT91SAM9X5 0x819a05a0
28#define ARCH_ID_AT91SAM9N12 0x819a07a0
29
30#define ARCH_ID_AT91SAM9XE128 0x329973a0
31#define ARCH_ID_AT91SAM9XE256 0x329a93a0
32#define ARCH_ID_AT91SAM9XE512 0x329aa3a0
33
34#define ARCH_ID_AT91M40800 0x14080044
35#define ARCH_ID_AT91R40807 0x44080746
36#define ARCH_ID_AT91M40807 0x14080745
37#define ARCH_ID_AT91R40008 0x44000840
38
39#define ARCH_ID_SAMA5 0x8A5C07C0
40
41#define ARCH_EXID_AT91SAM9M11 0x00000001
42#define ARCH_EXID_AT91SAM9M10 0x00000002
43#define ARCH_EXID_AT91SAM9G46 0x00000003
44#define ARCH_EXID_AT91SAM9G45 0x00000004
45
46#define ARCH_EXID_AT91SAM9G15 0x00000000
47#define ARCH_EXID_AT91SAM9G35 0x00000001
48#define ARCH_EXID_AT91SAM9X35 0x00000002
49#define ARCH_EXID_AT91SAM9G25 0x00000003
50#define ARCH_EXID_AT91SAM9X25 0x00000004
51
52#define ARCH_EXID_SAMA5D3 0x00004300
53#define ARCH_EXID_SAMA5D31 0x00444300
54#define ARCH_EXID_SAMA5D33 0x00414300
55#define ARCH_EXID_SAMA5D34 0x00414301
56#define ARCH_EXID_SAMA5D35 0x00584300
57#define ARCH_EXID_SAMA5D36 0x00004301
58
59#define ARCH_EXID_SAMA5D4 0x00000007
60#define ARCH_EXID_SAMA5D41 0x00000001
61#define ARCH_EXID_SAMA5D42 0x00000002
62#define ARCH_EXID_SAMA5D43 0x00000003
63#define ARCH_EXID_SAMA5D44 0x00000004
64
65#define ARCH_FAMILY_AT91SAM9 0x01900000
66#define ARCH_FAMILY_AT91SAM9XE 0x02900000
67
68/* RM9200 type */
69#define ARCH_REVISON_9200_BGA (0 << 0)
70#define ARCH_REVISON_9200_PQFP (1 << 0)
71
72#ifndef __ASSEMBLY__
73enum at91_soc_type {
74 /* 920T */
75 AT91_SOC_RM9200,
76
77 /* SAM92xx */
78 AT91_SOC_SAM9260, AT91_SOC_SAM9261, AT91_SOC_SAM9263,
79
80 /* SAM9Gxx */
81 AT91_SOC_SAM9G10, AT91_SOC_SAM9G20, AT91_SOC_SAM9G45,
82
83 /* SAM9RL */
84 AT91_SOC_SAM9RL,
85
86 /* SAM9X5 */
87 AT91_SOC_SAM9X5,
88
89 /* SAM9N12 */
90 AT91_SOC_SAM9N12,
91
92 /* SAMA5D3 */
93 AT91_SOC_SAMA5D3,
94
95 /* SAMA5D4 */
96 AT91_SOC_SAMA5D4,
97
98 /* Unknown type */
99 AT91_SOC_UNKNOWN,
100};
101
102enum at91_soc_subtype {
103 /* RM9200 */
104 AT91_SOC_RM9200_BGA, AT91_SOC_RM9200_PQFP,
105
106 /* SAM9260 */
107 AT91_SOC_SAM9XE,
108
109 /* SAM9G45 */
110 AT91_SOC_SAM9G45ES, AT91_SOC_SAM9M10, AT91_SOC_SAM9G46, AT91_SOC_SAM9M11,
111
112 /* SAM9X5 */
113 AT91_SOC_SAM9G15, AT91_SOC_SAM9G35, AT91_SOC_SAM9X35,
114 AT91_SOC_SAM9G25, AT91_SOC_SAM9X25,
115
116 /* SAMA5D3 */
117 AT91_SOC_SAMA5D31, AT91_SOC_SAMA5D33, AT91_SOC_SAMA5D34,
118 AT91_SOC_SAMA5D35, AT91_SOC_SAMA5D36,
119
120 /* SAMA5D4 */
121 AT91_SOC_SAMA5D41, AT91_SOC_SAMA5D42, AT91_SOC_SAMA5D43,
122 AT91_SOC_SAMA5D44,
123
124 /* No subtype for this SoC */
125 AT91_SOC_SUBTYPE_NONE,
126
127 /* Unknown subtype */
128 AT91_SOC_SUBTYPE_UNKNOWN,
129};
130
131struct at91_socinfo {
132 unsigned int type, subtype;
133 unsigned int cidr, exid;
134};
135
136extern struct at91_socinfo at91_soc_initdata;
137const char *at91_get_soc_type(struct at91_socinfo *c);
138const char *at91_get_soc_subtype(struct at91_socinfo *c);
139
140static inline int at91_soc_is_detected(void)
141{
142 return at91_soc_initdata.type != AT91_SOC_UNKNOWN;
143}
144
145#ifdef CONFIG_SOC_AT91RM9200
146#define cpu_is_at91rm9200() (at91_soc_initdata.type == AT91_SOC_RM9200)
147#define cpu_is_at91rm9200_bga() (at91_soc_initdata.subtype == AT91_SOC_RM9200_BGA)
148#define cpu_is_at91rm9200_pqfp() (at91_soc_initdata.subtype == AT91_SOC_RM9200_PQFP)
149#else
150#define cpu_is_at91rm9200() (0)
151#define cpu_is_at91rm9200_bga() (0)
152#define cpu_is_at91rm9200_pqfp() (0)
153#endif
154
155#ifdef CONFIG_SOC_AT91SAM9
156#define cpu_is_at91sam9xe() (at91_soc_initdata.subtype == AT91_SOC_SAM9XE)
157#define cpu_is_at91sam9260() (at91_soc_initdata.type == AT91_SOC_SAM9260)
158#define cpu_is_at91sam9g20() (at91_soc_initdata.type == AT91_SOC_SAM9G20)
159#define cpu_is_at91sam9261() (at91_soc_initdata.type == AT91_SOC_SAM9261)
160#define cpu_is_at91sam9g10() (at91_soc_initdata.type == AT91_SOC_SAM9G10)
161#define cpu_is_at91sam9263() (at91_soc_initdata.type == AT91_SOC_SAM9263)
162#define cpu_is_at91sam9rl() (at91_soc_initdata.type == AT91_SOC_SAM9RL)
163#define cpu_is_at91sam9g45() (at91_soc_initdata.type == AT91_SOC_SAM9G45)
164#define cpu_is_at91sam9g45es() (at91_soc_initdata.subtype == AT91_SOC_SAM9G45ES)
165#define cpu_is_at91sam9m10() (at91_soc_initdata.subtype == AT91_SOC_SAM9M10)
166#define cpu_is_at91sam9g46() (at91_soc_initdata.subtype == AT91_SOC_SAM9G46)
167#define cpu_is_at91sam9m11() (at91_soc_initdata.subtype == AT91_SOC_SAM9M11)
168#define cpu_is_at91sam9x5() (at91_soc_initdata.type == AT91_SOC_SAM9X5)
169#define cpu_is_at91sam9g15() (at91_soc_initdata.subtype == AT91_SOC_SAM9G15)
170#define cpu_is_at91sam9g35() (at91_soc_initdata.subtype == AT91_SOC_SAM9G35)
171#define cpu_is_at91sam9x35() (at91_soc_initdata.subtype == AT91_SOC_SAM9X35)
172#define cpu_is_at91sam9g25() (at91_soc_initdata.subtype == AT91_SOC_SAM9G25)
173#define cpu_is_at91sam9x25() (at91_soc_initdata.subtype == AT91_SOC_SAM9X25)
174#define cpu_is_at91sam9n12() (at91_soc_initdata.type == AT91_SOC_SAM9N12)
175#else
176#define cpu_is_at91sam9xe() (0)
177#define cpu_is_at91sam9260() (0)
178#define cpu_is_at91sam9g20() (0)
179#define cpu_is_at91sam9261() (0)
180#define cpu_is_at91sam9g10() (0)
181#define cpu_is_at91sam9263() (0)
182#define cpu_is_at91sam9rl() (0)
183#define cpu_is_at91sam9g45() (0)
184#define cpu_is_at91sam9g45es() (0)
185#define cpu_is_at91sam9m10() (0)
186#define cpu_is_at91sam9g46() (0)
187#define cpu_is_at91sam9m11() (0)
188#define cpu_is_at91sam9x5() (0)
189#define cpu_is_at91sam9g15() (0)
190#define cpu_is_at91sam9g35() (0)
191#define cpu_is_at91sam9x35() (0)
192#define cpu_is_at91sam9g25() (0)
193#define cpu_is_at91sam9x25() (0)
194#define cpu_is_at91sam9n12() (0)
195#endif
196
197#ifdef CONFIG_SOC_SAMA5D3
198#define cpu_is_sama5d3() (at91_soc_initdata.type == AT91_SOC_SAMA5D3)
199#else
200#define cpu_is_sama5d3() (0)
201#endif
202
203#ifdef CONFIG_SOC_SAMA5D4
204#define cpu_is_sama5d4() (at91_soc_initdata.type == AT91_SOC_SAMA5D4)
205#else
206#define cpu_is_sama5d4() (0)
207#endif
208
209/*
210 * Since this is ARM, we will never run on any AVR32 CPU. But these
211 * definitions may reduce clutter in common drivers.
212 */
213#define cpu_is_at32ap7000() (0)
214#endif /* __ASSEMBLY__ */
215
216#endif /* __MACH_CPU_H__ */
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