ARM: at91: make rm9200 rtc drivers soc independent

switch the rtc drivers to resource and pass it via platform_device

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Cc: Nicolas Ferre <nicolas.ferre@atmel.com>

4 files changed, 15 insertions, 15 deletions

diff --git a/arch/arm/mach-at91/include/mach/at91_rtc.h b/arch/arm/mach-at91/include/mach/at91_rtc.h
index e56f4701a3e5..da1945e5f714 100644
--- a/arch/arm/mach-at91/include/mach/at91_rtc.h
+++ b/arch/arm/mach-at91/include/mach/at91_rtc.h
@@ -16,7 +16,7 @@
 #ifndef AT91_RTC_H
 #define AT91_RTC_H
 
-#define AT91_RTC_CR             (AT91_RTC + 0x00)       /* Control Register */
+#define AT91_RTC_CR             0x00                    /* Control Register */
 #define         AT91_RTC_UPDTIM         (1 <<  0)               /* Update Request Time Register */
 #define         AT91_RTC_UPDCAL         (1 <<  1)               /* Update Request Calendar Register */
 #define         AT91_RTC_TIMEVSEL       (3 <<  8)               /* Time Event Selection */
@@ -29,44 +29,44 @@
 #define                 AT91_RTC_CALEVSEL_MONTH         (1 << 16)
 #define                 AT91_RTC_CALEVSEL_YEAR          (2 << 16)
 
-#define AT91_RTC_MR             (AT91_RTC + 0x04)       /* Mode Register */
+#define AT91_RTC_MR             0x04                    /* Mode Register */
 #define                 AT91_RTC_HRMOD          (1 <<  0)               /* 12/24 Hour Mode */
 
-#define AT91_RTC_TIMR           (AT91_RTC + 0x08)       /* Time Register */
+#define AT91_RTC_TIMR           0x08                    /* Time Register */
 #define         AT91_RTC_SEC            (0x7f <<  0)            /* Current Second */
 #define         AT91_RTC_MIN            (0x7f <<  8)            /* Current Minute */
 #define         AT91_RTC_HOUR           (0x3f << 16)            /* Current Hour */
 #define         AT91_RTC_AMPM           (1    << 22)            /* Ante Meridiem Post Meridiem Indicator */
 
-#define AT91_RTC_CALR           (AT91_RTC + 0x0c)       /* Calendar Register */
+#define AT91_RTC_CALR           0x0c                    /* Calendar Register */
 #define         AT91_RTC_CENT           (0x7f <<  0)            /* Current Century */
 #define         AT91_RTC_YEAR           (0xff <<  8)            /* Current Year */
 #define         AT91_RTC_MONTH          (0x1f << 16)            /* Current Month */
 #define         AT91_RTC_DAY            (7    << 21)            /* Current Day */
 #define         AT91_RTC_DATE           (0x3f << 24)            /* Current Date */
 
-#define AT91_RTC_TIMALR         (AT91_RTC + 0x10)       /* Time Alarm Register */
+#define AT91_RTC_TIMALR         0x10                    /* Time Alarm Register */
 #define         AT91_RTC_SECEN          (1 <<  7)               /* Second Alarm Enable */
 #define         AT91_RTC_MINEN          (1 << 15)               /* Minute Alarm Enable */
 #define         AT91_RTC_HOUREN         (1 << 23)               /* Hour Alarm Enable */
 
-#define AT91_RTC_CALALR         (AT91_RTC + 0x14)       /* Calendar Alarm Register */
+#define AT91_RTC_CALALR         0x14                    /* Calendar Alarm Register */
 #define         AT91_RTC_MTHEN          (1 << 23)               /* Month Alarm Enable */
 #define         AT91_RTC_DATEEN         (1 << 31)               /* Date Alarm Enable */
 
-#define AT91_RTC_SR             (AT91_RTC + 0x18)       /* Status Register */
+#define AT91_RTC_SR             0x18                    /* Status Register */
 #define         AT91_RTC_ACKUPD         (1 <<  0)               /* Acknowledge for Update */
 #define         AT91_RTC_ALARM          (1 <<  1)               /* Alarm Flag */
 #define         AT91_RTC_SECEV          (1 <<  2)               /* Second Event */
 #define         AT91_RTC_TIMEV          (1 <<  3)               /* Time Event */
 #define         AT91_RTC_CALEV          (1 <<  4)               /* Calendar Event */
 
-#define AT91_RTC_SCCR           (AT91_RTC + 0x1c)       /* Status Clear Command Register */
-#define AT91_RTC_IER            (AT91_RTC + 0x20)       /* Interrupt Enable Register */
-#define AT91_RTC_IDR            (AT91_RTC + 0x24)       /* Interrupt Disable Register */
-#define AT91_RTC_IMR            (AT91_RTC + 0x28)       /* Interrupt Mask Register */
+#define AT91_RTC_SCCR           0x1c                    /* Status Clear Command Register */
+#define AT91_RTC_IER            0x20                    /* Interrupt Enable Register */
+#define AT91_RTC_IDR            0x24                    /* Interrupt Disable Register */
+#define AT91_RTC_IMR            0x28                    /* Interrupt Mask Register */
 
-#define AT91_RTC_VER            (AT91_RTC + 0x2c)       /* Valid Entry Register */
+#define AT91_RTC_VER            0x2c                    /* Valid Entry Register */
 #define         AT91_RTC_NVTIM          (1 <<  0)               /* Non valid Time */
 #define         AT91_RTC_NVCAL          (1 <<  1)               /* Non valid Calendar */
 #define         AT91_RTC_NVTIMALR       (1 <<  2)               /* Non valid Time Alarm */
diff --git a/arch/arm/mach-at91/include/mach/at91rm9200.h b/arch/arm/mach-at91/include/mach/at91rm9200.h
index 90e92a8b3cb5..bacb51141819 100644
--- a/arch/arm/mach-at91/include/mach/at91rm9200.h
+++ b/arch/arm/mach-at91/include/mach/at91rm9200.h
@@ -81,7 +81,6 @@
  */
 #define AT91_PMC        (0xfffffc00 - AT91_BASE_SYS)    /* Power Management Controller */
 #define AT91_ST         (0xfffffd00 - AT91_BASE_SYS)    /* System Timer */
-#define AT91_RTC        (0xfffffe00 - AT91_BASE_SYS)    /* Real-Time Clock */
 #define AT91_MC         (0xffffff00 - AT91_BASE_SYS)    /* Memory Controllers */
 
 #define AT91RM9200_BASE_DBGU    AT91_BASE_DBGU0 /* Debug Unit */
@@ -89,6 +88,7 @@
 #define AT91RM9200_BASE_PIOB    0xfffff600      /* PIO Controller B */
 #define AT91RM9200_BASE_PIOC    0xfffff800      /* PIO Controller C */
 #define AT91RM9200_BASE_PIOD    0xfffffa00      /* PIO Controller D */
+#define AT91RM9200_BASE_RTC     0xfffffe00      /* Real-Time Clock */
 
 #define AT91_USART0     AT91RM9200_BASE_US0
 #define AT91_USART1     AT91RM9200_BASE_US1
diff --git a/arch/arm/mach-at91/include/mach/at91sam9g45.h b/arch/arm/mach-at91/include/mach/at91sam9g45.h
index ac5c471635dc..f0c23c960dec 100644
--- a/arch/arm/mach-at91/include/mach/at91sam9g45.h
+++ b/arch/arm/mach-at91/include/mach/at91sam9g45.h
@@ -92,7 +92,6 @@
 #define AT91_PMC        (0xfffffc00 - AT91_BASE_SYS)
 #define AT91_RSTC       (0xfffffd00 - AT91_BASE_SYS)
 #define AT91_GPBR       (0xfffffd60 - AT91_BASE_SYS)
-#define AT91_RTC        (0xfffffdb0 - AT91_BASE_SYS)
 
 #define AT91SAM9G45_BASE_ECC    0xffffe200
 #define AT91SAM9G45_BASE_DMA    0xffffec00
@@ -107,6 +106,7 @@
 #define AT91SAM9G45_BASE_RTT    0xfffffd20
 #define AT91SAM9G45_BASE_PIT    0xfffffd30
 #define AT91SAM9G45_BASE_WDT    0xfffffd40
+#define AT91SAM9G45_BASE_RTC    0xfffffdb0
 
 #define AT91_USART0     AT91SAM9G45_BASE_US0
 #define AT91_USART1     AT91SAM9G45_BASE_US1
diff --git a/arch/arm/mach-at91/include/mach/at91sam9rl.h b/arch/arm/mach-at91/include/mach/at91sam9rl.h
index c466e8c898ad..2bb359e60b97 100644
--- a/arch/arm/mach-at91/include/mach/at91sam9rl.h
+++ b/arch/arm/mach-at91/include/mach/at91sam9rl.h
@@ -75,7 +75,6 @@
 #define AT91_RSTC       (0xfffffd00 - AT91_BASE_SYS)
 #define AT91_SCKCR      (0xfffffd50 - AT91_BASE_SYS)
 #define AT91_GPBR       (0xfffffd60 - AT91_BASE_SYS)
-#define AT91_RTC        (0xfffffe00 - AT91_BASE_SYS)
 
 #define AT91SAM9RL_BASE_DMA     0xffffe600
 #define AT91SAM9RL_BASE_ECC     0xffffe800
@@ -89,6 +88,7 @@
 #define AT91SAM9RL_BASE_RTT     0xfffffd20
 #define AT91SAM9RL_BASE_PIT     0xfffffd30
 #define AT91SAM9RL_BASE_WDT     0xfffffd40
+#define AT91SAM9RL_BASE_RTC     0xfffffe00
 
 #define AT91_USART0     AT91SAM9RL_BASE_US0
 #define AT91_USART1     AT91SAM9RL_BASE_US1