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authorLinus Torvalds <torvalds@linux-foundation.org>2012-05-22 12:23:24 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2012-05-22 12:23:24 -0400
commit9bc747bea5fad819e0c0ad96e6a67ea0640dfe2b (patch)
treed500225e7a1c90a6bd17d3e63e2f6e781810db2b /arch/arm/mach-at91/include
parent32b908eea9e5ecd1049008e134eadbfcd0da5e38 (diff)
parent0e896b1ddc1905df904df98c204bacf028219729 (diff)
Merge tag 'cleanup' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull first batch of arm-soc cleanups from Olof Johansson: "These cleanups are basically all over the place. The idea is to collect changes with minimal impact but large number of changes so we can avoid them from distracting in the diffstat in the other series. A significant number of lines get removed here, in particular because the ixp2000 and ixp23xx platforms get removed. These have never been extremely popular and have fallen into disuse over time with no active maintainer taking care of them. The u5500 soc never made it into a product, so we are removing it from the ux500 platform. Many good cleanups also went into the at91 and omap platforms, as has been the case for a number of releases." Trivial modify-delete conflicts in arch/arm/mach-{ixp2000,ixp23xx} * tag 'cleanup' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (152 commits) ARM: clps711x: Cleanup IRQ handling ARM clps711x: Removed unused header mach/time.h ARM: clps711x: Added note about support EP731x CPU to Kconfig ARM: clps711x: Added missing register definitions ARM: clps711x: Used own subarch directory for store header file Dove: Fix Section mismatch warnings ARM: orion5x: ts78xx debugging changes ARM: orion5x: remove PM dependency from ts78xx ARM: orion5x: ts78xx fix NAND resource off by one ARM: orion5x: ts78xx whitespace cleanups Orion5x: Fix Section mismatch warnings Orion5x: Fix warning: struct pci_dev declared inside paramter list ARM: clps711x: Combine header files into one for clps711x-targets ARM: S3C24XX: Use common macro to define resources on mach-qt2410.c ARM: S3C24XX: Use common macro to define resources on mach-osiris.c ARM: EXYNOS: Adapt to cpuidle core time keeping and irq enable ARM: S5PV210: Use common macro to define resources on mach-smdkv210.c ARM: S5PV210: Use common macro to define resources on dev-audio.c ARM: S5PC100: Use common macro to define resources on dev-audio.c ARM: S5P64X0: Use common macro to define resources on dev-audio.c ...
Diffstat (limited to 'arch/arm/mach-at91/include')
-rw-r--r--arch/arm/mach-at91/include/mach/at91rm9200.h5
-rw-r--r--arch/arm/mach-at91/include/mach/at91sam9260.h7
-rw-r--r--arch/arm/mach-at91/include/mach/at91sam9261.h4
-rw-r--r--arch/arm/mach-at91/include/mach/at91sam9263.h4
-rw-r--r--arch/arm/mach-at91/include/mach/at91sam9g45.h5
-rw-r--r--arch/arm/mach-at91/include/mach/at91sam9rl.h5
-rw-r--r--arch/arm/mach-at91/include/mach/at91sam9x5.h8
-rw-r--r--arch/arm/mach-at91/include/mach/board.h1
-rw-r--r--arch/arm/mach-at91/include/mach/cpu.h28
-rw-r--r--arch/arm/mach-at91/include/mach/hardware.h16
-rw-r--r--arch/arm/mach-at91/include/mach/uncompress.h178
11 files changed, 164 insertions, 97 deletions
diff --git a/arch/arm/mach-at91/include/mach/at91rm9200.h b/arch/arm/mach-at91/include/mach/at91rm9200.h
index 603e6aac2a4f..e67317c67761 100644
--- a/arch/arm/mach-at91/include/mach/at91rm9200.h
+++ b/arch/arm/mach-at91/include/mach/at91rm9200.h
@@ -88,11 +88,6 @@
88#define AT91RM9200_BASE_RTC 0xfffffe00 /* Real-Time Clock */ 88#define AT91RM9200_BASE_RTC 0xfffffe00 /* Real-Time Clock */
89#define AT91RM9200_BASE_MC 0xffffff00 /* Memory Controllers */ 89#define AT91RM9200_BASE_MC 0xffffff00 /* Memory Controllers */
90 90
91#define AT91_USART0 AT91RM9200_BASE_US0
92#define AT91_USART1 AT91RM9200_BASE_US1
93#define AT91_USART2 AT91RM9200_BASE_US2
94#define AT91_USART3 AT91RM9200_BASE_US3
95
96/* 91/*
97 * Internal Memory. 92 * Internal Memory.
98 */ 93 */
diff --git a/arch/arm/mach-at91/include/mach/at91sam9260.h b/arch/arm/mach-at91/include/mach/at91sam9260.h
index 08ae9afd00fe..416c7b6c56d3 100644
--- a/arch/arm/mach-at91/include/mach/at91sam9260.h
+++ b/arch/arm/mach-at91/include/mach/at91sam9260.h
@@ -95,13 +95,6 @@
95#define AT91SAM9260_BASE_WDT 0xfffffd40 95#define AT91SAM9260_BASE_WDT 0xfffffd40
96#define AT91SAM9260_BASE_GPBR 0xfffffd50 96#define AT91SAM9260_BASE_GPBR 0xfffffd50
97 97
98#define AT91_USART0 AT91SAM9260_BASE_US0
99#define AT91_USART1 AT91SAM9260_BASE_US1
100#define AT91_USART2 AT91SAM9260_BASE_US2
101#define AT91_USART3 AT91SAM9260_BASE_US3
102#define AT91_USART4 AT91SAM9260_BASE_US4
103#define AT91_USART5 AT91SAM9260_BASE_US5
104
105 98
106/* 99/*
107 * Internal Memory. 100 * Internal Memory.
diff --git a/arch/arm/mach-at91/include/mach/at91sam9261.h b/arch/arm/mach-at91/include/mach/at91sam9261.h
index 44fbdc12ee62..a041406d06ee 100644
--- a/arch/arm/mach-at91/include/mach/at91sam9261.h
+++ b/arch/arm/mach-at91/include/mach/at91sam9261.h
@@ -79,10 +79,6 @@
79#define AT91SAM9261_BASE_WDT 0xfffffd40 79#define AT91SAM9261_BASE_WDT 0xfffffd40
80#define AT91SAM9261_BASE_GPBR 0xfffffd50 80#define AT91SAM9261_BASE_GPBR 0xfffffd50
81 81
82#define AT91_USART0 AT91SAM9261_BASE_US0
83#define AT91_USART1 AT91SAM9261_BASE_US1
84#define AT91_USART2 AT91SAM9261_BASE_US2
85
86 82
87/* 83/*
88 * Internal Memory. 84 * Internal Memory.
diff --git a/arch/arm/mach-at91/include/mach/at91sam9263.h b/arch/arm/mach-at91/include/mach/at91sam9263.h
index d96cbb2e03c4..d201029d60b3 100644
--- a/arch/arm/mach-at91/include/mach/at91sam9263.h
+++ b/arch/arm/mach-at91/include/mach/at91sam9263.h
@@ -95,10 +95,6 @@
95#define AT91SAM9263_BASE_RTT1 0xfffffd50 95#define AT91SAM9263_BASE_RTT1 0xfffffd50
96#define AT91SAM9263_BASE_GPBR 0xfffffd60 96#define AT91SAM9263_BASE_GPBR 0xfffffd60
97 97
98#define AT91_USART0 AT91SAM9263_BASE_US0
99#define AT91_USART1 AT91SAM9263_BASE_US1
100#define AT91_USART2 AT91SAM9263_BASE_US2
101
102#define AT91_SMC AT91_SMC0 98#define AT91_SMC AT91_SMC0
103 99
104/* 100/*
diff --git a/arch/arm/mach-at91/include/mach/at91sam9g45.h b/arch/arm/mach-at91/include/mach/at91sam9g45.h
index d052abcff852..3a4da24d5911 100644
--- a/arch/arm/mach-at91/include/mach/at91sam9g45.h
+++ b/arch/arm/mach-at91/include/mach/at91sam9g45.h
@@ -106,11 +106,6 @@
106#define AT91SAM9G45_BASE_RTC 0xfffffdb0 106#define AT91SAM9G45_BASE_RTC 0xfffffdb0
107#define AT91SAM9G45_BASE_GPBR 0xfffffd60 107#define AT91SAM9G45_BASE_GPBR 0xfffffd60
108 108
109#define AT91_USART0 AT91SAM9G45_BASE_US0
110#define AT91_USART1 AT91SAM9G45_BASE_US1
111#define AT91_USART2 AT91SAM9G45_BASE_US2
112#define AT91_USART3 AT91SAM9G45_BASE_US3
113
114/* 109/*
115 * Internal Memory. 110 * Internal Memory.
116 */ 111 */
diff --git a/arch/arm/mach-at91/include/mach/at91sam9rl.h b/arch/arm/mach-at91/include/mach/at91sam9rl.h
index e0073eb10144..a15db56d33fa 100644
--- a/arch/arm/mach-at91/include/mach/at91sam9rl.h
+++ b/arch/arm/mach-at91/include/mach/at91sam9rl.h
@@ -89,11 +89,6 @@
89#define AT91SAM9RL_BASE_GPBR 0xfffffd60 89#define AT91SAM9RL_BASE_GPBR 0xfffffd60
90#define AT91SAM9RL_BASE_RTC 0xfffffe00 90#define AT91SAM9RL_BASE_RTC 0xfffffe00
91 91
92#define AT91_USART0 AT91SAM9RL_BASE_US0
93#define AT91_USART1 AT91SAM9RL_BASE_US1
94#define AT91_USART2 AT91SAM9RL_BASE_US2
95#define AT91_USART3 AT91SAM9RL_BASE_US3
96
97 92
98/* 93/*
99 * Internal Memory. 94 * Internal Memory.
diff --git a/arch/arm/mach-at91/include/mach/at91sam9x5.h b/arch/arm/mach-at91/include/mach/at91sam9x5.h
index 88e43d534cdf..c75ee19b58d3 100644
--- a/arch/arm/mach-at91/include/mach/at91sam9x5.h
+++ b/arch/arm/mach-at91/include/mach/at91sam9x5.h
@@ -55,14 +55,6 @@
55#define AT91SAM9X5_BASE_USART2 0xf8024000 55#define AT91SAM9X5_BASE_USART2 0xf8024000
56 56
57/* 57/*
58 * Base addresses for early serial code (uncompress.h)
59 */
60#define AT91_DBGU AT91_BASE_DBGU0
61#define AT91_USART0 AT91SAM9X5_BASE_USART0
62#define AT91_USART1 AT91SAM9X5_BASE_USART1
63#define AT91_USART2 AT91SAM9X5_BASE_USART2
64
65/*
66 * Internal Memory. 58 * Internal Memory.
67 */ 59 */
68#define AT91SAM9X5_SRAM_BASE 0x00300000 /* Internal SRAM base address */ 60#define AT91SAM9X5_SRAM_BASE 0x00300000 /* Internal SRAM base address */
diff --git a/arch/arm/mach-at91/include/mach/board.h b/arch/arm/mach-at91/include/mach/board.h
index 49a821192c65..369afc2ffc5b 100644
--- a/arch/arm/mach-at91/include/mach/board.h
+++ b/arch/arm/mach-at91/include/mach/board.h
@@ -121,7 +121,6 @@ extern void __init at91_add_device_spi(struct spi_board_info *devices, int nr_de
121#define ATMEL_UART_RI 0x20 121#define ATMEL_UART_RI 0x20
122 122
123extern void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins); 123extern void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins);
124extern void __init at91_set_serial_console(unsigned portnr);
125 124
126extern struct platform_device *atmel_default_console_device; 125extern struct platform_device *atmel_default_console_device;
127 126
diff --git a/arch/arm/mach-at91/include/mach/cpu.h b/arch/arm/mach-at91/include/mach/cpu.h
index 0118c3338552..73d2fd209ce4 100644
--- a/arch/arm/mach-at91/include/mach/cpu.h
+++ b/arch/arm/mach-at91/include/mach/cpu.h
@@ -54,6 +54,7 @@
54#define ARCH_REVISON_9200_BGA (0 << 0) 54#define ARCH_REVISON_9200_BGA (0 << 0)
55#define ARCH_REVISON_9200_PQFP (1 << 0) 55#define ARCH_REVISON_9200_PQFP (1 << 0)
56 56
57#ifndef __ASSEMBLY__
57enum at91_soc_type { 58enum at91_soc_type {
58 /* 920T */ 59 /* 920T */
59 AT91_SOC_RM9200, 60 AT91_SOC_RM9200,
@@ -106,7 +107,7 @@ static inline int at91_soc_is_detected(void)
106 return at91_soc_initdata.type != AT91_SOC_NONE; 107 return at91_soc_initdata.type != AT91_SOC_NONE;
107} 108}
108 109
109#ifdef CONFIG_ARCH_AT91RM9200 110#ifdef CONFIG_SOC_AT91RM9200
110#define cpu_is_at91rm9200() (at91_soc_initdata.type == AT91_SOC_RM9200) 111#define cpu_is_at91rm9200() (at91_soc_initdata.type == AT91_SOC_RM9200)
111#define cpu_is_at91rm9200_bga() (at91_soc_initdata.subtype == AT91_SOC_RM9200_BGA) 112#define cpu_is_at91rm9200_bga() (at91_soc_initdata.subtype == AT91_SOC_RM9200_BGA)
112#define cpu_is_at91rm9200_pqfp() (at91_soc_initdata.subtype == AT91_SOC_RM9200_PQFP) 113#define cpu_is_at91rm9200_pqfp() (at91_soc_initdata.subtype == AT91_SOC_RM9200_PQFP)
@@ -116,45 +117,37 @@ static inline int at91_soc_is_detected(void)
116#define cpu_is_at91rm9200_pqfp() (0) 117#define cpu_is_at91rm9200_pqfp() (0)
117#endif 118#endif
118 119
119#ifdef CONFIG_ARCH_AT91SAM9260 120#ifdef CONFIG_SOC_AT91SAM9260
120#define cpu_is_at91sam9xe() (at91_soc_initdata.subtype == AT91_SOC_SAM9XE) 121#define cpu_is_at91sam9xe() (at91_soc_initdata.subtype == AT91_SOC_SAM9XE)
121#define cpu_is_at91sam9260() (at91_soc_initdata.type == AT91_SOC_SAM9260) 122#define cpu_is_at91sam9260() (at91_soc_initdata.type == AT91_SOC_SAM9260)
123#define cpu_is_at91sam9g20() (at91_soc_initdata.type == AT91_SOC_SAM9G20)
122#else 124#else
123#define cpu_is_at91sam9xe() (0) 125#define cpu_is_at91sam9xe() (0)
124#define cpu_is_at91sam9260() (0) 126#define cpu_is_at91sam9260() (0)
125#endif
126
127#ifdef CONFIG_ARCH_AT91SAM9G20
128#define cpu_is_at91sam9g20() (at91_soc_initdata.type == AT91_SOC_SAM9G20)
129#else
130#define cpu_is_at91sam9g20() (0) 127#define cpu_is_at91sam9g20() (0)
131#endif 128#endif
132 129
133#ifdef CONFIG_ARCH_AT91SAM9261 130#ifdef CONFIG_SOC_AT91SAM9261
134#define cpu_is_at91sam9261() (at91_soc_initdata.type == AT91_SOC_SAM9261) 131#define cpu_is_at91sam9261() (at91_soc_initdata.type == AT91_SOC_SAM9261)
135#else
136#define cpu_is_at91sam9261() (0)
137#endif
138
139#ifdef CONFIG_ARCH_AT91SAM9G10
140#define cpu_is_at91sam9g10() (at91_soc_initdata.type == AT91_SOC_SAM9G10) 132#define cpu_is_at91sam9g10() (at91_soc_initdata.type == AT91_SOC_SAM9G10)
141#else 133#else
134#define cpu_is_at91sam9261() (0)
142#define cpu_is_at91sam9g10() (0) 135#define cpu_is_at91sam9g10() (0)
143#endif 136#endif
144 137
145#ifdef CONFIG_ARCH_AT91SAM9263 138#ifdef CONFIG_SOC_AT91SAM9263
146#define cpu_is_at91sam9263() (at91_soc_initdata.type == AT91_SOC_SAM9263) 139#define cpu_is_at91sam9263() (at91_soc_initdata.type == AT91_SOC_SAM9263)
147#else 140#else
148#define cpu_is_at91sam9263() (0) 141#define cpu_is_at91sam9263() (0)
149#endif 142#endif
150 143
151#ifdef CONFIG_ARCH_AT91SAM9RL 144#ifdef CONFIG_SOC_AT91SAM9RL
152#define cpu_is_at91sam9rl() (at91_soc_initdata.type == AT91_SOC_SAM9RL) 145#define cpu_is_at91sam9rl() (at91_soc_initdata.type == AT91_SOC_SAM9RL)
153#else 146#else
154#define cpu_is_at91sam9rl() (0) 147#define cpu_is_at91sam9rl() (0)
155#endif 148#endif
156 149
157#ifdef CONFIG_ARCH_AT91SAM9G45 150#ifdef CONFIG_SOC_AT91SAM9G45
158#define cpu_is_at91sam9g45() (at91_soc_initdata.type == AT91_SOC_SAM9G45) 151#define cpu_is_at91sam9g45() (at91_soc_initdata.type == AT91_SOC_SAM9G45)
159#define cpu_is_at91sam9g45es() (at91_soc_initdata.subtype == AT91_SOC_SAM9G45ES) 152#define cpu_is_at91sam9g45es() (at91_soc_initdata.subtype == AT91_SOC_SAM9G45ES)
160#define cpu_is_at91sam9m10() (at91_soc_initdata.subtype == AT91_SOC_SAM9M10) 153#define cpu_is_at91sam9m10() (at91_soc_initdata.subtype == AT91_SOC_SAM9M10)
@@ -168,7 +161,7 @@ static inline int at91_soc_is_detected(void)
168#define cpu_is_at91sam9m11() (0) 161#define cpu_is_at91sam9m11() (0)
169#endif 162#endif
170 163
171#ifdef CONFIG_ARCH_AT91SAM9X5 164#ifdef CONFIG_SOC_AT91SAM9X5
172#define cpu_is_at91sam9x5() (at91_soc_initdata.type == AT91_SOC_SAM9X5) 165#define cpu_is_at91sam9x5() (at91_soc_initdata.type == AT91_SOC_SAM9X5)
173#define cpu_is_at91sam9g15() (at91_soc_initdata.subtype == AT91_SOC_SAM9G15) 166#define cpu_is_at91sam9g15() (at91_soc_initdata.subtype == AT91_SOC_SAM9G15)
174#define cpu_is_at91sam9g35() (at91_soc_initdata.subtype == AT91_SOC_SAM9G35) 167#define cpu_is_at91sam9g35() (at91_soc_initdata.subtype == AT91_SOC_SAM9G35)
@@ -189,5 +182,6 @@ static inline int at91_soc_is_detected(void)
189 * definitions may reduce clutter in common drivers. 182 * definitions may reduce clutter in common drivers.
190 */ 183 */
191#define cpu_is_at32ap7000() (0) 184#define cpu_is_at32ap7000() (0)
185#endif /* __ASSEMBLY__ */
192 186
193#endif /* __MACH_CPU_H__ */ 187#endif /* __MACH_CPU_H__ */
diff --git a/arch/arm/mach-at91/include/mach/hardware.h b/arch/arm/mach-at91/include/mach/hardware.h
index 01db372be8e5..ef5786299c60 100644
--- a/arch/arm/mach-at91/include/mach/hardware.h
+++ b/arch/arm/mach-at91/include/mach/hardware.h
@@ -22,27 +22,17 @@
22/* 9263, 9g45 */ 22/* 9263, 9g45 */
23#define AT91_BASE_DBGU1 0xffffee00 23#define AT91_BASE_DBGU1 0xffffee00
24 24
25#if defined(CONFIG_ARCH_AT91RM9200) 25#if defined(CONFIG_ARCH_AT91X40)
26#include <mach/at91x40.h>
27#else
26#include <mach/at91rm9200.h> 28#include <mach/at91rm9200.h>
27#elif defined(CONFIG_ARCH_AT91SAM9260) || defined(CONFIG_ARCH_AT91SAM9G20)
28#include <mach/at91sam9260.h> 29#include <mach/at91sam9260.h>
29#elif defined(CONFIG_ARCH_AT91SAM9261) || defined(CONFIG_ARCH_AT91SAM9G10)
30#include <mach/at91sam9261.h> 30#include <mach/at91sam9261.h>
31#elif defined(CONFIG_ARCH_AT91SAM9263)
32#include <mach/at91sam9263.h> 31#include <mach/at91sam9263.h>
33#elif defined(CONFIG_ARCH_AT91SAM9RL)
34#include <mach/at91sam9rl.h> 32#include <mach/at91sam9rl.h>
35#elif defined(CONFIG_ARCH_AT91SAM9G45)
36#include <mach/at91sam9g45.h> 33#include <mach/at91sam9g45.h>
37#elif defined(CONFIG_ARCH_AT91SAM9X5)
38#include <mach/at91sam9x5.h> 34#include <mach/at91sam9x5.h>
39#elif defined(CONFIG_ARCH_AT91X40)
40#include <mach/at91x40.h>
41#else
42#error "Unsupported AT91 processor"
43#endif
44 35
45#if !defined(CONFIG_ARCH_AT91X40)
46/* 36/*
47 * On all at91 except rm9200 and x40 have the System Controller starts 37 * On all at91 except rm9200 and x40 have the System Controller starts
48 * at address 0xffffc000 and has a size of 16KiB. 38 * at address 0xffffc000 and has a size of 16KiB.
diff --git a/arch/arm/mach-at91/include/mach/uncompress.h b/arch/arm/mach-at91/include/mach/uncompress.h
index 4218647c1fcd..6f6118d1576a 100644
--- a/arch/arm/mach-at91/include/mach/uncompress.h
+++ b/arch/arm/mach-at91/include/mach/uncompress.h
@@ -1,7 +1,8 @@
1/* 1/*
2 * arch/arm/mach-at91/include/mach/uncompress.h 2 * arch/arm/mach-at91/include/mach/uncompress.h
3 * 3 *
4 * Copyright (C) 2003 SAN People 4 * Copyright (C) 2003 SAN People
5 * Copyright (C) 2012 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
5 * 6 *
6 * This program is free software; you can redistribute it and/or modify 7 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by 8 * it under the terms of the GNU General Public License as published by
@@ -25,22 +26,147 @@
25#include <linux/atmel_serial.h> 26#include <linux/atmel_serial.h>
26#include <mach/hardware.h> 27#include <mach/hardware.h>
27 28
28#if defined(CONFIG_AT91_EARLY_DBGU0) 29#include <mach/at91_dbgu.h>
29#define UART_OFFSET AT91_BASE_DBGU0 30#include <mach/cpu.h>
30#elif defined(CONFIG_AT91_EARLY_DBGU1) 31
31#define UART_OFFSET AT91_BASE_DBGU1 32void __iomem *at91_uart;
32#elif defined(CONFIG_AT91_EARLY_USART0) 33
33#define UART_OFFSET AT91_USART0 34#if !defined(CONFIG_ARCH_AT91X40)
34#elif defined(CONFIG_AT91_EARLY_USART1) 35static const u32 uarts_rm9200[] = {
35#define UART_OFFSET AT91_USART1 36 AT91_BASE_DBGU0,
36#elif defined(CONFIG_AT91_EARLY_USART2) 37 AT91RM9200_BASE_US0,
37#define UART_OFFSET AT91_USART2 38 AT91RM9200_BASE_US1,
38#elif defined(CONFIG_AT91_EARLY_USART3) 39 AT91RM9200_BASE_US2,
39#define UART_OFFSET AT91_USART3 40 AT91RM9200_BASE_US3,
40#elif defined(CONFIG_AT91_EARLY_USART4) 41 0,
41#define UART_OFFSET AT91_USART4 42};
42#elif defined(CONFIG_AT91_EARLY_USART5) 43
43#define UART_OFFSET AT91_USART5 44static const u32 uarts_sam9260[] = {
45 AT91_BASE_DBGU0,
46 AT91SAM9260_BASE_US0,
47 AT91SAM9260_BASE_US1,
48 AT91SAM9260_BASE_US2,
49 AT91SAM9260_BASE_US3,
50 AT91SAM9260_BASE_US4,
51 AT91SAM9260_BASE_US5,
52 0,
53};
54
55static const u32 uarts_sam9261[] = {
56 AT91_BASE_DBGU0,
57 AT91SAM9261_BASE_US0,
58 AT91SAM9261_BASE_US1,
59 AT91SAM9261_BASE_US2,
60 0,
61};
62
63static const u32 uarts_sam9263[] = {
64 AT91_BASE_DBGU1,
65 AT91SAM9263_BASE_US0,
66 AT91SAM9263_BASE_US1,
67 AT91SAM9263_BASE_US2,
68 0,
69};
70
71static const u32 uarts_sam9g45[] = {
72 AT91_BASE_DBGU1,
73 AT91SAM9G45_BASE_US0,
74 AT91SAM9G45_BASE_US1,
75 AT91SAM9G45_BASE_US2,
76 AT91SAM9G45_BASE_US3,
77 0,
78};
79
80static const u32 uarts_sam9rl[] = {
81 AT91_BASE_DBGU0,
82 AT91SAM9RL_BASE_US0,
83 AT91SAM9RL_BASE_US1,
84 AT91SAM9RL_BASE_US2,
85 AT91SAM9RL_BASE_US3,
86 0,
87};
88
89static const u32 uarts_sam9x5[] = {
90 AT91_BASE_DBGU0,
91 AT91SAM9X5_BASE_USART0,
92 AT91SAM9X5_BASE_USART1,
93 AT91SAM9X5_BASE_USART2,
94 0,
95};
96
97static inline const u32* decomp_soc_detect(u32 dbgu_base)
98{
99 u32 cidr, socid;
100
101 cidr = __raw_readl(dbgu_base + AT91_DBGU_CIDR);
102 socid = cidr & ~AT91_CIDR_VERSION;
103
104 switch (socid) {
105 case ARCH_ID_AT91RM9200:
106 return uarts_rm9200;
107
108 case ARCH_ID_AT91SAM9G20:
109 case ARCH_ID_AT91SAM9260:
110 return uarts_sam9260;
111
112 case ARCH_ID_AT91SAM9261:
113 return uarts_sam9261;
114
115 case ARCH_ID_AT91SAM9263:
116 return uarts_sam9263;
117
118 case ARCH_ID_AT91SAM9G45:
119 return uarts_sam9g45;
120
121 case ARCH_ID_AT91SAM9RL64:
122 return uarts_sam9rl;
123
124 case ARCH_ID_AT91SAM9X5:
125 return uarts_sam9x5;
126 }
127
128 /* at91sam9g10 */
129 if ((cidr & ~AT91_CIDR_EXT) == ARCH_ID_AT91SAM9G10) {
130 return uarts_sam9261;
131 }
132 /* at91sam9xe */
133 else if ((cidr & AT91_CIDR_ARCH) == ARCH_FAMILY_AT91SAM9XE) {
134 return uarts_sam9260;
135 }
136
137 return NULL;
138}
139
140static inline void arch_decomp_setup(void)
141{
142 int i = 0;
143 const u32* usarts;
144
145 usarts = decomp_soc_detect(AT91_BASE_DBGU0);
146
147 if (!usarts)
148 usarts = decomp_soc_detect(AT91_BASE_DBGU1);
149 if (!usarts) {
150 at91_uart = NULL;
151 return;
152 }
153
154 do {
155 /* physical address */
156 at91_uart = (void __iomem *)usarts[i];
157
158 if (__raw_readl(at91_uart + ATMEL_US_BRGR))
159 return;
160 i++;
161 } while (usarts[i]);
162
163 at91_uart = NULL;
164}
165#else
166static inline void arch_decomp_setup(void)
167{
168 at91_uart = NULL;
169}
44#endif 170#endif
45 171
46/* 172/*
@@ -52,28 +178,24 @@
52 */ 178 */
53static void putc(int c) 179static void putc(int c)
54{ 180{
55#ifdef UART_OFFSET 181 if (!at91_uart)
56 void __iomem *sys = (void __iomem *) UART_OFFSET; /* physical address */ 182 return;
57 183
58 while (!(__raw_readl(sys + ATMEL_US_CSR) & ATMEL_US_TXRDY)) 184 while (!(__raw_readl(at91_uart + ATMEL_US_CSR) & ATMEL_US_TXRDY))
59 barrier(); 185 barrier();
60 __raw_writel(c, sys + ATMEL_US_THR); 186 __raw_writel(c, at91_uart + ATMEL_US_THR);
61#endif
62} 187}
63 188
64static inline void flush(void) 189static inline void flush(void)
65{ 190{
66#ifdef UART_OFFSET 191 if (!at91_uart)
67 void __iomem *sys = (void __iomem *) UART_OFFSET; /* physical address */ 192 return;
68 193
69 /* wait for transmission to complete */ 194 /* wait for transmission to complete */
70 while (!(__raw_readl(sys + ATMEL_US_CSR) & ATMEL_US_TXEMPTY)) 195 while (!(__raw_readl(at91_uart + ATMEL_US_CSR) & ATMEL_US_TXEMPTY))
71 barrier(); 196 barrier();
72#endif
73} 197}
74 198
75#define arch_decomp_setup()
76
77#define arch_decomp_wdog() 199#define arch_decomp_wdog()
78 200
79#endif 201#endif