diff options
author | Nicolas Ferre <nicolas.ferre@atmel.com> | 2014-09-15 12:15:55 -0400 |
---|---|---|
committer | Nicolas Ferre <nicolas.ferre@atmel.com> | 2014-09-22 05:39:06 -0400 |
commit | 726d32bf79ef4042004535c9af9c8ea543abe46f (patch) | |
tree | ca28c5477eb81a6b595f5574c7789c7fddee9cce /arch/arm/mach-at91/include/mach/uncompress.h | |
parent | 2dc850b62e5b727a5413b60197cdddf92ab4f1a2 (diff) |
ARM: at91: SAMA5D4 SoC detection code and low level routines
SoC identification code, kernel uncompress and low level
debugging routines update.
On SAMA5D4, DBGU is at another address AT91_BASE_DBGU2 so another
round of detection is needed. We also had to differentiate with
SAMA5D3 SoC family and rename some variables.
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Acked-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Diffstat (limited to 'arch/arm/mach-at91/include/mach/uncompress.h')
-rw-r--r-- | arch/arm/mach-at91/include/mach/uncompress.h | 21 |
1 files changed, 17 insertions, 4 deletions
diff --git a/arch/arm/mach-at91/include/mach/uncompress.h b/arch/arm/mach-at91/include/mach/uncompress.h index 4bb644f8e87c..acb2d890ad7e 100644 --- a/arch/arm/mach-at91/include/mach/uncompress.h +++ b/arch/arm/mach-at91/include/mach/uncompress.h | |||
@@ -94,7 +94,7 @@ static const u32 uarts_sam9x5[] = { | |||
94 | 0, | 94 | 0, |
95 | }; | 95 | }; |
96 | 96 | ||
97 | static const u32 uarts_sama5[] = { | 97 | static const u32 uarts_sama5d3[] = { |
98 | AT91_BASE_DBGU1, | 98 | AT91_BASE_DBGU1, |
99 | SAMA5D3_BASE_USART0, | 99 | SAMA5D3_BASE_USART0, |
100 | SAMA5D3_BASE_USART1, | 100 | SAMA5D3_BASE_USART1, |
@@ -103,6 +103,12 @@ static const u32 uarts_sama5[] = { | |||
103 | 0, | 103 | 0, |
104 | }; | 104 | }; |
105 | 105 | ||
106 | static const u32 uarts_sama5d4[] = { | ||
107 | AT91_BASE_DBGU2, | ||
108 | SAMA5D4_BASE_USART3, | ||
109 | 0, | ||
110 | }; | ||
111 | |||
106 | static inline const u32* decomp_soc_detect(void __iomem *dbgu_base) | 112 | static inline const u32* decomp_soc_detect(void __iomem *dbgu_base) |
107 | { | 113 | { |
108 | u32 cidr, socid; | 114 | u32 cidr, socid; |
@@ -134,8 +140,14 @@ static inline const u32* decomp_soc_detect(void __iomem *dbgu_base) | |||
134 | case ARCH_ID_AT91SAM9X5: | 140 | case ARCH_ID_AT91SAM9X5: |
135 | return uarts_sam9x5; | 141 | return uarts_sam9x5; |
136 | 142 | ||
137 | case ARCH_ID_SAMA5D3: | 143 | case ARCH_ID_SAMA5: |
138 | return uarts_sama5; | 144 | cidr = __raw_readl(dbgu_base + AT91_DBGU_EXID); |
145 | if (cidr & ARCH_EXID_SAMA5D3) | ||
146 | return uarts_sama5d3; | ||
147 | else if (cidr & ARCH_EXID_SAMA5D4) | ||
148 | return uarts_sama5d4; | ||
149 | |||
150 | break; | ||
139 | } | 151 | } |
140 | 152 | ||
141 | /* at91sam9g10 */ | 153 | /* at91sam9g10 */ |
@@ -156,9 +168,10 @@ static inline void arch_decomp_setup(void) | |||
156 | const u32* usarts; | 168 | const u32* usarts; |
157 | 169 | ||
158 | usarts = decomp_soc_detect((void __iomem *)AT91_BASE_DBGU0); | 170 | usarts = decomp_soc_detect((void __iomem *)AT91_BASE_DBGU0); |
159 | |||
160 | if (!usarts) | 171 | if (!usarts) |
161 | usarts = decomp_soc_detect((void __iomem *)AT91_BASE_DBGU1); | 172 | usarts = decomp_soc_detect((void __iomem *)AT91_BASE_DBGU1); |
173 | if (!usarts) | ||
174 | usarts = decomp_soc_detect((void __iomem *)AT91_BASE_DBGU2); | ||
162 | if (!usarts) { | 175 | if (!usarts) { |
163 | at91_uart = NULL; | 176 | at91_uart = NULL; |
164 | return; | 177 | return; |