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authorArnd Bergmann <arnd@arndb.de>2012-02-27 12:22:36 -0500
committerArnd Bergmann <arnd@arndb.de>2012-02-29 07:03:08 -0500
commit7eca30aef7961e68ad74c0ef920546c2be7f6579 (patch)
treed7161459a86134bee58b8a0980a15b66839467aa /arch/arm/mach-at91/include/mach/at91x40.h
parentd65b4e98d7ea3038b767b70fe8be959b2913f16d (diff)
parentd5e5a7f987458f42f24a557a0f4e35f94c43fc09 (diff)
Merge branch 'at91-3.4-base2+cleanup' of git://github.com/at91linux/linux-at91 into at91/staging/base2+cleanup
* 'at91-3.4-base2+cleanup' of git://github.com/at91linux/linux-at91: (20 commits) ARM: at91: properly sort dtb files in Makefile.boot ARM: at91: add at91sam9g25ek.dts in Makefile.boot ARM: at91/board-dt: drop default console Atmel: move console default platform_device to serial driver ARM: at91: merge SRAM Memory banks thanks to mirroring ARM: at91: finally drop at91_sys_read/write ARM: at91/rtc-at91sam9: pass the GPBR to use via resources ARM: at91:rtc/rtc-at91sam9: ioremap register bank ARM: at91/rtc-at91sam9: each SoC can select the RTT device to use ARM: at91/PMC: make register base soc independent ARM: at91/PMC: move assignment out of printf ARM: at91/pm_slowclock: add runtime detection of memory contoller ARM: at91: make sdram/ddr register base soc independent ARM: at91: move at91rm9200 sdramc defines to at91rm9200_sdramc.h ARM: at91/pm_slowclock: function slow_clock() accepts parameters ARM: at91/pm_slowclock: rename register to named define ARM: at91/ST: remove not needed casts ARM: at91: make ST (System Timer) soc independent ARM: at91: make matrix register base soc independent ARM: at91/at91x40: remove use of at91_sys_read/write Based on top of the at91/9x5, rmk/for-armsoc, at91/device-board, at91/pm_cleanup and at91/base. Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'arch/arm/mach-at91/include/mach/at91x40.h')
-rw-r--r--arch/arm/mach-at91/include/mach/at91x40.h18
1 files changed, 9 insertions, 9 deletions
diff --git a/arch/arm/mach-at91/include/mach/at91x40.h b/arch/arm/mach-at91/include/mach/at91x40.h
index a57829f4fd18..90680217064e 100644
--- a/arch/arm/mach-at91/include/mach/at91x40.h
+++ b/arch/arm/mach-at91/include/mach/at91x40.h
@@ -28,18 +28,18 @@
28#define AT91X40_ID_IRQ2 18 /* External IRQ 2 */ 28#define AT91X40_ID_IRQ2 18 /* External IRQ 2 */
29 29
30/* 30/*
31 * System Peripherals (offset from AT91_BASE_SYS) 31 * System Peripherals
32 */ 32 */
33#define AT91_BASE_SYS 0xffc00000 33#define AT91_BASE_SYS 0xffc00000
34 34
35#define AT91_EBI (0xffe00000 - AT91_BASE_SYS) /* External Bus Interface */ 35#define AT91_EBI 0xffe00000 /* External Bus Interface */
36#define AT91_SF (0xfff00000 - AT91_BASE_SYS) /* Special Function */ 36#define AT91_SF 0xfff00000 /* Special Function */
37#define AT91_USART1 (0xfffcc000 - AT91_BASE_SYS) /* USART 1 */ 37#define AT91_USART1 0xfffcc000 /* USART 1 */
38#define AT91_USART0 (0xfffd0000 - AT91_BASE_SYS) /* USART 0 */ 38#define AT91_USART0 0xfffd0000 /* USART 0 */
39#define AT91_TC (0xfffe0000 - AT91_BASE_SYS) /* Timer Counter */ 39#define AT91_TC 0xfffe0000 /* Timer Counter */
40#define AT91_PIOA (0xffff0000 - AT91_BASE_SYS) /* PIO Controller A */ 40#define AT91_PIOA 0xffff0000 /* PIO Controller A */
41#define AT91_PS (0xffff4000 - AT91_BASE_SYS) /* Power Save */ 41#define AT91_PS 0xffff4000 /* Power Save */
42#define AT91_WD (0xffff8000 - AT91_BASE_SYS) /* Watchdog Timer */ 42#define AT91_WD 0xffff8000 /* Watchdog Timer */
43 43
44/* 44/*
45 * The AT91x40 series doesn't have a debug unit like the other AT91 parts. 45 * The AT91x40 series doesn't have a debug unit like the other AT91 parts.