diff options
| author | Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> | 2011-10-31 13:23:20 -0400 |
|---|---|---|
| committer | Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> | 2011-11-28 09:50:38 -0500 |
| commit | f22deee523e0ff49c3be01dd6f979d374230725a (patch) | |
| tree | e8ef85e51335de930cba58e5d7fb90625590002b /arch/arm/mach-at91/include/mach/at91sam9260.h | |
| parent | f466f3bc92eb6857181bb033d14b1e9b1dd52140 (diff) | |
ARM: at91: make shutdown controler soc independent
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Diffstat (limited to 'arch/arm/mach-at91/include/mach/at91sam9260.h')
| -rw-r--r-- | arch/arm/mach-at91/include/mach/at91sam9260.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/mach-at91/include/mach/at91sam9260.h b/arch/arm/mach-at91/include/mach/at91sam9260.h index f964cfaca379..e3c819ab3435 100644 --- a/arch/arm/mach-at91/include/mach/at91sam9260.h +++ b/arch/arm/mach-at91/include/mach/at91sam9260.h | |||
| @@ -86,7 +86,6 @@ | |||
| 86 | #define AT91_DBGU (0xfffff200 - AT91_BASE_SYS) | 86 | #define AT91_DBGU (0xfffff200 - AT91_BASE_SYS) |
| 87 | #define AT91_PMC (0xfffffc00 - AT91_BASE_SYS) | 87 | #define AT91_PMC (0xfffffc00 - AT91_BASE_SYS) |
| 88 | #define AT91_RSTC (0xfffffd00 - AT91_BASE_SYS) | 88 | #define AT91_RSTC (0xfffffd00 - AT91_BASE_SYS) |
| 89 | #define AT91_SHDWC (0xfffffd10 - AT91_BASE_SYS) | ||
| 90 | #define AT91_WDT (0xfffffd40 - AT91_BASE_SYS) | 89 | #define AT91_WDT (0xfffffd40 - AT91_BASE_SYS) |
| 91 | #define AT91_GPBR (0xfffffd50 - AT91_BASE_SYS) | 90 | #define AT91_GPBR (0xfffffd50 - AT91_BASE_SYS) |
| 92 | 91 | ||
| @@ -95,6 +94,7 @@ | |||
| 95 | #define AT91SAM9260_BASE_PIOA 0xfffff400 | 94 | #define AT91SAM9260_BASE_PIOA 0xfffff400 |
| 96 | #define AT91SAM9260_BASE_PIOB 0xfffff600 | 95 | #define AT91SAM9260_BASE_PIOB 0xfffff600 |
| 97 | #define AT91SAM9260_BASE_PIOC 0xfffff800 | 96 | #define AT91SAM9260_BASE_PIOC 0xfffff800 |
| 97 | #define AT91SAM9260_BASE_SHDWC 0xfffffd10 | ||
| 98 | #define AT91SAM9260_BASE_RTT 0xfffffd20 | 98 | #define AT91SAM9260_BASE_RTT 0xfffffd20 |
| 99 | #define AT91SAM9260_BASE_PIT 0xfffffd30 | 99 | #define AT91SAM9260_BASE_PIT 0xfffffd30 |
| 100 | 100 | ||