aboutsummaryrefslogtreecommitdiffstats
path: root/arch/arm/lib
diff options
context:
space:
mode:
authorLinus Torvalds <torvalds@g5.osdl.org>2006-06-26 18:01:05 -0400
committerLinus Torvalds <torvalds@g5.osdl.org>2006-06-26 18:01:05 -0400
commitf6e6e883730aff2718610d3eba7608fcf73328ed (patch)
treeec595db5e2454ac5f505a2ce971e45d674f8d6b3 /arch/arm/lib
parentba262e4a4d4c23b5e6c15dbb3a99696b562e8035 (diff)
parentf964c303fe33b0d2ee563349bc8bea4d57d7a265 (diff)
Merge master.kernel.org:/home/rmk/linux-2.6-arm
* master.kernel.org:/home/rmk/linux-2.6-arm: [ARM] 3657/1: S3C24XX: Documentation update of Overview.txt [ARM] Update mach-types [ARM] 3656/1: S3C2412: Add S3C2412 and S3C2413 documenation [ARM] 3654/1: add ajeco 1arm sbc support [ARM] fix drivers/mfd/ucb1x00-core.c IRQ probing bug [ARM] 3651/1: S3C24XX: Make arch list more detailed [ARM] 3650/1: S3C2412: Update s3c2410_defconfig [ARM] 3649/1: S3C24XX: Fix capitalisation of CPU on SMDK2440 [ARM] 3612/1: make pci bus optional for ixp4xx platform [ARM] Remove MODE_(SVC|IRQ|FIQ|USR) and DEFAULT_FIQ [ARM] Remove save_lr/restore_pc macros [ARM] Remove partial non-v6 binutils compatibility [ARM] Remove LOADREGS macro [ARM] Remove RETINSTR macro
Diffstat (limited to 'arch/arm/lib')
-rw-r--r--arch/arm/lib/backtrace.S8
-rw-r--r--arch/arm/lib/clear_user.S4
-rw-r--r--arch/arm/lib/copy_page.S2
-rw-r--r--arch/arm/lib/csumipv6.S2
-rw-r--r--arch/arm/lib/delay.S18
-rw-r--r--arch/arm/lib/ecard.S4
-rw-r--r--arch/arm/lib/findbit.S10
-rw-r--r--arch/arm/lib/io-readsb.S6
-rw-r--r--arch/arm/lib/io-readsw-armv3.S6
-rw-r--r--arch/arm/lib/io-writesb.S6
-rw-r--r--arch/arm/lib/io-writesw-armv3.S6
-rw-r--r--arch/arm/lib/memchr.S2
-rw-r--r--arch/arm/lib/memset.S4
-rw-r--r--arch/arm/lib/memzero.S4
-rw-r--r--arch/arm/lib/strchr.S2
-rw-r--r--arch/arm/lib/strncpy_from_user.S5
-rw-r--r--arch/arm/lib/strnlen_user.S5
-rw-r--r--arch/arm/lib/strrchr.S2
-rw-r--r--arch/arm/lib/uaccess.S8
19 files changed, 51 insertions, 53 deletions
diff --git a/arch/arm/lib/backtrace.S b/arch/arm/lib/backtrace.S
index 16153c86c3f8..058b80d72aa1 100644
--- a/arch/arm/lib/backtrace.S
+++ b/arch/arm/lib/backtrace.S
@@ -41,7 +41,7 @@ ENTRY(c_backtrace)
41 movne r0, #0 41 movne r0, #0
42 movs frame, r0 42 movs frame, r0
431: moveq r0, #-2 431: moveq r0, #-2
44 LOADREGS(eqfd, sp!, {r4 - r8, pc}) 44 ldmeqfd sp!, {r4 - r8, pc}
45 45
462: stmfd sp!, {pc} @ calculate offset of PC in STMIA instruction 462: stmfd sp!, {pc} @ calculate offset of PC in STMIA instruction
47 ldr r0, [sp], #4 47 ldr r0, [sp], #4
@@ -85,7 +85,7 @@ ENTRY(c_backtrace)
85 * A zero next framepointer means we're done. 85 * A zero next framepointer means we're done.
86 */ 86 */
87 teq next, #0 87 teq next, #0
88 LOADREGS(eqfd, sp!, {r4 - r8, pc}) 88 ldmeqfd sp!, {r4 - r8, pc}
89 89
90 /* 90 /*
91 * The next framepointer must be above the 91 * The next framepointer must be above the
@@ -104,7 +104,7 @@ ENTRY(c_backtrace)
1041007: ldr r0, =.Lbad 1041007: ldr r0, =.Lbad
105 mov r1, frame 105 mov r1, frame
106 bl printk 106 bl printk
107 LOADREGS(fd, sp!, {r4 - r8, pc}) 107 ldmfd sp!, {r4 - r8, pc}
108 .ltorg 108 .ltorg
109 .previous 109 .previous
110 110
@@ -145,7 +145,7 @@ ENTRY(c_backtrace)
145 adrne r0, .Lcr 145 adrne r0, .Lcr
146 blne printk 146 blne printk
147 mov r0, stack 147 mov r0, stack
148 LOADREGS(fd, sp!, {instr, reg, stack, r7, r8, pc}) 148 ldmfd sp!, {instr, reg, stack, r7, r8, pc}
149 149
150.Lfp: .asciz " r%d = %08X%c" 150.Lfp: .asciz " r%d = %08X%c"
151.Lcr: .asciz "\n" 151.Lcr: .asciz "\n"
diff --git a/arch/arm/lib/clear_user.S b/arch/arm/lib/clear_user.S
index 7ff9f831b3f9..ea435ae2e4a5 100644
--- a/arch/arm/lib/clear_user.S
+++ b/arch/arm/lib/clear_user.S
@@ -43,10 +43,10 @@ USER( strnebt r2, [r0], #1)
43 tst r1, #1 @ x1 x0 x1 x0 x1 x0 x1 43 tst r1, #1 @ x1 x0 x1 x0 x1 x0 x1
44USER( strnebt r2, [r0], #1) 44USER( strnebt r2, [r0], #1)
45 mov r0, #0 45 mov r0, #0
46 LOADREGS(fd,sp!, {r1, pc}) 46 ldmfd sp!, {r1, pc}
47 47
48 .section .fixup,"ax" 48 .section .fixup,"ax"
49 .align 0 49 .align 0
509001: LOADREGS(fd,sp!, {r0, pc}) 509001: ldmfd sp!, {r0, pc}
51 .previous 51 .previous
52 52
diff --git a/arch/arm/lib/copy_page.S b/arch/arm/lib/copy_page.S
index 68117968482b..666c99cc0744 100644
--- a/arch/arm/lib/copy_page.S
+++ b/arch/arm/lib/copy_page.S
@@ -43,4 +43,4 @@ ENTRY(copy_page)
43 bgt 1b @ 1 43 bgt 1b @ 1
44 PLD( ldmeqia r1!, {r3, r4, ip, lr} ) 44 PLD( ldmeqia r1!, {r3, r4, ip, lr} )
45 PLD( beq 2b ) 45 PLD( beq 2b )
46 LOADREGS(fd, sp!, {r4, pc}) @ 3 46 ldmfd sp!, {r4, pc} @ 3
diff --git a/arch/arm/lib/csumipv6.S b/arch/arm/lib/csumipv6.S
index 7065a20ee8ad..9621469beec1 100644
--- a/arch/arm/lib/csumipv6.S
+++ b/arch/arm/lib/csumipv6.S
@@ -28,5 +28,5 @@ ENTRY(__csum_ipv6_magic)
28 adcs r0, r0, r3 28 adcs r0, r0, r3
29 adcs r0, r0, r2 29 adcs r0, r0, r2
30 adcs r0, r0, #0 30 adcs r0, r0, #0
31 LOADREGS(fd, sp!, {pc}) 31 ldmfd sp!, {pc}
32 32
diff --git a/arch/arm/lib/delay.S b/arch/arm/lib/delay.S
index 9183b06c0e2f..930a70259220 100644
--- a/arch/arm/lib/delay.S
+++ b/arch/arm/lib/delay.S
@@ -31,7 +31,7 @@ ENTRY(__const_udelay) @ 0 <= r0 <= 0x7fffff06
31 mov r2, r2, lsr #10 @ max = 0x00007fff 31 mov r2, r2, lsr #10 @ max = 0x00007fff
32 mul r0, r2, r0 @ max = 2^32-1 32 mul r0, r2, r0 @ max = 2^32-1
33 movs r0, r0, lsr #6 33 movs r0, r0, lsr #6
34 RETINSTR(moveq,pc,lr) 34 moveq pc, lr
35 35
36/* 36/*
37 * loops = r0 * HZ * loops_per_jiffy / 1000000 37 * loops = r0 * HZ * loops_per_jiffy / 1000000
@@ -43,20 +43,20 @@ ENTRY(__const_udelay) @ 0 <= r0 <= 0x7fffff06
43ENTRY(__delay) 43ENTRY(__delay)
44 subs r0, r0, #1 44 subs r0, r0, #1
45#if 0 45#if 0
46 RETINSTR(movls,pc,lr) 46 movls pc, lr
47 subs r0, r0, #1 47 subs r0, r0, #1
48 RETINSTR(movls,pc,lr) 48 movls pc, lr
49 subs r0, r0, #1 49 subs r0, r0, #1
50 RETINSTR(movls,pc,lr) 50 movls pc, lr
51 subs r0, r0, #1 51 subs r0, r0, #1
52 RETINSTR(movls,pc,lr) 52 movls pc, lr
53 subs r0, r0, #1 53 subs r0, r0, #1
54 RETINSTR(movls,pc,lr) 54 movls pc, lr
55 subs r0, r0, #1 55 subs r0, r0, #1
56 RETINSTR(movls,pc,lr) 56 movls pc, lr
57 subs r0, r0, #1 57 subs r0, r0, #1
58 RETINSTR(movls,pc,lr) 58 movls pc, lr
59 subs r0, r0, #1 59 subs r0, r0, #1
60#endif 60#endif
61 bhi __delay 61 bhi __delay
62 RETINSTR(mov,pc,lr) 62 mov pc, lr
diff --git a/arch/arm/lib/ecard.S b/arch/arm/lib/ecard.S
index fb7b602a6f76..c55aaa2a2088 100644
--- a/arch/arm/lib/ecard.S
+++ b/arch/arm/lib/ecard.S
@@ -29,7 +29,7 @@ ENTRY(ecard_loader_read)
29 CPSR2SPSR(r0) 29 CPSR2SPSR(r0)
30 mov lr, pc 30 mov lr, pc
31 mov pc, r2 31 mov pc, r2
32 LOADREGS(fd, sp!, {r4 - r12, pc}) 32 ldmfd sp!, {r4 - r12, pc}
33 33
34@ Purpose: call an expansion card loader to reset the card 34@ Purpose: call an expansion card loader to reset the card
35@ Proto : void read_loader(int card_base, char *loader); 35@ Proto : void read_loader(int card_base, char *loader);
@@ -41,5 +41,5 @@ ENTRY(ecard_loader_reset)
41 CPSR2SPSR(r0) 41 CPSR2SPSR(r0)
42 mov lr, pc 42 mov lr, pc
43 add pc, r1, #8 43 add pc, r1, #8
44 LOADREGS(fd, sp!, {r4 - r12, pc}) 44 ldmfd sp!, {r4 - r12, pc}
45 45
diff --git a/arch/arm/lib/findbit.S b/arch/arm/lib/findbit.S
index 6f8e27a58c78..a5ca0248aa4e 100644
--- a/arch/arm/lib/findbit.S
+++ b/arch/arm/lib/findbit.S
@@ -32,7 +32,7 @@ ENTRY(_find_first_zero_bit_le)
322: cmp r2, r1 @ any more? 322: cmp r2, r1 @ any more?
33 blo 1b 33 blo 1b
343: mov r0, r1 @ no free bits 343: mov r0, r1 @ no free bits
35 RETINSTR(mov,pc,lr) 35 mov pc, lr
36 36
37/* 37/*
38 * Purpose : Find next 'zero' bit 38 * Purpose : Find next 'zero' bit
@@ -66,7 +66,7 @@ ENTRY(_find_first_bit_le)
662: cmp r2, r1 @ any more? 662: cmp r2, r1 @ any more?
67 blo 1b 67 blo 1b
683: mov r0, r1 @ no free bits 683: mov r0, r1 @ no free bits
69 RETINSTR(mov,pc,lr) 69 mov pc, lr
70 70
71/* 71/*
72 * Purpose : Find next 'one' bit 72 * Purpose : Find next 'one' bit
@@ -98,7 +98,7 @@ ENTRY(_find_first_zero_bit_be)
982: cmp r2, r1 @ any more? 982: cmp r2, r1 @ any more?
99 blo 1b 99 blo 1b
1003: mov r0, r1 @ no free bits 1003: mov r0, r1 @ no free bits
101 RETINSTR(mov,pc,lr) 101 mov pc, lr
102 102
103ENTRY(_find_next_zero_bit_be) 103ENTRY(_find_next_zero_bit_be)
104 teq r1, #0 104 teq r1, #0
@@ -126,7 +126,7 @@ ENTRY(_find_first_bit_be)
1262: cmp r2, r1 @ any more? 1262: cmp r2, r1 @ any more?
127 blo 1b 127 blo 1b
1283: mov r0, r1 @ no free bits 1283: mov r0, r1 @ no free bits
129 RETINSTR(mov,pc,lr) 129 mov pc, lr
130 130
131ENTRY(_find_next_bit_be) 131ENTRY(_find_next_bit_be)
132 teq r1, #0 132 teq r1, #0
@@ -164,5 +164,5 @@ ENTRY(_find_next_bit_be)
164 addeq r2, r2, #1 164 addeq r2, r2, #1
165 mov r0, r2 165 mov r0, r2
166#endif 166#endif
167 RETINSTR(mov,pc,lr) 167 mov pc, lr
168 168
diff --git a/arch/arm/lib/io-readsb.S b/arch/arm/lib/io-readsb.S
index d3d8de71a2c8..fb966ad0276f 100644
--- a/arch/arm/lib/io-readsb.S
+++ b/arch/arm/lib/io-readsb.S
@@ -72,7 +72,7 @@ ENTRY(__raw_readsb)
72 bpl .Linsb_16_lp 72 bpl .Linsb_16_lp
73 73
74 tst r2, #15 74 tst r2, #15
75 LOADREGS(eqfd, sp!, {r4 - r6, pc}) 75 ldmeqfd sp!, {r4 - r6, pc}
76 76
77.Linsb_no_16: tst r2, #8 77.Linsb_no_16: tst r2, #8
78 beq .Linsb_no_8 78 beq .Linsb_no_8
@@ -109,7 +109,7 @@ ENTRY(__raw_readsb)
109 str r3, [r1], #4 109 str r3, [r1], #4
110 110
111.Linsb_no_4: ands r2, r2, #3 111.Linsb_no_4: ands r2, r2, #3
112 LOADREGS(eqfd, sp!, {r4 - r6, pc}) 112 ldmeqfd sp!, {r4 - r6, pc}
113 113
114 cmp r2, #2 114 cmp r2, #2
115 ldrb r3, [r0] 115 ldrb r3, [r0]
@@ -119,4 +119,4 @@ ENTRY(__raw_readsb)
119 ldrgtb r3, [r0] 119 ldrgtb r3, [r0]
120 strgtb r3, [r1] 120 strgtb r3, [r1]
121 121
122 LOADREGS(fd, sp!, {r4 - r6, pc}) 122 ldmfd sp!, {r4 - r6, pc}
diff --git a/arch/arm/lib/io-readsw-armv3.S b/arch/arm/lib/io-readsw-armv3.S
index 146d47c15455..4ef904185142 100644
--- a/arch/arm/lib/io-readsw-armv3.S
+++ b/arch/arm/lib/io-readsw-armv3.S
@@ -28,7 +28,7 @@
28 strb r3, [r1], #1 28 strb r3, [r1], #1
29 29
30 subs r2, r2, #1 30 subs r2, r2, #1
31 RETINSTR(moveq, pc, lr) 31 moveq pc, lr
32 32
33ENTRY(__raw_readsw) 33ENTRY(__raw_readsw)
34 teq r2, #0 @ do we have to check for the zero len? 34 teq r2, #0 @ do we have to check for the zero len?
@@ -69,7 +69,7 @@ ENTRY(__raw_readsw)
69 bpl .Linsw_8_lp 69 bpl .Linsw_8_lp
70 70
71 tst r2, #7 71 tst r2, #7
72 LOADREGS(eqfd, sp!, {r4, r5, r6, pc}) 72 ldmeqfd sp!, {r4, r5, r6, pc}
73 73
74.Lno_insw_8: tst r2, #4 74.Lno_insw_8: tst r2, #4
75 beq .Lno_insw_4 75 beq .Lno_insw_4
@@ -102,6 +102,6 @@ ENTRY(__raw_readsw)
102 movne r3, r3, lsr #8 102 movne r3, r3, lsr #8
103 strneb r3, [r1] 103 strneb r3, [r1]
104 104
105 LOADREGS(fd, sp!, {r4, r5, r6, pc}) 105 ldmfd sp!, {r4, r5, r6, pc}
106 106
107 107
diff --git a/arch/arm/lib/io-writesb.S b/arch/arm/lib/io-writesb.S
index 08209fc640ea..7eba2b6cc69f 100644
--- a/arch/arm/lib/io-writesb.S
+++ b/arch/arm/lib/io-writesb.S
@@ -64,7 +64,7 @@ ENTRY(__raw_writesb)
64 bpl .Loutsb_16_lp 64 bpl .Loutsb_16_lp
65 65
66 tst r2, #15 66 tst r2, #15
67 LOADREGS(eqfd, sp!, {r4, r5, pc}) 67 ldmeqfd sp!, {r4, r5, pc}
68 68
69.Loutsb_no_16: tst r2, #8 69.Loutsb_no_16: tst r2, #8
70 beq .Loutsb_no_8 70 beq .Loutsb_no_8
@@ -80,7 +80,7 @@ ENTRY(__raw_writesb)
80 outword r3 80 outword r3
81 81
82.Loutsb_no_4: ands r2, r2, #3 82.Loutsb_no_4: ands r2, r2, #3
83 LOADREGS(eqfd, sp!, {r4, r5, pc}) 83 ldmeqfd sp!, {r4, r5, pc}
84 84
85 cmp r2, #2 85 cmp r2, #2
86 ldrb r3, [r1], #1 86 ldrb r3, [r1], #1
@@ -90,4 +90,4 @@ ENTRY(__raw_writesb)
90 ldrgtb r3, [r1] 90 ldrgtb r3, [r1]
91 strgtb r3, [r0] 91 strgtb r3, [r0]
92 92
93 LOADREGS(fd, sp!, {r4, r5, pc}) 93 ldmfd sp!, {r4, r5, pc}
diff --git a/arch/arm/lib/io-writesw-armv3.S b/arch/arm/lib/io-writesw-armv3.S
index 52d62b481295..1607a29f49b7 100644
--- a/arch/arm/lib/io-writesw-armv3.S
+++ b/arch/arm/lib/io-writesw-armv3.S
@@ -29,7 +29,7 @@
29 orr r3, r3, r3, lsl #16 29 orr r3, r3, r3, lsl #16
30 str r3, [r0] 30 str r3, [r0]
31 subs r2, r2, #1 31 subs r2, r2, #1
32 RETINSTR(moveq, pc, lr) 32 moveq pc, lr
33 33
34ENTRY(__raw_writesw) 34ENTRY(__raw_writesw)
35 teq r2, #0 @ do we have to check for the zero len? 35 teq r2, #0 @ do we have to check for the zero len?
@@ -80,7 +80,7 @@ ENTRY(__raw_writesw)
80 bpl .Loutsw_8_lp 80 bpl .Loutsw_8_lp
81 81
82 tst r2, #7 82 tst r2, #7
83 LOADREGS(eqfd, sp!, {r4, r5, r6, pc}) 83 ldmeqfd sp!, {r4, r5, r6, pc}
84 84
85.Lno_outsw_8: tst r2, #4 85.Lno_outsw_8: tst r2, #4
86 beq .Lno_outsw_4 86 beq .Lno_outsw_4
@@ -124,4 +124,4 @@ ENTRY(__raw_writesw)
124 orrne ip, ip, ip, lsr #16 124 orrne ip, ip, ip, lsr #16
125 strne ip, [r0] 125 strne ip, [r0]
126 126
127 LOADREGS(fd, sp!, {r4, r5, r6, pc}) 127 ldmfd sp!, {r4, r5, r6, pc}
diff --git a/arch/arm/lib/memchr.S b/arch/arm/lib/memchr.S
index ac34fe55d21a..e7ab1ea8ebaa 100644
--- a/arch/arm/lib/memchr.S
+++ b/arch/arm/lib/memchr.S
@@ -22,4 +22,4 @@ ENTRY(memchr)
22 bne 1b 22 bne 1b
23 sub r0, r0, #1 23 sub r0, r0, #1
242: movne r0, #0 242: movne r0, #0
25 RETINSTR(mov,pc,lr) 25 mov pc, lr
diff --git a/arch/arm/lib/memset.S b/arch/arm/lib/memset.S
index a1795f599937..95b110b07a89 100644
--- a/arch/arm/lib/memset.S
+++ b/arch/arm/lib/memset.S
@@ -53,7 +53,7 @@ ENTRY(memset)
53 stmgeia r0!, {r1, r3, ip, lr} 53 stmgeia r0!, {r1, r3, ip, lr}
54 stmgeia r0!, {r1, r3, ip, lr} 54 stmgeia r0!, {r1, r3, ip, lr}
55 bgt 2b 55 bgt 2b
56 LOADREGS(eqfd, sp!, {pc}) @ Now <64 bytes to go. 56 ldmeqfd sp!, {pc} @ Now <64 bytes to go.
57/* 57/*
58 * No need to correct the count; we're only testing bits from now on 58 * No need to correct the count; we're only testing bits from now on
59 */ 59 */
@@ -77,4 +77,4 @@ ENTRY(memset)
77 strneb r1, [r0], #1 77 strneb r1, [r0], #1
78 tst r2, #1 78 tst r2, #1
79 strneb r1, [r0], #1 79 strneb r1, [r0], #1
80 RETINSTR(mov,pc,lr) 80 mov pc, lr
diff --git a/arch/arm/lib/memzero.S b/arch/arm/lib/memzero.S
index 51ccc60160fd..abf2508e8221 100644
--- a/arch/arm/lib/memzero.S
+++ b/arch/arm/lib/memzero.S
@@ -53,7 +53,7 @@ ENTRY(__memzero)
53 stmgeia r0!, {r2, r3, ip, lr} @ 4 53 stmgeia r0!, {r2, r3, ip, lr} @ 4
54 stmgeia r0!, {r2, r3, ip, lr} @ 4 54 stmgeia r0!, {r2, r3, ip, lr} @ 4
55 bgt 3b @ 1 55 bgt 3b @ 1
56 LOADREGS(eqfd, sp!, {pc}) @ 1/2 quick exit 56 ldmeqfd sp!, {pc} @ 1/2 quick exit
57/* 57/*
58 * No need to correct the count; we're only testing bits from now on 58 * No need to correct the count; we're only testing bits from now on
59 */ 59 */
@@ -77,4 +77,4 @@ ENTRY(__memzero)
77 strneb r2, [r0], #1 @ 1 77 strneb r2, [r0], #1 @ 1
78 tst r1, #1 @ 1 a byte left over 78 tst r1, #1 @ 1 a byte left over
79 strneb r2, [r0], #1 @ 1 79 strneb r2, [r0], #1 @ 1
80 RETINSTR(mov,pc,lr) @ 1 80 mov pc, lr @ 1
diff --git a/arch/arm/lib/strchr.S b/arch/arm/lib/strchr.S
index 5b9b493733fc..9f18d6fdee6a 100644
--- a/arch/arm/lib/strchr.S
+++ b/arch/arm/lib/strchr.S
@@ -23,4 +23,4 @@ ENTRY(strchr)
23 teq r2, r1 23 teq r2, r1
24 movne r0, #0 24 movne r0, #0
25 subeq r0, r0, #1 25 subeq r0, r0, #1
26 RETINSTR(mov,pc,lr) 26 mov pc, lr
diff --git a/arch/arm/lib/strncpy_from_user.S b/arch/arm/lib/strncpy_from_user.S
index 629cc8775276..35649f04fcac 100644
--- a/arch/arm/lib/strncpy_from_user.S
+++ b/arch/arm/lib/strncpy_from_user.S
@@ -21,7 +21,6 @@
21 * -EFAULT on exception, or "len" if we fill the whole buffer 21 * -EFAULT on exception, or "len" if we fill the whole buffer
22 */ 22 */
23ENTRY(__arch_strncpy_from_user) 23ENTRY(__arch_strncpy_from_user)
24 save_lr
25 mov ip, r1 24 mov ip, r1
261: subs r2, r2, #1 251: subs r2, r2, #1
27USER( ldrplbt r3, [r1], #1) 26USER( ldrplbt r3, [r1], #1)
@@ -31,13 +30,13 @@ USER( ldrplbt r3, [r1], #1)
31 bne 1b 30 bne 1b
32 sub r1, r1, #1 @ take NUL character out of count 31 sub r1, r1, #1 @ take NUL character out of count
332: sub r0, r1, ip 322: sub r0, r1, ip
34 restore_pc 33 mov pc, lr
35 34
36 .section .fixup,"ax" 35 .section .fixup,"ax"
37 .align 0 36 .align 0
389001: mov r3, #0 379001: mov r3, #0
39 strb r3, [r0, #0] @ null terminate 38 strb r3, [r0, #0] @ null terminate
40 mov r0, #-EFAULT 39 mov r0, #-EFAULT
41 restore_pc 40 mov pc, lr
42 .previous 41 .previous
43 42
diff --git a/arch/arm/lib/strnlen_user.S b/arch/arm/lib/strnlen_user.S
index 67bcd8268128..3668a15991ef 100644
--- a/arch/arm/lib/strnlen_user.S
+++ b/arch/arm/lib/strnlen_user.S
@@ -21,7 +21,6 @@
21 * or zero on exception, or n + 1 if too long 21 * or zero on exception, or n + 1 if too long
22 */ 22 */
23ENTRY(__arch_strnlen_user) 23ENTRY(__arch_strnlen_user)
24 save_lr
25 mov r2, r0 24 mov r2, r0
261: 251:
27USER( ldrbt r3, [r0], #1) 26USER( ldrbt r3, [r0], #1)
@@ -31,10 +30,10 @@ USER( ldrbt r3, [r0], #1)
31 bne 1b 30 bne 1b
32 add r0, r0, #1 31 add r0, r0, #1
332: sub r0, r0, r2 322: sub r0, r0, r2
34 restore_pc 33 mov pc, lr
35 34
36 .section .fixup,"ax" 35 .section .fixup,"ax"
37 .align 0 36 .align 0
389001: mov r0, #0 379001: mov r0, #0
39 restore_pc 38 mov pc, lr
40 .previous 39 .previous
diff --git a/arch/arm/lib/strrchr.S b/arch/arm/lib/strrchr.S
index fa923f026f15..538df220aa48 100644
--- a/arch/arm/lib/strrchr.S
+++ b/arch/arm/lib/strrchr.S
@@ -22,4 +22,4 @@ ENTRY(strrchr)
22 teq r2, #0 22 teq r2, #0
23 bne 1b 23 bne 1b
24 mov r0, r3 24 mov r0, r3
25 RETINSTR(mov,pc,lr) 25 mov pc, lr
diff --git a/arch/arm/lib/uaccess.S b/arch/arm/lib/uaccess.S
index 0cc450f863b6..1f1545d737be 100644
--- a/arch/arm/lib/uaccess.S
+++ b/arch/arm/lib/uaccess.S
@@ -105,7 +105,7 @@ USER( strgtbt r3, [r0], #1) @ May fault
105 movs ip, r2 105 movs ip, r2
106 bne .Lc2u_nowords 106 bne .Lc2u_nowords
107.Lc2u_finished: mov r0, #0 107.Lc2u_finished: mov r0, #0
108 LOADREGS(fd,sp!,{r2, r4 - r7, pc}) 108 ldmfd sp!, {r2, r4 - r7, pc}
109 109
110.Lc2u_src_not_aligned: 110.Lc2u_src_not_aligned:
111 bic r1, r1, #3 111 bic r1, r1, #3
@@ -280,7 +280,7 @@ USER( strgtbt r3, [r0], #1) @ May fault
280 280
281 .section .fixup,"ax" 281 .section .fixup,"ax"
282 .align 0 282 .align 0
2839001: LOADREGS(fd,sp!, {r0, r4 - r7, pc}) 2839001: ldmfd sp!, {r0, r4 - r7, pc}
284 .previous 284 .previous
285 285
286/* Prototype: unsigned long __arch_copy_from_user(void *to,const void *from,unsigned long n); 286/* Prototype: unsigned long __arch_copy_from_user(void *to,const void *from,unsigned long n);
@@ -369,7 +369,7 @@ USER( ldrgtbt r3, [r1], #1) @ May fault
369 bne .Lcfu_nowords 369 bne .Lcfu_nowords
370.Lcfu_finished: mov r0, #0 370.Lcfu_finished: mov r0, #0
371 add sp, sp, #8 371 add sp, sp, #8
372 LOADREGS(fd,sp!,{r4 - r7, pc}) 372 ldmfd sp!, {r4 - r7, pc}
373 373
374.Lcfu_src_not_aligned: 374.Lcfu_src_not_aligned:
375 bic r1, r1, #3 375 bic r1, r1, #3
@@ -556,6 +556,6 @@ USER( ldrgtbt r3, [r1], #1) @ May fault
556 movne r1, r4 556 movne r1, r4
557 blne __memzero 557 blne __memzero
558 mov r0, r4 558 mov r0, r4
559 LOADREGS(fd,sp!, {r4 - r7, pc}) 559 ldmfd sp!, {r4 - r7, pc}
560 .previous 560 .previous
561 561