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authorJonathan Austin <jonathan.austin@arm.com>2013-09-26 11:49:28 -0400
committerChristoffer Dall <christoffer.dall@linaro.org>2013-10-12 20:45:30 -0400
commite8c2d99f8277d68d28a9f99d16289712bc2aee7f (patch)
tree26f87c5f4aa7f952fb9b3e4ad28894556cee06b5 /arch/arm/kvm/reset.c
parent5e497046f005528464f9600a4ee04f49df713596 (diff)
KVM: ARM: Add support for Cortex-A7
This patch adds support for running Cortex-A7 guests on Cortex-A7 hosts. As Cortex-A7 is architecturally compatible with A15, this patch is largely just generalising existing code. Areas where 'implementation defined' behaviour is identical for A7 and A15 is moved to allow it to be used by both cores. The check to ensure that coprocessor register tables are sorted correctly is also moved in to 'common' code to avoid each new cpu doing its own check (and possibly forgetting to do so!) Signed-off-by: Jonathan Austin <jonathan.austin@arm.com> Acked-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
Diffstat (limited to 'arch/arm/kvm/reset.c')
-rw-r--r--arch/arm/kvm/reset.c15
1 files changed, 8 insertions, 7 deletions
diff --git a/arch/arm/kvm/reset.c b/arch/arm/kvm/reset.c
index 71e08baee209..d9bbd834f188 100644
--- a/arch/arm/kvm/reset.c
+++ b/arch/arm/kvm/reset.c
@@ -30,16 +30,16 @@
30#include <kvm/arm_arch_timer.h> 30#include <kvm/arm_arch_timer.h>
31 31
32/****************************************************************************** 32/******************************************************************************
33 * Cortex-A15 Reset Values 33 * Cortex-A15 and Cortex-A7 Reset Values
34 */ 34 */
35 35
36static const int a15_max_cpu_idx = 3; 36static const int cortexa_max_cpu_idx = 3;
37 37
38static struct kvm_regs a15_regs_reset = { 38static struct kvm_regs cortexa_regs_reset = {
39 .usr_regs.ARM_cpsr = SVC_MODE | PSR_A_BIT | PSR_I_BIT | PSR_F_BIT, 39 .usr_regs.ARM_cpsr = SVC_MODE | PSR_A_BIT | PSR_I_BIT | PSR_F_BIT,
40}; 40};
41 41
42static const struct kvm_irq_level a15_vtimer_irq = { 42static const struct kvm_irq_level cortexa_vtimer_irq = {
43 { .irq = 27 }, 43 { .irq = 27 },
44 .level = 1, 44 .level = 1,
45}; 45};
@@ -62,12 +62,13 @@ int kvm_reset_vcpu(struct kvm_vcpu *vcpu)
62 const struct kvm_irq_level *cpu_vtimer_irq; 62 const struct kvm_irq_level *cpu_vtimer_irq;
63 63
64 switch (vcpu->arch.target) { 64 switch (vcpu->arch.target) {
65 case KVM_ARM_TARGET_CORTEX_A7:
65 case KVM_ARM_TARGET_CORTEX_A15: 66 case KVM_ARM_TARGET_CORTEX_A15:
66 if (vcpu->vcpu_id > a15_max_cpu_idx) 67 if (vcpu->vcpu_id > cortexa_max_cpu_idx)
67 return -EINVAL; 68 return -EINVAL;
68 cpu_reset = &a15_regs_reset; 69 cpu_reset = &cortexa_regs_reset;
69 vcpu->arch.midr = read_cpuid_id(); 70 vcpu->arch.midr = read_cpuid_id();
70 cpu_vtimer_irq = &a15_vtimer_irq; 71 cpu_vtimer_irq = &cortexa_vtimer_irq;
71 break; 72 break;
72 default: 73 default:
73 return -ENODEV; 74 return -ENODEV;