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authorArnd Bergmann <arnd@arndb.de>2012-01-09 11:16:29 -0500
committerArnd Bergmann <arnd@arndb.de>2012-01-09 11:16:29 -0500
commitdcf7ec5ee62a78123057a1e286c88ca739717409 (patch)
treefa3f19434638a942ba66d236dde4d9aaadf8b370 /arch/arm/kernel/sleep.S
parent15db3e823c3246e3bd31fe454f5c8927eb85caf2 (diff)
parent142f2101a86ade2d6c9dfbedf82e1b5b31c8fce6 (diff)
Merge branch 'samsung/driver' into next/drivers
Conflicts: arch/arm/mach-mxs/include/mach/common.h Pull in previous samsung conflict merges and do a trivial merge of an mxs double-add conflict. Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'arch/arm/kernel/sleep.S')
-rw-r--r--arch/arm/kernel/sleep.S4
1 files changed, 4 insertions, 0 deletions
diff --git a/arch/arm/kernel/sleep.S b/arch/arm/kernel/sleep.S
index 020e99c845e7..1f268bda4552 100644
--- a/arch/arm/kernel/sleep.S
+++ b/arch/arm/kernel/sleep.S
@@ -54,14 +54,18 @@ ENDPROC(cpu_suspend_abort)
54 * r0 = control register value 54 * r0 = control register value
55 */ 55 */
56 .align 5 56 .align 5
57 .pushsection .idmap.text,"ax"
57ENTRY(cpu_resume_mmu) 58ENTRY(cpu_resume_mmu)
58 ldr r3, =cpu_resume_after_mmu 59 ldr r3, =cpu_resume_after_mmu
60 instr_sync
59 mcr p15, 0, r0, c1, c0, 0 @ turn on MMU, I-cache, etc 61 mcr p15, 0, r0, c1, c0, 0 @ turn on MMU, I-cache, etc
60 mrc p15, 0, r0, c0, c0, 0 @ read id reg 62 mrc p15, 0, r0, c0, c0, 0 @ read id reg
63 instr_sync
61 mov r0, r0 64 mov r0, r0
62 mov r0, r0 65 mov r0, r0
63 mov pc, r3 @ jump to virtual address 66 mov pc, r3 @ jump to virtual address
64ENDPROC(cpu_resume_mmu) 67ENDPROC(cpu_resume_mmu)
68 .popsection
65cpu_resume_after_mmu: 69cpu_resume_after_mmu:
66 bl cpu_init @ restore the und/abt/irq banked regs 70 bl cpu_init @ restore the und/abt/irq banked regs
67 mov r0, #0 @ return zero on success 71 mov r0, #0 @ return zero on success