diff options
author | Mark Rutland <mark.rutland@arm.com> | 2011-04-28 10:47:10 -0400 |
---|---|---|
committer | Will Deacon <will.deacon@arm.com> | 2011-08-31 05:50:09 -0400 |
commit | e1f431b57ef9e4a68281540933fa74865cbb7a74 (patch) | |
tree | 895e018faee0a504c82c02b69a8784433c3a057e /arch/arm/kernel/perf_event_v6.c | |
parent | 7ae18a5717cbbf1879bdd5b66d7009a9958e5aef (diff) |
ARM: perf: refactor event mapping
Currently mapping an event type to a hardware configuration value
depends on the data being pointed to from struct arm_pmu. These fields
(cache_map, event_map, raw_event_mask) are currently specific to CPU
PMUs, and do not serve the general case well.
This patch replaces the event map pointers on struct arm_pmu with a new
'map_event' function pointer. Small shim functions are used to reuse
the existing common code.
Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Reviewed-by: Will Deacon <will.deacon@arm.com>
Reviewed-by: Jamie Iles <jamie@jamieiles.com>
Reviewed-by: Ashwin Chaugule <ashwinc@codeaurora.org>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Diffstat (limited to 'arch/arm/kernel/perf_event_v6.c')
-rw-r--r-- | arch/arm/kernel/perf_event_v6.c | 21 |
1 files changed, 15 insertions, 6 deletions
diff --git a/arch/arm/kernel/perf_event_v6.c b/arch/arm/kernel/perf_event_v6.c index 68cf70425f2f..a4c5aa9baa44 100644 --- a/arch/arm/kernel/perf_event_v6.c +++ b/arch/arm/kernel/perf_event_v6.c | |||
@@ -657,6 +657,12 @@ armv6mpcore_pmu_disable_event(struct hw_perf_event *hwc, | |||
657 | raw_spin_unlock_irqrestore(&events->pmu_lock, flags); | 657 | raw_spin_unlock_irqrestore(&events->pmu_lock, flags); |
658 | } | 658 | } |
659 | 659 | ||
660 | static int armv6_map_event(struct perf_event *event) | ||
661 | { | ||
662 | return map_cpu_event(event, &armv6_perf_map, | ||
663 | &armv6_perf_cache_map, 0xFF); | ||
664 | } | ||
665 | |||
660 | static struct arm_pmu armv6pmu = { | 666 | static struct arm_pmu armv6pmu = { |
661 | .id = ARM_PERF_PMU_ID_V6, | 667 | .id = ARM_PERF_PMU_ID_V6, |
662 | .name = "v6", | 668 | .name = "v6", |
@@ -668,9 +674,7 @@ static struct arm_pmu armv6pmu = { | |||
668 | .get_event_idx = armv6pmu_get_event_idx, | 674 | .get_event_idx = armv6pmu_get_event_idx, |
669 | .start = armv6pmu_start, | 675 | .start = armv6pmu_start, |
670 | .stop = armv6pmu_stop, | 676 | .stop = armv6pmu_stop, |
671 | .cache_map = &armv6_perf_cache_map, | 677 | .map_event = armv6_map_event, |
672 | .event_map = &armv6_perf_map, | ||
673 | .raw_event_mask = 0xFF, | ||
674 | .num_events = 3, | 678 | .num_events = 3, |
675 | .max_period = (1LLU << 32) - 1, | 679 | .max_period = (1LLU << 32) - 1, |
676 | }; | 680 | }; |
@@ -687,6 +691,13 @@ static struct arm_pmu *__init armv6pmu_init(void) | |||
687 | * disable the interrupt reporting and update the event. When unthrottling we | 691 | * disable the interrupt reporting and update the event. When unthrottling we |
688 | * reset the period and enable the interrupt reporting. | 692 | * reset the period and enable the interrupt reporting. |
689 | */ | 693 | */ |
694 | |||
695 | static int armv6mpcore_map_event(struct perf_event *event) | ||
696 | { | ||
697 | return map_cpu_event(event, &armv6mpcore_perf_map, | ||
698 | &armv6mpcore_perf_cache_map, 0xFF); | ||
699 | } | ||
700 | |||
690 | static struct arm_pmu armv6mpcore_pmu = { | 701 | static struct arm_pmu armv6mpcore_pmu = { |
691 | .id = ARM_PERF_PMU_ID_V6MP, | 702 | .id = ARM_PERF_PMU_ID_V6MP, |
692 | .name = "v6mpcore", | 703 | .name = "v6mpcore", |
@@ -698,9 +709,7 @@ static struct arm_pmu armv6mpcore_pmu = { | |||
698 | .get_event_idx = armv6pmu_get_event_idx, | 709 | .get_event_idx = armv6pmu_get_event_idx, |
699 | .start = armv6pmu_start, | 710 | .start = armv6pmu_start, |
700 | .stop = armv6pmu_stop, | 711 | .stop = armv6pmu_stop, |
701 | .cache_map = &armv6mpcore_perf_cache_map, | 712 | .map_event = armv6mpcore_map_event, |
702 | .event_map = &armv6mpcore_perf_map, | ||
703 | .raw_event_mask = 0xFF, | ||
704 | .num_events = 3, | 713 | .num_events = 3, |
705 | .max_period = (1LLU << 32) - 1, | 714 | .max_period = (1LLU << 32) - 1, |
706 | }; | 715 | }; |