Merge branch 'for-linus' of git://ftp.arm.linux.org.uk/~rmk/linux-arm

Pull ARM updates from Russell King:
 "Included in this update:

   - perf updates from Will Deacon:

     The main changes are callchain stability fixes from Jean Pihet and
     event mapping and PMU name rework from Mark Rutland

     The latter is preparatory work for enabling some code re-use with
     arm64 in the future.

   - updates for nommu from Uwe Kleine-König:

     Two different fixes for the same problem making some ARM nommu
     configurations not boot since 3.6-rc1.  The problem is that
     user_addr_max returned the biggest available RAM address which
     makes some copy_from_user variants fail to read from XIP memory.

   - deprecate legacy OMAP DMA API, in preparation for it's removal.

     The popular drivers have been converted over, leaving a very small
     number of rarely used drivers, which hopefully can be converted
     during the next cycle with a bit more visibility (and hopefully
     people popping out of the woodwork to help test)

   - more tweaks for BE systems, particularly with the kernel image
     format.  In connection with this, I've cleaned up the way we
     generate the linker script for the decompressor.

   - removal of hard-coded assumptions of the kernel stack size, making
     everywhere depend on the value of THREAD_SIZE_ORDER.

   - MCPM updates from Nicolas Pitre.

   - Make it easier for proper CPU part number checks (which should
     always include the vendor field).

   - Assembly code optimisation - use the "bx" instruction when
     returning from a function on ARMv6+ rather than "mov pc, reg".

   - Save the last kernel misaligned fault location and report it via
     the procfs alignment file.

   - Clean up the way we create the initial stack frame, which is a
     repeated pattern in several different locations.

   - Support for 8-byte get_user(), needed for some DRM implementations.

   - mcs locking from Will Deacon.

   - Save and restore a few more Cortex-A9 registers (for errata
     workarounds)

   - Fix various aspects of the SWP emulation, and the ELF hwcap for the
     SWP instruction.

   - Update LPAE logic for pte_write and pmd_write to make it more
     correct.

   - Support for Broadcom Brahma15 CPU cores.

   - ARM assembly crypto updates from Ard Biesheuvel"

* 'for-linus' of git://ftp.arm.linux.org.uk/~rmk/linux-arm: (53 commits)
  ARM: add comments to the early page table remap code
  ARM: 8122/1: smp_scu: enable SCU standby support
  ARM: 8121/1: smp_scu: use macro for SCU enable bit
  ARM: 8120/1: crypto: sha512: add ARM NEON implementation
  ARM: 8119/1: crypto: sha1: add ARM NEON implementation
  ARM: 8118/1: crypto: sha1/make use of common SHA-1 structures
  ARM: 8113/1: remove remaining definitions of PLAT_PHYS_OFFSET from <mach/memory.h>
  ARM: 8111/1: Enable erratum 798181 for Broadcom Brahma-B15
  ARM: 8110/1: do CPU-specific init for Broadcom Brahma15 cores
  ARM: 8109/1: mm: Modify pte_write and pmd_write logic for LPAE
  ARM: 8108/1: mm: Introduce {pte,pmd}_isset and {pte,pmd}_isclear
  ARM: hwcap: disable HWCAP_SWP if the CPU advertises it has exclusives
  ARM: SWP emulation: only initialise on ARMv7 CPUs
  ARM: SWP emulation: always enable when SMP is enabled
  ARM: 8103/1: save/restore Cortex-A9 CP15 registers on suspend/resume
  ARM: 8098/1: mcs lock: implement wfe-based polling for MCS locking
  ARM: 8091/2: add get_user() support for 8 byte types
  ARM: 8097/1: unistd.h: relocate comments back to place
  ARM: 8096/1: Describe required sort order for textofs-y (TEXT_OFFSET)
  ARM: 8090/1: add revision info for PL310 errata 588369 and 727915
  ...

1 files changed, 36 insertions, 30 deletions

diff --git a/arch/arm/kernel/perf_event_cpu.c b/arch/arm/kernel/perf_event_cpu.c
index af9e35e8836f..e6a6edbec613 100644
--- a/arch/arm/kernel/perf_event_cpu.c
+++ b/arch/arm/kernel/perf_event_cpu.c
@@ -233,14 +233,17 @@ static struct of_device_id cpu_pmu_of_device_ids[] = {
         {.compatible = "arm,cortex-a7-pmu",     .data = armv7_a7_pmu_init},
         {.compatible = "arm,cortex-a5-pmu",     .data = armv7_a5_pmu_init},
         {.compatible = "arm,arm11mpcore-pmu",   .data = armv6mpcore_pmu_init},
-        {.compatible = "arm,arm1176-pmu",       .data = armv6pmu_init},
-        {.compatible = "arm,arm1136-pmu",       .data = armv6pmu_init},
+        {.compatible = "arm,arm1176-pmu",       .data = armv6_1176_pmu_init},
+        {.compatible = "arm,arm1136-pmu",       .data = armv6_1136_pmu_init},
         {.compatible = "qcom,krait-pmu",        .data = krait_pmu_init},
         {},
 };
 
 static struct platform_device_id cpu_pmu_plat_device_ids[] = {
         {.name = "arm-pmu"},
+        {.name = "armv6-pmu"},
+        {.name = "armv7-pmu"},
+        {.name = "xscale-pmu"},
         {},
 };
 
@@ -250,40 +253,43 @@ static struct platform_device_id cpu_pmu_plat_device_ids[] = {
 static int probe_current_pmu(struct arm_pmu *pmu)
 {
         int cpu = get_cpu();
-        unsigned long implementor = read_cpuid_implementor();
-        unsigned long part_number = read_cpuid_part_number();
         int ret = -ENODEV;
 
         pr_info("probing PMU on CPU %d\n", cpu);
 
+        switch (read_cpuid_part()) {
         /* ARM Ltd CPUs. */
-        if (implementor == ARM_CPU_IMP_ARM) {
-                switch (part_number) {
-                case ARM_CPU_PART_ARM1136:
-                case ARM_CPU_PART_ARM1156:
-                case ARM_CPU_PART_ARM1176:
-                        ret = armv6pmu_init(pmu);
-                        break;
-                case ARM_CPU_PART_ARM11MPCORE:
-                        ret = armv6mpcore_pmu_init(pmu);
-                        break;
-                case ARM_CPU_PART_CORTEX_A8:
-                        ret = armv7_a8_pmu_init(pmu);
-                        break;
-                case ARM_CPU_PART_CORTEX_A9:
-                        ret = armv7_a9_pmu_init(pmu);
-                        break;
-                }
-        /* Intel CPUs [xscale]. */
-        } else if (implementor == ARM_CPU_IMP_INTEL) {
-                switch (xscale_cpu_arch_version()) {
-                case ARM_CPU_XSCALE_ARCH_V1:
-                        ret = xscale1pmu_init(pmu);
-                        break;
-                case ARM_CPU_XSCALE_ARCH_V2:
-                        ret = xscale2pmu_init(pmu);
-                        break;
+        case ARM_CPU_PART_ARM1136:
+                ret = armv6_1136_pmu_init(pmu);
+                break;
+        case ARM_CPU_PART_ARM1156:
+                ret = armv6_1156_pmu_init(pmu);
+                break;
+        case ARM_CPU_PART_ARM1176:
+                ret = armv6_1176_pmu_init(pmu);
+                break;
+        case ARM_CPU_PART_ARM11MPCORE:
+                ret = armv6mpcore_pmu_init(pmu);
+                break;
+        case ARM_CPU_PART_CORTEX_A8:
+                ret = armv7_a8_pmu_init(pmu);
+                break;
+        case ARM_CPU_PART_CORTEX_A9:
+                ret = armv7_a9_pmu_init(pmu);
+                break;
+
+        default:
+                if (read_cpuid_implementor() == ARM_CPU_IMP_INTEL) {
+                        switch (xscale_cpu_arch_version()) {
+                        case ARM_CPU_XSCALE_ARCH_V1:
+                                ret = xscale1pmu_init(pmu);
+                                break;
+                        case ARM_CPU_XSCALE_ARCH_V2:
+                                ret = xscale2pmu_init(pmu);
+                                break;
+                        }
                 }
+                break;
         }
 
         put_cpu();