ARM: 5727/1: Pass IFSR register to do_PrefetchAbort()

Instruction fault status register, IFSR, was introduced on ARMv6 to
provide status information about the last insturction fault. It
needed for proper prefetch abort handling.

Now we have three prefetch abort model:

  * legacy - for CPUs before ARMv6. They doesn't provide neither
    IFSR nor IFAR. We simulate IFSR with section translation fault
    status for them to generalize code;
  * ARMv6 - provides IFSR, but not IFAR;
  * ARMv7 - provides both IFSR and IFAR.

Signed-off-by: Kirill A. Shutemov <kirill@shutemov.name>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

1 files changed, 6 insertions, 12 deletions

diff --git a/arch/arm/kernel/entry-armv.S b/arch/arm/kernel/entry-armv.S
index 0a2ba51cf35d..322410be573c 100644
--- a/arch/arm/kernel/entry-armv.S
+++ b/arch/arm/kernel/entry-armv.S
@@ -311,22 +311,16 @@ __pabt_svc:
         tst     r3, #PSR_I_BIT
         biceq   r9, r9, #PSR_I_BIT
 
-        @
-        @ set args, then call main handler
-        @
-        @  r0 - address of faulting instruction
-        @  r1 - pointer to registers on stack
-        @
-#ifdef MULTI_PABORT
         mov     r0, r2                  @ pass address of aborted instruction.
+#ifdef MULTI_PABORT
         ldr     r4, .LCprocfns
         mov     lr, pc
         ldr     pc, [r4, #PROCESSOR_PABT_FUNC]
 #else
-        CPU_PABORT_HANDLER(r0, r2)
+        bl      CPU_PABORT_HANDLER
 #endif
         msr     cpsr_c, r9                      @ Maybe enable interrupts
-        mov     r1, sp                          @ regs
+        mov     r2, sp                          @ regs
         bl      do_PrefetchAbort                @ call abort handler
 
         @
@@ -701,16 +695,16 @@ ENDPROC(__und_usr_unknown)
 __pabt_usr:
         usr_entry
 
-#ifdef MULTI_PABORT
         mov     r0, r2                  @ pass address of aborted instruction.
+#ifdef MULTI_PABORT
         ldr     r4, .LCprocfns
         mov     lr, pc
         ldr     pc, [r4, #PROCESSOR_PABT_FUNC]
 #else
-        CPU_PABORT_HANDLER(r0, r2)
+        bl      CPU_PABORT_HANDLER
 #endif
         enable_irq                              @ Enable interrupts
-        mov     r1, sp                          @ regs
+        mov     r2, sp                          @ regs
         bl      do_PrefetchAbort                @ call abort handler
  UNWIND(.fnend          )
         /* fall through */