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authorJamie Iles <jamie.iles@picochip.com>2010-02-02 14:23:15 -0500
committerRussell King <rmk+kernel@arm.linux.org.uk>2010-02-12 12:23:43 -0500
commit0f4f0672ac950c96cffaf84a666d35e817d7c3ca (patch)
treecb4c1ec72f7842622c636a76f5ca519f3f3e8ea8 /arch/arm/kernel/Makefile
parent74d2e4f8d79ae0c4b6ec027958d5b18058662eea (diff)
ARM: 5899/2: arm: provide a mechanism to reserve performance counters
To add support for perf events and to allow the hardware counters to be shared with oprofile, we need a way to reserve access to the pmu (performance monitor unit). Platforms with PMU interrupts should register the interrupts in arch/arm/kernel/pmu.c Signed-off-by: Jamie Iles <jamie.iles@picochip.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/kernel/Makefile')
-rw-r--r--arch/arm/kernel/Makefile1
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm/kernel/Makefile b/arch/arm/kernel/Makefile
index dd00f747e2ad..216890d804c2 100644
--- a/arch/arm/kernel/Makefile
+++ b/arch/arm/kernel/Makefile
@@ -46,6 +46,7 @@ obj-$(CONFIG_CPU_XSCALE) += xscale-cp0.o
46obj-$(CONFIG_CPU_XSC3) += xscale-cp0.o 46obj-$(CONFIG_CPU_XSC3) += xscale-cp0.o
47obj-$(CONFIG_CPU_MOHAWK) += xscale-cp0.o 47obj-$(CONFIG_CPU_MOHAWK) += xscale-cp0.o
48obj-$(CONFIG_IWMMXT) += iwmmxt.o 48obj-$(CONFIG_IWMMXT) += iwmmxt.o
49obj-$(CONFIG_CPU_HAS_PMU) += pmu.o
49AFLAGS_iwmmxt.o := -Wa,-mcpu=iwmmxt 50AFLAGS_iwmmxt.o := -Wa,-mcpu=iwmmxt
50 51
51ifneq ($(CONFIG_ARCH_EBSA110),y) 52ifneq ($(CONFIG_ARCH_EBSA110),y)