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authorMarc Zyngier <marc.zyngier@arm.com>2013-01-21 19:36:14 -0500
committerMarc Zyngier <marc.zyngier@arm.com>2013-02-11 13:59:20 -0500
commit9d949dce523df878f1fce9f4d7738a5834650927 (patch)
tree4d8105c25a5f8dd08afd9fd450be5296a1befc33 /arch/arm/include
parentb47ef92af8efc30f4fbdeac041397df01b7134af (diff)
ARM: KVM: VGIC virtual CPU interface management
Add VGIC virtual CPU interface code, picking pending interrupts from the distributor and stashing them in the VGIC control interface list registers. Reviewed-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Christoffer Dall <c.dall@virtualopensystems.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Diffstat (limited to 'arch/arm/include')
-rw-r--r--arch/arm/include/asm/kvm_vgic.h31
1 files changed, 31 insertions, 0 deletions
diff --git a/arch/arm/include/asm/kvm_vgic.h b/arch/arm/include/asm/kvm_vgic.h
index 4d4f47426a4a..c2dc8574ea3a 100644
--- a/arch/arm/include/asm/kvm_vgic.h
+++ b/arch/arm/include/asm/kvm_vgic.h
@@ -33,6 +33,7 @@
33#define VGIC_NR_PRIVATE_IRQS (VGIC_NR_SGIS + VGIC_NR_PPIS) 33#define VGIC_NR_PRIVATE_IRQS (VGIC_NR_SGIS + VGIC_NR_PPIS)
34#define VGIC_NR_SHARED_IRQS (VGIC_NR_IRQS - VGIC_NR_PRIVATE_IRQS) 34#define VGIC_NR_SHARED_IRQS (VGIC_NR_IRQS - VGIC_NR_PRIVATE_IRQS)
35#define VGIC_MAX_CPUS KVM_MAX_VCPUS 35#define VGIC_MAX_CPUS KVM_MAX_VCPUS
36#define VGIC_MAX_LRS (1 << 6)
36 37
37/* Sanity checks... */ 38/* Sanity checks... */
38#if (VGIC_MAX_CPUS > 8) 39#if (VGIC_MAX_CPUS > 8)
@@ -110,8 +111,33 @@ struct vgic_dist {
110}; 111};
111 112
112struct vgic_cpu { 113struct vgic_cpu {
114#ifdef CONFIG_KVM_ARM_VGIC
115 /* per IRQ to LR mapping */
116 u8 vgic_irq_lr_map[VGIC_NR_IRQS];
117
118 /* Pending interrupts on this VCPU */
119 DECLARE_BITMAP( pending_percpu, VGIC_NR_PRIVATE_IRQS);
120 DECLARE_BITMAP( pending_shared, VGIC_NR_SHARED_IRQS);
121
122 /* Bitmap of used/free list registers */
123 DECLARE_BITMAP( lr_used, VGIC_MAX_LRS);
124
125 /* Number of list registers on this CPU */
126 int nr_lr;
127
128 /* CPU vif control registers for world switch */
129 u32 vgic_hcr;
130 u32 vgic_vmcr;
131 u32 vgic_misr; /* Saved only */
132 u32 vgic_eisr[2]; /* Saved only */
133 u32 vgic_elrsr[2]; /* Saved only */
134 u32 vgic_apr;
135 u32 vgic_lr[VGIC_MAX_LRS];
136#endif
113}; 137};
114 138
139#define LR_EMPTY 0xff
140
115struct kvm; 141struct kvm;
116struct kvm_vcpu; 142struct kvm_vcpu;
117struct kvm_run; 143struct kvm_run;
@@ -119,9 +145,14 @@ struct kvm_exit_mmio;
119 145
120#ifdef CONFIG_KVM_ARM_VGIC 146#ifdef CONFIG_KVM_ARM_VGIC
121int kvm_vgic_set_addr(struct kvm *kvm, unsigned long type, u64 addr); 147int kvm_vgic_set_addr(struct kvm *kvm, unsigned long type, u64 addr);
148void kvm_vgic_flush_hwstate(struct kvm_vcpu *vcpu);
149void kvm_vgic_sync_hwstate(struct kvm_vcpu *vcpu);
150int kvm_vgic_vcpu_pending_irq(struct kvm_vcpu *vcpu);
122bool vgic_handle_mmio(struct kvm_vcpu *vcpu, struct kvm_run *run, 151bool vgic_handle_mmio(struct kvm_vcpu *vcpu, struct kvm_run *run,
123 struct kvm_exit_mmio *mmio); 152 struct kvm_exit_mmio *mmio);
124 153
154#define irqchip_in_kernel(k) (!!((k)->arch.vgic.vctrl_base))
155
125#else 156#else
126static inline int kvm_vgic_hyp_init(void) 157static inline int kvm_vgic_hyp_init(void)
127{ 158{