diff options
author | Barry Song <Baohua.Song@csr.com> | 2011-09-30 09:43:12 -0400 |
---|---|---|
committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2011-10-17 04:11:51 -0400 |
commit | 91c2ebb90b1890abc648ba9dec5608cbc97e1cb9 (patch) | |
tree | b9f9934aa1b17f3529d2c6423cfacc54bb626724 /arch/arm/include | |
parent | 8d4e652d1b2539196efaef051956fa29e22e9c10 (diff) |
ARM: 7114/1: cache-l2x0: add resume entry for l2 in secure mode
we save the l2x0 registers at the first initialization, and platform codes
can get them to restore l2x0 status after wakeup.
Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Tested-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/include')
-rw-r--r-- | arch/arm/include/asm/hardware/cache-l2x0.h | 25 | ||||
-rw-r--r-- | arch/arm/include/asm/outercache.h | 7 |
2 files changed, 32 insertions, 0 deletions
diff --git a/arch/arm/include/asm/hardware/cache-l2x0.h b/arch/arm/include/asm/hardware/cache-l2x0.h index c48cb1e1c46c..434edccdf7f3 100644 --- a/arch/arm/include/asm/hardware/cache-l2x0.h +++ b/arch/arm/include/asm/hardware/cache-l2x0.h | |||
@@ -67,6 +67,13 @@ | |||
67 | #define L2X0_CACHE_ID_PART_MASK (0xf << 6) | 67 | #define L2X0_CACHE_ID_PART_MASK (0xf << 6) |
68 | #define L2X0_CACHE_ID_PART_L210 (1 << 6) | 68 | #define L2X0_CACHE_ID_PART_L210 (1 << 6) |
69 | #define L2X0_CACHE_ID_PART_L310 (3 << 6) | 69 | #define L2X0_CACHE_ID_PART_L310 (3 << 6) |
70 | #define L2X0_CACHE_ID_RTL_MASK 0x3f | ||
71 | #define L2X0_CACHE_ID_RTL_R0P0 0x0 | ||
72 | #define L2X0_CACHE_ID_RTL_R1P0 0x2 | ||
73 | #define L2X0_CACHE_ID_RTL_R2P0 0x4 | ||
74 | #define L2X0_CACHE_ID_RTL_R3P0 0x5 | ||
75 | #define L2X0_CACHE_ID_RTL_R3P1 0x6 | ||
76 | #define L2X0_CACHE_ID_RTL_R3P2 0x8 | ||
70 | 77 | ||
71 | #define L2X0_AUX_CTRL_MASK 0xc0000fff | 78 | #define L2X0_AUX_CTRL_MASK 0xc0000fff |
72 | #define L2X0_AUX_CTRL_DATA_RD_LATENCY_SHIFT 0 | 79 | #define L2X0_AUX_CTRL_DATA_RD_LATENCY_SHIFT 0 |
@@ -96,6 +103,24 @@ | |||
96 | #ifndef __ASSEMBLY__ | 103 | #ifndef __ASSEMBLY__ |
97 | extern void __init l2x0_init(void __iomem *base, __u32 aux_val, __u32 aux_mask); | 104 | extern void __init l2x0_init(void __iomem *base, __u32 aux_val, __u32 aux_mask); |
98 | extern int l2x0_of_init(__u32 aux_val, __u32 aux_mask); | 105 | extern int l2x0_of_init(__u32 aux_val, __u32 aux_mask); |
106 | |||
107 | struct l2x0_regs { | ||
108 | unsigned long phy_base; | ||
109 | unsigned long aux_ctrl; | ||
110 | /* | ||
111 | * Whether the following registers need to be saved/restored | ||
112 | * depends on platform | ||
113 | */ | ||
114 | unsigned long tag_latency; | ||
115 | unsigned long data_latency; | ||
116 | unsigned long filter_start; | ||
117 | unsigned long filter_end; | ||
118 | unsigned long prefetch_ctrl; | ||
119 | unsigned long pwr_ctrl; | ||
120 | }; | ||
121 | |||
122 | extern struct l2x0_regs l2x0_saved_regs; | ||
123 | |||
99 | #endif | 124 | #endif |
100 | 125 | ||
101 | #endif | 126 | #endif |
diff --git a/arch/arm/include/asm/outercache.h b/arch/arm/include/asm/outercache.h index d8387437ec5a..53426c66352a 100644 --- a/arch/arm/include/asm/outercache.h +++ b/arch/arm/include/asm/outercache.h | |||
@@ -34,6 +34,7 @@ struct outer_cache_fns { | |||
34 | void (*sync)(void); | 34 | void (*sync)(void); |
35 | #endif | 35 | #endif |
36 | void (*set_debug)(unsigned long); | 36 | void (*set_debug)(unsigned long); |
37 | void (*resume)(void); | ||
37 | }; | 38 | }; |
38 | 39 | ||
39 | #ifdef CONFIG_OUTER_CACHE | 40 | #ifdef CONFIG_OUTER_CACHE |
@@ -74,6 +75,12 @@ static inline void outer_disable(void) | |||
74 | outer_cache.disable(); | 75 | outer_cache.disable(); |
75 | } | 76 | } |
76 | 77 | ||
78 | static inline void outer_resume(void) | ||
79 | { | ||
80 | if (outer_cache.resume) | ||
81 | outer_cache.resume(); | ||
82 | } | ||
83 | |||
77 | #else | 84 | #else |
78 | 85 | ||
79 | static inline void outer_inv_range(phys_addr_t start, phys_addr_t end) | 86 | static inline void outer_inv_range(phys_addr_t start, phys_addr_t end) |