diff options
author | Linus Torvalds <torvalds@linux-foundation.org> | 2012-03-29 19:53:48 -0400 |
---|---|---|
committer | Linus Torvalds <torvalds@linux-foundation.org> | 2012-03-29 19:53:48 -0400 |
commit | 12679a2d7e3bfbdc7586e3e86d1ca90c46659363 (patch) | |
tree | d9c00f2e599d1c3e04a349229a6a19906d01f99e /arch/arm/include | |
parent | 1c036588772d01655d851f75dffc27c971e072e2 (diff) | |
parent | b0df89868006517417251e02cc4ce5d4b0165885 (diff) |
Merge branch 'for-linus' of git://git.linaro.org/people/rmk/linux-arm
Pull more ARM updates from Russell King.
This got a fair number of conflicts with the <asm/system.h> split, but
also with some other sparse-irq and header file include cleanups. They
all looked pretty trivial, though.
* 'for-linus' of git://git.linaro.org/people/rmk/linux-arm: (59 commits)
ARM: fix Kconfig warning for HAVE_BPF_JIT
ARM: 7361/1: provide XIP_VIRT_ADDR for no-MMU builds
ARM: 7349/1: integrator: convert to sparse irqs
ARM: 7259/3: net: JIT compiler for packet filters
ARM: 7334/1: add jump label support
ARM: 7333/2: jump label: detect %c support for ARM
ARM: 7338/1: add support for early console output via semihosting
ARM: use set_current_blocked() and block_sigmask()
ARM: exec: remove redundant set_fs(USER_DS)
ARM: 7332/1: extract out code patch function from kprobes
ARM: 7331/1: extract out insn generation code from ftrace
ARM: 7330/1: ftrace: use canonical Thumb-2 wide instruction format
ARM: 7351/1: ftrace: remove useless memory checks
ARM: 7316/1: kexec: EOI active and mask all interrupts in kexec crash path
ARM: Versatile Express: add NO_IOPORT
ARM: get rid of asm/irq.h in asm/prom.h
ARM: 7319/1: Print debug info for SIGBUS in user faults
ARM: 7318/1: gic: refactor irq_start assignment
ARM: 7317/1: irq: avoid NULL check in for_each_irq_desc loop
ARM: 7315/1: perf: add support for the Cortex-A7 PMU
...
Diffstat (limited to 'arch/arm/include')
-rw-r--r-- | arch/arm/include/asm/elf.h | 4 | ||||
-rw-r--r-- | arch/arm/include/asm/hardware/cache-l2x0.h | 6 | ||||
-rw-r--r-- | arch/arm/include/asm/hardware/it8152.h | 3 | ||||
-rw-r--r-- | arch/arm/include/asm/irq.h | 8 | ||||
-rw-r--r-- | arch/arm/include/asm/jump_label.h | 41 | ||||
-rw-r--r-- | arch/arm/include/asm/mc146818rtc.h | 4 | ||||
-rw-r--r-- | arch/arm/include/asm/memory.h | 2 | ||||
-rw-r--r-- | arch/arm/include/asm/mmu_context.h | 29 | ||||
-rw-r--r-- | arch/arm/include/asm/opcodes.h | 59 | ||||
-rw-r--r-- | arch/arm/include/asm/page.h | 2 | ||||
-rw-r--r-- | arch/arm/include/asm/perf_event.h | 1 | ||||
-rw-r--r-- | arch/arm/include/asm/processor.h | 1 | ||||
-rw-r--r-- | arch/arm/include/asm/prom.h | 2 | ||||
-rw-r--r-- | arch/arm/include/asm/tlbflush.h | 136 | ||||
-rw-r--r-- | arch/arm/include/asm/traps.h | 2 |
15 files changed, 180 insertions, 120 deletions
diff --git a/arch/arm/include/asm/elf.h b/arch/arm/include/asm/elf.h index 0e9ce8d9686e..38050b1c4800 100644 --- a/arch/arm/include/asm/elf.h +++ b/arch/arm/include/asm/elf.h | |||
@@ -130,8 +130,4 @@ struct mm_struct; | |||
130 | extern unsigned long arch_randomize_brk(struct mm_struct *mm); | 130 | extern unsigned long arch_randomize_brk(struct mm_struct *mm); |
131 | #define arch_randomize_brk arch_randomize_brk | 131 | #define arch_randomize_brk arch_randomize_brk |
132 | 132 | ||
133 | extern int vectors_user_mapping(void); | ||
134 | #define arch_setup_additional_pages(bprm, uses_interp) vectors_user_mapping() | ||
135 | #define ARCH_HAS_SETUP_ADDITIONAL_PAGES | ||
136 | |||
137 | #endif | 133 | #endif |
diff --git a/arch/arm/include/asm/hardware/cache-l2x0.h b/arch/arm/include/asm/hardware/cache-l2x0.h index 7df239bcdf27..c4c87bc12231 100644 --- a/arch/arm/include/asm/hardware/cache-l2x0.h +++ b/arch/arm/include/asm/hardware/cache-l2x0.h | |||
@@ -103,11 +103,11 @@ | |||
103 | #define L2X0_ADDR_FILTER_EN 1 | 103 | #define L2X0_ADDR_FILTER_EN 1 |
104 | 104 | ||
105 | #ifndef __ASSEMBLY__ | 105 | #ifndef __ASSEMBLY__ |
106 | extern void __init l2x0_init(void __iomem *base, __u32 aux_val, __u32 aux_mask); | 106 | extern void __init l2x0_init(void __iomem *base, u32 aux_val, u32 aux_mask); |
107 | #if defined(CONFIG_CACHE_L2X0) && defined(CONFIG_OF) | 107 | #if defined(CONFIG_CACHE_L2X0) && defined(CONFIG_OF) |
108 | extern int l2x0_of_init(__u32 aux_val, __u32 aux_mask); | 108 | extern int l2x0_of_init(u32 aux_val, u32 aux_mask); |
109 | #else | 109 | #else |
110 | static inline int l2x0_of_init(__u32 aux_val, __u32 aux_mask) | 110 | static inline int l2x0_of_init(u32 aux_val, u32 aux_mask) |
111 | { | 111 | { |
112 | return -ENODEV; | 112 | return -ENODEV; |
113 | } | 113 | } |
diff --git a/arch/arm/include/asm/hardware/it8152.h b/arch/arm/include/asm/hardware/it8152.h index 43cab498bc27..73f84fa4f366 100644 --- a/arch/arm/include/asm/hardware/it8152.h +++ b/arch/arm/include/asm/hardware/it8152.h | |||
@@ -9,6 +9,9 @@ | |||
9 | 9 | ||
10 | #ifndef __ASM_HARDWARE_IT8152_H | 10 | #ifndef __ASM_HARDWARE_IT8152_H |
11 | #define __ASM_HARDWARE_IT8152_H | 11 | #define __ASM_HARDWARE_IT8152_H |
12 | |||
13 | #include <mach/irqs.h> | ||
14 | |||
12 | extern void __iomem *it8152_base_address; | 15 | extern void __iomem *it8152_base_address; |
13 | 16 | ||
14 | #define IT8152_IO_BASE (it8152_base_address + 0x03e00000) | 17 | #define IT8152_IO_BASE (it8152_base_address + 0x03e00000) |
diff --git a/arch/arm/include/asm/irq.h b/arch/arm/include/asm/irq.h index 5a526afb5f18..35c21c375d81 100644 --- a/arch/arm/include/asm/irq.h +++ b/arch/arm/include/asm/irq.h | |||
@@ -1,14 +1,18 @@ | |||
1 | #ifndef __ASM_ARM_IRQ_H | 1 | #ifndef __ASM_ARM_IRQ_H |
2 | #define __ASM_ARM_IRQ_H | 2 | #define __ASM_ARM_IRQ_H |
3 | 3 | ||
4 | #define NR_IRQS_LEGACY 16 | ||
5 | |||
6 | #ifndef CONFIG_SPARSE_IRQ | ||
4 | #include <mach/irqs.h> | 7 | #include <mach/irqs.h> |
8 | #else | ||
9 | #define NR_IRQS NR_IRQS_LEGACY | ||
10 | #endif | ||
5 | 11 | ||
6 | #ifndef irq_canonicalize | 12 | #ifndef irq_canonicalize |
7 | #define irq_canonicalize(i) (i) | 13 | #define irq_canonicalize(i) (i) |
8 | #endif | 14 | #endif |
9 | 15 | ||
10 | #define NR_IRQS_LEGACY 16 | ||
11 | |||
12 | /* | 16 | /* |
13 | * Use this value to indicate lack of interrupt | 17 | * Use this value to indicate lack of interrupt |
14 | * capability | 18 | * capability |
diff --git a/arch/arm/include/asm/jump_label.h b/arch/arm/include/asm/jump_label.h new file mode 100644 index 000000000000..5c5ca2ea62b0 --- /dev/null +++ b/arch/arm/include/asm/jump_label.h | |||
@@ -0,0 +1,41 @@ | |||
1 | #ifndef _ASM_ARM_JUMP_LABEL_H | ||
2 | #define _ASM_ARM_JUMP_LABEL_H | ||
3 | |||
4 | #ifdef __KERNEL__ | ||
5 | |||
6 | #include <linux/types.h> | ||
7 | #include <asm/system.h> | ||
8 | |||
9 | #define JUMP_LABEL_NOP_SIZE 4 | ||
10 | |||
11 | #ifdef CONFIG_THUMB2_KERNEL | ||
12 | #define JUMP_LABEL_NOP "nop.w" | ||
13 | #else | ||
14 | #define JUMP_LABEL_NOP "nop" | ||
15 | #endif | ||
16 | |||
17 | static __always_inline bool arch_static_branch(struct jump_label_key *key) | ||
18 | { | ||
19 | asm goto("1:\n\t" | ||
20 | JUMP_LABEL_NOP "\n\t" | ||
21 | ".pushsection __jump_table, \"aw\"\n\t" | ||
22 | ".word 1b, %l[l_yes], %c0\n\t" | ||
23 | ".popsection\n\t" | ||
24 | : : "i" (key) : : l_yes); | ||
25 | |||
26 | return false; | ||
27 | l_yes: | ||
28 | return true; | ||
29 | } | ||
30 | |||
31 | #endif /* __KERNEL__ */ | ||
32 | |||
33 | typedef u32 jump_label_t; | ||
34 | |||
35 | struct jump_entry { | ||
36 | jump_label_t code; | ||
37 | jump_label_t target; | ||
38 | jump_label_t key; | ||
39 | }; | ||
40 | |||
41 | #endif | ||
diff --git a/arch/arm/include/asm/mc146818rtc.h b/arch/arm/include/asm/mc146818rtc.h index 6b884d2b0b69..e8567bb99dfc 100644 --- a/arch/arm/include/asm/mc146818rtc.h +++ b/arch/arm/include/asm/mc146818rtc.h | |||
@@ -5,7 +5,9 @@ | |||
5 | #define _ASM_MC146818RTC_H | 5 | #define _ASM_MC146818RTC_H |
6 | 6 | ||
7 | #include <linux/io.h> | 7 | #include <linux/io.h> |
8 | #include <mach/irqs.h> | 8 | #include <linux/kernel.h> |
9 | |||
10 | #define RTC_IRQ BUILD_BUG_ON(1) | ||
9 | 11 | ||
10 | #ifndef RTC_PORT | 12 | #ifndef RTC_PORT |
11 | #define RTC_PORT(x) (0x70 + (x)) | 13 | #define RTC_PORT(x) (0x70 + (x)) |
diff --git a/arch/arm/include/asm/memory.h b/arch/arm/include/asm/memory.h index a8997d71084e..fcb575747e5e 100644 --- a/arch/arm/include/asm/memory.h +++ b/arch/arm/include/asm/memory.h | |||
@@ -116,6 +116,8 @@ | |||
116 | #define MODULES_END (END_MEM) | 116 | #define MODULES_END (END_MEM) |
117 | #define MODULES_VADDR (PHYS_OFFSET) | 117 | #define MODULES_VADDR (PHYS_OFFSET) |
118 | 118 | ||
119 | #define XIP_VIRT_ADDR(physaddr) (physaddr) | ||
120 | |||
119 | #endif /* !CONFIG_MMU */ | 121 | #endif /* !CONFIG_MMU */ |
120 | 122 | ||
121 | /* | 123 | /* |
diff --git a/arch/arm/include/asm/mmu_context.h b/arch/arm/include/asm/mmu_context.h index 71605d9f8e42..a0b3cac0547c 100644 --- a/arch/arm/include/asm/mmu_context.h +++ b/arch/arm/include/asm/mmu_context.h | |||
@@ -18,6 +18,7 @@ | |||
18 | #include <asm/cacheflush.h> | 18 | #include <asm/cacheflush.h> |
19 | #include <asm/cachetype.h> | 19 | #include <asm/cachetype.h> |
20 | #include <asm/proc-fns.h> | 20 | #include <asm/proc-fns.h> |
21 | #include <asm-generic/mm_hooks.h> | ||
21 | 22 | ||
22 | void __check_kvm_seq(struct mm_struct *mm); | 23 | void __check_kvm_seq(struct mm_struct *mm); |
23 | 24 | ||
@@ -133,32 +134,4 @@ switch_mm(struct mm_struct *prev, struct mm_struct *next, | |||
133 | #define deactivate_mm(tsk,mm) do { } while (0) | 134 | #define deactivate_mm(tsk,mm) do { } while (0) |
134 | #define activate_mm(prev,next) switch_mm(prev, next, NULL) | 135 | #define activate_mm(prev,next) switch_mm(prev, next, NULL) |
135 | 136 | ||
136 | /* | ||
137 | * We are inserting a "fake" vma for the user-accessible vector page so | ||
138 | * gdb and friends can get to it through ptrace and /proc/<pid>/mem. | ||
139 | * But we also want to remove it before the generic code gets to see it | ||
140 | * during process exit or the unmapping of it would cause total havoc. | ||
141 | * (the macro is used as remove_vma() is static to mm/mmap.c) | ||
142 | */ | ||
143 | #define arch_exit_mmap(mm) \ | ||
144 | do { \ | ||
145 | struct vm_area_struct *high_vma = find_vma(mm, 0xffff0000); \ | ||
146 | if (high_vma) { \ | ||
147 | BUG_ON(high_vma->vm_next); /* it should be last */ \ | ||
148 | if (high_vma->vm_prev) \ | ||
149 | high_vma->vm_prev->vm_next = NULL; \ | ||
150 | else \ | ||
151 | mm->mmap = NULL; \ | ||
152 | rb_erase(&high_vma->vm_rb, &mm->mm_rb); \ | ||
153 | mm->mmap_cache = NULL; \ | ||
154 | mm->map_count--; \ | ||
155 | remove_vma(high_vma); \ | ||
156 | } \ | ||
157 | } while (0) | ||
158 | |||
159 | static inline void arch_dup_mmap(struct mm_struct *oldmm, | ||
160 | struct mm_struct *mm) | ||
161 | { | ||
162 | } | ||
163 | |||
164 | #endif | 137 | #endif |
diff --git a/arch/arm/include/asm/opcodes.h b/arch/arm/include/asm/opcodes.h index c0efdd60966f..19c48deda70f 100644 --- a/arch/arm/include/asm/opcodes.h +++ b/arch/arm/include/asm/opcodes.h | |||
@@ -17,4 +17,63 @@ extern asmlinkage unsigned int arm_check_condition(u32 opcode, u32 psr); | |||
17 | #define ARM_OPCODE_CONDTEST_PASS 1 | 17 | #define ARM_OPCODE_CONDTEST_PASS 1 |
18 | #define ARM_OPCODE_CONDTEST_UNCOND 2 | 18 | #define ARM_OPCODE_CONDTEST_UNCOND 2 |
19 | 19 | ||
20 | |||
21 | /* | ||
22 | * Opcode byteswap helpers | ||
23 | * | ||
24 | * These macros help with converting instructions between a canonical integer | ||
25 | * format and in-memory representation, in an endianness-agnostic manner. | ||
26 | * | ||
27 | * __mem_to_opcode_*() convert from in-memory representation to canonical form. | ||
28 | * __opcode_to_mem_*() convert from canonical form to in-memory representation. | ||
29 | * | ||
30 | * | ||
31 | * Canonical instruction representation: | ||
32 | * | ||
33 | * ARM: 0xKKLLMMNN | ||
34 | * Thumb 16-bit: 0x0000KKLL, where KK < 0xE8 | ||
35 | * Thumb 32-bit: 0xKKLLMMNN, where KK >= 0xE8 | ||
36 | * | ||
37 | * There is no way to distinguish an ARM instruction in canonical representation | ||
38 | * from a Thumb instruction (just as these cannot be distinguished in memory). | ||
39 | * Where this distinction is important, it needs to be tracked separately. | ||
40 | * | ||
41 | * Note that values in the range 0x0000E800..0xE7FFFFFF intentionally do not | ||
42 | * represent any valid Thumb-2 instruction. For this range, | ||
43 | * __opcode_is_thumb32() and __opcode_is_thumb16() will both be false. | ||
44 | */ | ||
45 | |||
46 | #ifndef __ASSEMBLY__ | ||
47 | |||
48 | #include <linux/types.h> | ||
49 | #include <linux/swab.h> | ||
50 | |||
51 | #ifdef CONFIG_CPU_ENDIAN_BE8 | ||
52 | #define __opcode_to_mem_arm(x) swab32(x) | ||
53 | #define __opcode_to_mem_thumb16(x) swab16(x) | ||
54 | #define __opcode_to_mem_thumb32(x) swahb32(x) | ||
55 | #else | ||
56 | #define __opcode_to_mem_arm(x) ((u32)(x)) | ||
57 | #define __opcode_to_mem_thumb16(x) ((u16)(x)) | ||
58 | #define __opcode_to_mem_thumb32(x) swahw32(x) | ||
59 | #endif | ||
60 | |||
61 | #define __mem_to_opcode_arm(x) __opcode_to_mem_arm(x) | ||
62 | #define __mem_to_opcode_thumb16(x) __opcode_to_mem_thumb16(x) | ||
63 | #define __mem_to_opcode_thumb32(x) __opcode_to_mem_thumb32(x) | ||
64 | |||
65 | /* Operations specific to Thumb opcodes */ | ||
66 | |||
67 | /* Instruction size checks: */ | ||
68 | #define __opcode_is_thumb32(x) ((u32)(x) >= 0xE8000000UL) | ||
69 | #define __opcode_is_thumb16(x) ((u32)(x) < 0xE800UL) | ||
70 | |||
71 | /* Operations to construct or split 32-bit Thumb instructions: */ | ||
72 | #define __opcode_thumb32_first(x) ((u16)((x) >> 16)) | ||
73 | #define __opcode_thumb32_second(x) ((u16)(x)) | ||
74 | #define __opcode_thumb32_compose(first, second) \ | ||
75 | (((u32)(u16)(first) << 16) | (u32)(u16)(second)) | ||
76 | |||
77 | #endif /* __ASSEMBLY__ */ | ||
78 | |||
20 | #endif /* __ASM_ARM_OPCODES_H */ | 79 | #endif /* __ASM_ARM_OPCODES_H */ |
diff --git a/arch/arm/include/asm/page.h b/arch/arm/include/asm/page.h index 97b440c25c58..5838361c48b3 100644 --- a/arch/arm/include/asm/page.h +++ b/arch/arm/include/asm/page.h | |||
@@ -151,6 +151,8 @@ extern void __cpu_copy_user_highpage(struct page *to, struct page *from, | |||
151 | #define clear_page(page) memset((void *)(page), 0, PAGE_SIZE) | 151 | #define clear_page(page) memset((void *)(page), 0, PAGE_SIZE) |
152 | extern void copy_page(void *to, const void *from); | 152 | extern void copy_page(void *to, const void *from); |
153 | 153 | ||
154 | #define __HAVE_ARCH_GATE_AREA 1 | ||
155 | |||
154 | #ifdef CONFIG_ARM_LPAE | 156 | #ifdef CONFIG_ARM_LPAE |
155 | #include <asm/pgtable-3level-types.h> | 157 | #include <asm/pgtable-3level-types.h> |
156 | #else | 158 | #else |
diff --git a/arch/arm/include/asm/perf_event.h b/arch/arm/include/asm/perf_event.h index 7523340afb8a..00cbe10a50e3 100644 --- a/arch/arm/include/asm/perf_event.h +++ b/arch/arm/include/asm/perf_event.h | |||
@@ -22,6 +22,7 @@ enum arm_perf_pmu_ids { | |||
22 | ARM_PERF_PMU_ID_CA9, | 22 | ARM_PERF_PMU_ID_CA9, |
23 | ARM_PERF_PMU_ID_CA5, | 23 | ARM_PERF_PMU_ID_CA5, |
24 | ARM_PERF_PMU_ID_CA15, | 24 | ARM_PERF_PMU_ID_CA15, |
25 | ARM_PERF_PMU_ID_CA7, | ||
25 | ARM_NUM_PMU_IDS, | 26 | ARM_NUM_PMU_IDS, |
26 | }; | 27 | }; |
27 | 28 | ||
diff --git a/arch/arm/include/asm/processor.h b/arch/arm/include/asm/processor.h index f4d7f56ee51f..5ac8d3d3e025 100644 --- a/arch/arm/include/asm/processor.h +++ b/arch/arm/include/asm/processor.h | |||
@@ -55,7 +55,6 @@ struct thread_struct { | |||
55 | #define start_thread(regs,pc,sp) \ | 55 | #define start_thread(regs,pc,sp) \ |
56 | ({ \ | 56 | ({ \ |
57 | unsigned long *stack = (unsigned long *)sp; \ | 57 | unsigned long *stack = (unsigned long *)sp; \ |
58 | set_fs(USER_DS); \ | ||
59 | memset(regs->uregs, 0, sizeof(regs->uregs)); \ | 58 | memset(regs->uregs, 0, sizeof(regs->uregs)); \ |
60 | if (current->personality & ADDR_LIMIT_32BIT) \ | 59 | if (current->personality & ADDR_LIMIT_32BIT) \ |
61 | regs->ARM_cpsr = USR_MODE; \ | 60 | regs->ARM_cpsr = USR_MODE; \ |
diff --git a/arch/arm/include/asm/prom.h b/arch/arm/include/asm/prom.h index ee0363307918..aeae9c609df4 100644 --- a/arch/arm/include/asm/prom.h +++ b/arch/arm/include/asm/prom.h | |||
@@ -13,8 +13,6 @@ | |||
13 | 13 | ||
14 | #ifdef CONFIG_OF | 14 | #ifdef CONFIG_OF |
15 | 15 | ||
16 | #include <asm/irq.h> | ||
17 | |||
18 | extern struct machine_desc *setup_machine_fdt(unsigned int dt_phys); | 16 | extern struct machine_desc *setup_machine_fdt(unsigned int dt_phys); |
19 | extern void arm_dt_memblock_reserve(void); | 17 | extern void arm_dt_memblock_reserve(void); |
20 | 18 | ||
diff --git a/arch/arm/include/asm/tlbflush.h b/arch/arm/include/asm/tlbflush.h index 02b2f8203982..85fe61e73202 100644 --- a/arch/arm/include/asm/tlbflush.h +++ b/arch/arm/include/asm/tlbflush.h | |||
@@ -318,6 +318,21 @@ extern struct cpu_tlb_fns cpu_tlb; | |||
318 | 318 | ||
319 | #define tlb_flag(f) ((always_tlb_flags & (f)) || (__tlb_flag & possible_tlb_flags & (f))) | 319 | #define tlb_flag(f) ((always_tlb_flags & (f)) || (__tlb_flag & possible_tlb_flags & (f))) |
320 | 320 | ||
321 | #define __tlb_op(f, insnarg, arg) \ | ||
322 | do { \ | ||
323 | if (always_tlb_flags & (f)) \ | ||
324 | asm("mcr " insnarg \ | ||
325 | : : "r" (arg) : "cc"); \ | ||
326 | else if (possible_tlb_flags & (f)) \ | ||
327 | asm("tst %1, %2\n\t" \ | ||
328 | "mcrne " insnarg \ | ||
329 | : : "r" (arg), "r" (__tlb_flag), "Ir" (f) \ | ||
330 | : "cc"); \ | ||
331 | } while (0) | ||
332 | |||
333 | #define tlb_op(f, regs, arg) __tlb_op(f, "p15, 0, %0, " regs, arg) | ||
334 | #define tlb_l2_op(f, regs, arg) __tlb_op(f, "p15, 1, %0, " regs, arg) | ||
335 | |||
321 | static inline void local_flush_tlb_all(void) | 336 | static inline void local_flush_tlb_all(void) |
322 | { | 337 | { |
323 | const int zero = 0; | 338 | const int zero = 0; |
@@ -326,16 +341,11 @@ static inline void local_flush_tlb_all(void) | |||
326 | if (tlb_flag(TLB_WB)) | 341 | if (tlb_flag(TLB_WB)) |
327 | dsb(); | 342 | dsb(); |
328 | 343 | ||
329 | if (tlb_flag(TLB_V3_FULL)) | 344 | tlb_op(TLB_V3_FULL, "c6, c0, 0", zero); |
330 | asm("mcr p15, 0, %0, c6, c0, 0" : : "r" (zero) : "cc"); | 345 | tlb_op(TLB_V4_U_FULL | TLB_V6_U_FULL, "c8, c7, 0", zero); |
331 | if (tlb_flag(TLB_V4_U_FULL | TLB_V6_U_FULL)) | 346 | tlb_op(TLB_V4_D_FULL | TLB_V6_D_FULL, "c8, c6, 0", zero); |
332 | asm("mcr p15, 0, %0, c8, c7, 0" : : "r" (zero) : "cc"); | 347 | tlb_op(TLB_V4_I_FULL | TLB_V6_I_FULL, "c8, c5, 0", zero); |
333 | if (tlb_flag(TLB_V4_D_FULL | TLB_V6_D_FULL)) | 348 | tlb_op(TLB_V7_UIS_FULL, "c8, c3, 0", zero); |
334 | asm("mcr p15, 0, %0, c8, c6, 0" : : "r" (zero) : "cc"); | ||
335 | if (tlb_flag(TLB_V4_I_FULL | TLB_V6_I_FULL)) | ||
336 | asm("mcr p15, 0, %0, c8, c5, 0" : : "r" (zero) : "cc"); | ||
337 | if (tlb_flag(TLB_V7_UIS_FULL)) | ||
338 | asm("mcr p15, 0, %0, c8, c3, 0" : : "r" (zero) : "cc"); | ||
339 | 349 | ||
340 | if (tlb_flag(TLB_BARRIER)) { | 350 | if (tlb_flag(TLB_BARRIER)) { |
341 | dsb(); | 351 | dsb(); |
@@ -352,29 +362,23 @@ static inline void local_flush_tlb_mm(struct mm_struct *mm) | |||
352 | if (tlb_flag(TLB_WB)) | 362 | if (tlb_flag(TLB_WB)) |
353 | dsb(); | 363 | dsb(); |
354 | 364 | ||
355 | if (cpumask_test_cpu(get_cpu(), mm_cpumask(mm))) { | 365 | if (possible_tlb_flags & (TLB_V3_FULL|TLB_V4_U_FULL|TLB_V4_D_FULL|TLB_V4_I_FULL)) { |
356 | if (tlb_flag(TLB_V3_FULL)) | 366 | if (cpumask_test_cpu(get_cpu(), mm_cpumask(mm))) { |
357 | asm("mcr p15, 0, %0, c6, c0, 0" : : "r" (zero) : "cc"); | 367 | tlb_op(TLB_V3_FULL, "c6, c0, 0", zero); |
358 | if (tlb_flag(TLB_V4_U_FULL)) | 368 | tlb_op(TLB_V4_U_FULL, "c8, c7, 0", zero); |
359 | asm("mcr p15, 0, %0, c8, c7, 0" : : "r" (zero) : "cc"); | 369 | tlb_op(TLB_V4_D_FULL, "c8, c6, 0", zero); |
360 | if (tlb_flag(TLB_V4_D_FULL)) | 370 | tlb_op(TLB_V4_I_FULL, "c8, c5, 0", zero); |
361 | asm("mcr p15, 0, %0, c8, c6, 0" : : "r" (zero) : "cc"); | 371 | } |
362 | if (tlb_flag(TLB_V4_I_FULL)) | 372 | put_cpu(); |
363 | asm("mcr p15, 0, %0, c8, c5, 0" : : "r" (zero) : "cc"); | ||
364 | } | 373 | } |
365 | put_cpu(); | 374 | |
366 | 375 | tlb_op(TLB_V6_U_ASID, "c8, c7, 2", asid); | |
367 | if (tlb_flag(TLB_V6_U_ASID)) | 376 | tlb_op(TLB_V6_D_ASID, "c8, c6, 2", asid); |
368 | asm("mcr p15, 0, %0, c8, c7, 2" : : "r" (asid) : "cc"); | 377 | tlb_op(TLB_V6_I_ASID, "c8, c5, 2", asid); |
369 | if (tlb_flag(TLB_V6_D_ASID)) | ||
370 | asm("mcr p15, 0, %0, c8, c6, 2" : : "r" (asid) : "cc"); | ||
371 | if (tlb_flag(TLB_V6_I_ASID)) | ||
372 | asm("mcr p15, 0, %0, c8, c5, 2" : : "r" (asid) : "cc"); | ||
373 | if (tlb_flag(TLB_V7_UIS_ASID)) | ||
374 | #ifdef CONFIG_ARM_ERRATA_720789 | 378 | #ifdef CONFIG_ARM_ERRATA_720789 |
375 | asm("mcr p15, 0, %0, c8, c3, 0" : : "r" (zero) : "cc"); | 379 | tlb_op(TLB_V7_UIS_ASID, "c8, c3, 0", zero); |
376 | #else | 380 | #else |
377 | asm("mcr p15, 0, %0, c8, c3, 2" : : "r" (asid) : "cc"); | 381 | tlb_op(TLB_V7_UIS_ASID, "c8, c3, 2", asid); |
378 | #endif | 382 | #endif |
379 | 383 | ||
380 | if (tlb_flag(TLB_BARRIER)) | 384 | if (tlb_flag(TLB_BARRIER)) |
@@ -392,30 +396,23 @@ local_flush_tlb_page(struct vm_area_struct *vma, unsigned long uaddr) | |||
392 | if (tlb_flag(TLB_WB)) | 396 | if (tlb_flag(TLB_WB)) |
393 | dsb(); | 397 | dsb(); |
394 | 398 | ||
395 | if (cpumask_test_cpu(smp_processor_id(), mm_cpumask(vma->vm_mm))) { | 399 | if (possible_tlb_flags & (TLB_V3_PAGE|TLB_V4_U_PAGE|TLB_V4_D_PAGE|TLB_V4_I_PAGE|TLB_V4_I_FULL) && |
396 | if (tlb_flag(TLB_V3_PAGE)) | 400 | cpumask_test_cpu(smp_processor_id(), mm_cpumask(vma->vm_mm))) { |
397 | asm("mcr p15, 0, %0, c6, c0, 0" : : "r" (uaddr) : "cc"); | 401 | tlb_op(TLB_V3_PAGE, "c6, c0, 0", uaddr); |
398 | if (tlb_flag(TLB_V4_U_PAGE)) | 402 | tlb_op(TLB_V4_U_PAGE, "c8, c7, 1", uaddr); |
399 | asm("mcr p15, 0, %0, c8, c7, 1" : : "r" (uaddr) : "cc"); | 403 | tlb_op(TLB_V4_D_PAGE, "c8, c6, 1", uaddr); |
400 | if (tlb_flag(TLB_V4_D_PAGE)) | 404 | tlb_op(TLB_V4_I_PAGE, "c8, c5, 1", uaddr); |
401 | asm("mcr p15, 0, %0, c8, c6, 1" : : "r" (uaddr) : "cc"); | ||
402 | if (tlb_flag(TLB_V4_I_PAGE)) | ||
403 | asm("mcr p15, 0, %0, c8, c5, 1" : : "r" (uaddr) : "cc"); | ||
404 | if (!tlb_flag(TLB_V4_I_PAGE) && tlb_flag(TLB_V4_I_FULL)) | 405 | if (!tlb_flag(TLB_V4_I_PAGE) && tlb_flag(TLB_V4_I_FULL)) |
405 | asm("mcr p15, 0, %0, c8, c5, 0" : : "r" (zero) : "cc"); | 406 | asm("mcr p15, 0, %0, c8, c5, 0" : : "r" (zero) : "cc"); |
406 | } | 407 | } |
407 | 408 | ||
408 | if (tlb_flag(TLB_V6_U_PAGE)) | 409 | tlb_op(TLB_V6_U_PAGE, "c8, c7, 1", uaddr); |
409 | asm("mcr p15, 0, %0, c8, c7, 1" : : "r" (uaddr) : "cc"); | 410 | tlb_op(TLB_V6_D_PAGE, "c8, c6, 1", uaddr); |
410 | if (tlb_flag(TLB_V6_D_PAGE)) | 411 | tlb_op(TLB_V6_I_PAGE, "c8, c5, 1", uaddr); |
411 | asm("mcr p15, 0, %0, c8, c6, 1" : : "r" (uaddr) : "cc"); | ||
412 | if (tlb_flag(TLB_V6_I_PAGE)) | ||
413 | asm("mcr p15, 0, %0, c8, c5, 1" : : "r" (uaddr) : "cc"); | ||
414 | if (tlb_flag(TLB_V7_UIS_PAGE)) | ||
415 | #ifdef CONFIG_ARM_ERRATA_720789 | 412 | #ifdef CONFIG_ARM_ERRATA_720789 |
416 | asm("mcr p15, 0, %0, c8, c3, 3" : : "r" (uaddr & PAGE_MASK) : "cc"); | 413 | tlb_op(TLB_V7_UIS_PAGE, "c8, c3, 3", uaddr & PAGE_MASK); |
417 | #else | 414 | #else |
418 | asm("mcr p15, 0, %0, c8, c3, 1" : : "r" (uaddr) : "cc"); | 415 | tlb_op(TLB_V7_UIS_PAGE, "c8, c3, 1", uaddr); |
419 | #endif | 416 | #endif |
420 | 417 | ||
421 | if (tlb_flag(TLB_BARRIER)) | 418 | if (tlb_flag(TLB_BARRIER)) |
@@ -432,25 +429,17 @@ static inline void local_flush_tlb_kernel_page(unsigned long kaddr) | |||
432 | if (tlb_flag(TLB_WB)) | 429 | if (tlb_flag(TLB_WB)) |
433 | dsb(); | 430 | dsb(); |
434 | 431 | ||
435 | if (tlb_flag(TLB_V3_PAGE)) | 432 | tlb_op(TLB_V3_PAGE, "c6, c0, 0", kaddr); |
436 | asm("mcr p15, 0, %0, c6, c0, 0" : : "r" (kaddr) : "cc"); | 433 | tlb_op(TLB_V4_U_PAGE, "c8, c7, 1", kaddr); |
437 | if (tlb_flag(TLB_V4_U_PAGE)) | 434 | tlb_op(TLB_V4_D_PAGE, "c8, c6, 1", kaddr); |
438 | asm("mcr p15, 0, %0, c8, c7, 1" : : "r" (kaddr) : "cc"); | 435 | tlb_op(TLB_V4_I_PAGE, "c8, c5, 1", kaddr); |
439 | if (tlb_flag(TLB_V4_D_PAGE)) | ||
440 | asm("mcr p15, 0, %0, c8, c6, 1" : : "r" (kaddr) : "cc"); | ||
441 | if (tlb_flag(TLB_V4_I_PAGE)) | ||
442 | asm("mcr p15, 0, %0, c8, c5, 1" : : "r" (kaddr) : "cc"); | ||
443 | if (!tlb_flag(TLB_V4_I_PAGE) && tlb_flag(TLB_V4_I_FULL)) | 436 | if (!tlb_flag(TLB_V4_I_PAGE) && tlb_flag(TLB_V4_I_FULL)) |
444 | asm("mcr p15, 0, %0, c8, c5, 0" : : "r" (zero) : "cc"); | 437 | asm("mcr p15, 0, %0, c8, c5, 0" : : "r" (zero) : "cc"); |
445 | 438 | ||
446 | if (tlb_flag(TLB_V6_U_PAGE)) | 439 | tlb_op(TLB_V6_U_PAGE, "c8, c7, 1", kaddr); |
447 | asm("mcr p15, 0, %0, c8, c7, 1" : : "r" (kaddr) : "cc"); | 440 | tlb_op(TLB_V6_D_PAGE, "c8, c6, 1", kaddr); |
448 | if (tlb_flag(TLB_V6_D_PAGE)) | 441 | tlb_op(TLB_V6_I_PAGE, "c8, c5, 1", kaddr); |
449 | asm("mcr p15, 0, %0, c8, c6, 1" : : "r" (kaddr) : "cc"); | 442 | tlb_op(TLB_V7_UIS_PAGE, "c8, c3, 1", kaddr); |
450 | if (tlb_flag(TLB_V6_I_PAGE)) | ||
451 | asm("mcr p15, 0, %0, c8, c5, 1" : : "r" (kaddr) : "cc"); | ||
452 | if (tlb_flag(TLB_V7_UIS_PAGE)) | ||
453 | asm("mcr p15, 0, %0, c8, c3, 1" : : "r" (kaddr) : "cc"); | ||
454 | 443 | ||
455 | if (tlb_flag(TLB_BARRIER)) { | 444 | if (tlb_flag(TLB_BARRIER)) { |
456 | dsb(); | 445 | dsb(); |
@@ -475,13 +464,8 @@ static inline void flush_pmd_entry(void *pmd) | |||
475 | { | 464 | { |
476 | const unsigned int __tlb_flag = __cpu_tlb_flags; | 465 | const unsigned int __tlb_flag = __cpu_tlb_flags; |
477 | 466 | ||
478 | if (tlb_flag(TLB_DCLEAN)) | 467 | tlb_op(TLB_DCLEAN, "c7, c10, 1 @ flush_pmd", pmd); |
479 | asm("mcr p15, 0, %0, c7, c10, 1 @ flush_pmd" | 468 | tlb_l2_op(TLB_L2CLEAN_FR, "c15, c9, 1 @ L2 flush_pmd", pmd); |
480 | : : "r" (pmd) : "cc"); | ||
481 | |||
482 | if (tlb_flag(TLB_L2CLEAN_FR)) | ||
483 | asm("mcr p15, 1, %0, c15, c9, 1 @ L2 flush_pmd" | ||
484 | : : "r" (pmd) : "cc"); | ||
485 | 469 | ||
486 | if (tlb_flag(TLB_WB)) | 470 | if (tlb_flag(TLB_WB)) |
487 | dsb(); | 471 | dsb(); |
@@ -491,15 +475,11 @@ static inline void clean_pmd_entry(void *pmd) | |||
491 | { | 475 | { |
492 | const unsigned int __tlb_flag = __cpu_tlb_flags; | 476 | const unsigned int __tlb_flag = __cpu_tlb_flags; |
493 | 477 | ||
494 | if (tlb_flag(TLB_DCLEAN)) | 478 | tlb_op(TLB_DCLEAN, "c7, c10, 1 @ flush_pmd", pmd); |
495 | asm("mcr p15, 0, %0, c7, c10, 1 @ flush_pmd" | 479 | tlb_l2_op(TLB_L2CLEAN_FR, "c15, c9, 1 @ L2 flush_pmd", pmd); |
496 | : : "r" (pmd) : "cc"); | ||
497 | |||
498 | if (tlb_flag(TLB_L2CLEAN_FR)) | ||
499 | asm("mcr p15, 1, %0, c15, c9, 1 @ L2 flush_pmd" | ||
500 | : : "r" (pmd) : "cc"); | ||
501 | } | 480 | } |
502 | 481 | ||
482 | #undef tlb_op | ||
503 | #undef tlb_flag | 483 | #undef tlb_flag |
504 | #undef always_tlb_flags | 484 | #undef always_tlb_flags |
505 | #undef possible_tlb_flags | 485 | #undef possible_tlb_flags |
diff --git a/arch/arm/include/asm/traps.h b/arch/arm/include/asm/traps.h index 5b29a6673625..f555bb3664dc 100644 --- a/arch/arm/include/asm/traps.h +++ b/arch/arm/include/asm/traps.h | |||
@@ -46,7 +46,7 @@ static inline int in_exception_text(unsigned long ptr) | |||
46 | return in ? : __in_irqentry_text(ptr); | 46 | return in ? : __in_irqentry_text(ptr); |
47 | } | 47 | } |
48 | 48 | ||
49 | extern void __init early_trap_init(void); | 49 | extern void __init early_trap_init(void *); |
50 | extern void dump_backtrace_entry(unsigned long where, unsigned long from, unsigned long frame); | 50 | extern void dump_backtrace_entry(unsigned long where, unsigned long from, unsigned long frame); |
51 | extern void ptrace_break(struct task_struct *tsk, struct pt_regs *regs); | 51 | extern void ptrace_break(struct task_struct *tsk, struct pt_regs *regs); |
52 | 52 | ||