ARM: perf: add support for the Cortex-A5 PMU

This patch adds support for the Cortex-A5 PMU to the ARMv7 perf-event
backend.

Signed-off-by: Will Deacon <will.deacon@arm.com>

1 files changed, 1 insertions, 0 deletions

diff --git a/arch/arm/include/asm/perf_event.h b/arch/arm/include/asm/perf_event.h
index c4aa4e8c6af9..207bd3c79ab6 100644
--- a/arch/arm/include/asm/perf_event.h
+++ b/arch/arm/include/asm/perf_event.h
@@ -24,6 +24,7 @@ enum arm_perf_pmu_ids {
         ARM_PERF_PMU_ID_V6MP,
         ARM_PERF_PMU_ID_CA8,
         ARM_PERF_PMU_ID_CA9,
+        ARM_PERF_PMU_ID_CA5,
         ARM_NUM_PMU_IDS,
 };