diff options
author | Russell King <rmk@dyn-67.arm.linux.org.uk> | 2008-08-10 13:08:10 -0400 |
---|---|---|
committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2008-09-01 07:06:23 -0400 |
commit | 0ba8b9b273c45dd23f60ff700e265a0069b33758 (patch) | |
tree | cb6aef90464889a27215cf9b7204c11b12e7c628 /arch/arm/include | |
parent | b8e6c91c74e9f0279b7c51048779b3d62da60b88 (diff) |
[ARM] cputype: separate definitions, use them
Add asm/cputype.h, moving functions and definitions from asm/system.h
there. Convert all users of 'processor_id' to the more efficient
read_cpuid_id() function.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/include')
-rw-r--r-- | arch/arm/include/asm/cputype.h | 64 | ||||
-rw-r--r-- | arch/arm/include/asm/system.h | 58 |
2 files changed, 64 insertions, 58 deletions
diff --git a/arch/arm/include/asm/cputype.h b/arch/arm/include/asm/cputype.h new file mode 100644 index 000000000000..7b9d27e749b8 --- /dev/null +++ b/arch/arm/include/asm/cputype.h | |||
@@ -0,0 +1,64 @@ | |||
1 | #ifndef __ASM_ARM_CPUTYPE_H | ||
2 | #define __ASM_ARM_CPUTYPE_H | ||
3 | |||
4 | #include <linux/stringify.h> | ||
5 | |||
6 | #define CPUID_ID 0 | ||
7 | #define CPUID_CACHETYPE 1 | ||
8 | #define CPUID_TCM 2 | ||
9 | #define CPUID_TLBTYPE 3 | ||
10 | |||
11 | #ifdef CONFIG_CPU_CP15 | ||
12 | #define read_cpuid(reg) \ | ||
13 | ({ \ | ||
14 | unsigned int __val; \ | ||
15 | asm("mrc p15, 0, %0, c0, c0, " __stringify(reg) \ | ||
16 | : "=r" (__val) \ | ||
17 | : \ | ||
18 | : "cc"); \ | ||
19 | __val; \ | ||
20 | }) | ||
21 | #else | ||
22 | extern unsigned int processor_id; | ||
23 | #define read_cpuid(reg) (processor_id) | ||
24 | #endif | ||
25 | |||
26 | /* | ||
27 | * The CPU ID never changes at run time, so we might as well tell the | ||
28 | * compiler that it's constant. Use this function to read the CPU ID | ||
29 | * rather than directly reading processor_id or read_cpuid() directly. | ||
30 | */ | ||
31 | static inline unsigned int __attribute_const__ read_cpuid_id(void) | ||
32 | { | ||
33 | return read_cpuid(CPUID_ID); | ||
34 | } | ||
35 | |||
36 | static inline unsigned int __attribute_const__ read_cpuid_cachetype(void) | ||
37 | { | ||
38 | return read_cpuid(CPUID_CACHETYPE); | ||
39 | } | ||
40 | |||
41 | /* | ||
42 | * Intel's XScale3 core supports some v6 features (supersections, L2) | ||
43 | * but advertises itself as v5 as it does not support the v6 ISA. For | ||
44 | * this reason, we need a way to explicitly test for this type of CPU. | ||
45 | */ | ||
46 | #ifndef CONFIG_CPU_XSC3 | ||
47 | #define cpu_is_xsc3() 0 | ||
48 | #else | ||
49 | static inline int cpu_is_xsc3(void) | ||
50 | { | ||
51 | if ((read_cpuid_id() & 0xffffe000) == 0x69056000) | ||
52 | return 1; | ||
53 | |||
54 | return 0; | ||
55 | } | ||
56 | #endif | ||
57 | |||
58 | #if !defined(CONFIG_CPU_XSCALE) && !defined(CONFIG_CPU_XSC3) | ||
59 | #define cpu_is_xscale() 0 | ||
60 | #else | ||
61 | #define cpu_is_xscale() 1 | ||
62 | #endif | ||
63 | |||
64 | #endif | ||
diff --git a/arch/arm/include/asm/system.h b/arch/arm/include/asm/system.h index 514af792a598..7aad78420f18 100644 --- a/arch/arm/include/asm/system.h +++ b/arch/arm/include/asm/system.h | |||
@@ -43,11 +43,6 @@ | |||
43 | #define CR_XP (1 << 23) /* Extended page tables */ | 43 | #define CR_XP (1 << 23) /* Extended page tables */ |
44 | #define CR_VE (1 << 24) /* Vectored interrupts */ | 44 | #define CR_VE (1 << 24) /* Vectored interrupts */ |
45 | 45 | ||
46 | #define CPUID_ID 0 | ||
47 | #define CPUID_CACHETYPE 1 | ||
48 | #define CPUID_TCM 2 | ||
49 | #define CPUID_TLBTYPE 3 | ||
50 | |||
51 | /* | 46 | /* |
52 | * This is used to ensure the compiler did actually allocate the register we | 47 | * This is used to ensure the compiler did actually allocate the register we |
53 | * asked it for some inline assembly sequences. Apparently we can't trust | 48 | * asked it for some inline assembly sequences. Apparently we can't trust |
@@ -61,36 +56,8 @@ | |||
61 | #ifndef __ASSEMBLY__ | 56 | #ifndef __ASSEMBLY__ |
62 | 57 | ||
63 | #include <linux/linkage.h> | 58 | #include <linux/linkage.h> |
64 | #include <linux/stringify.h> | ||
65 | #include <linux/irqflags.h> | 59 | #include <linux/irqflags.h> |
66 | 60 | ||
67 | #ifdef CONFIG_CPU_CP15 | ||
68 | #define read_cpuid(reg) \ | ||
69 | ({ \ | ||
70 | unsigned int __val; \ | ||
71 | asm("mrc p15, 0, %0, c0, c0, " __stringify(reg) \ | ||
72 | : "=r" (__val) \ | ||
73 | : \ | ||
74 | : "cc"); \ | ||
75 | __val; \ | ||
76 | }) | ||
77 | #else | ||
78 | extern unsigned int processor_id; | ||
79 | #define read_cpuid(reg) (processor_id) | ||
80 | #endif | ||
81 | |||
82 | /* | ||
83 | * The CPU ID never changes at run time, so we might as well tell the | ||
84 | * compiler that it's constant. Use this function to read the CPU ID | ||
85 | * rather than directly reading processor_id or read_cpuid() directly. | ||
86 | */ | ||
87 | static inline unsigned int read_cpuid_id(void) __attribute_const__; | ||
88 | |||
89 | static inline unsigned int read_cpuid_id(void) | ||
90 | { | ||
91 | return read_cpuid(CPUID_ID); | ||
92 | } | ||
93 | |||
94 | #define __exception __attribute__((section(".exception.text"))) | 61 | #define __exception __attribute__((section(".exception.text"))) |
95 | 62 | ||
96 | struct thread_info; | 63 | struct thread_info; |
@@ -131,31 +98,6 @@ extern void cpu_init(void); | |||
131 | void arm_machine_restart(char mode); | 98 | void arm_machine_restart(char mode); |
132 | extern void (*arm_pm_restart)(char str); | 99 | extern void (*arm_pm_restart)(char str); |
133 | 100 | ||
134 | /* | ||
135 | * Intel's XScale3 core supports some v6 features (supersections, L2) | ||
136 | * but advertises itself as v5 as it does not support the v6 ISA. For | ||
137 | * this reason, we need a way to explicitly test for this type of CPU. | ||
138 | */ | ||
139 | #ifndef CONFIG_CPU_XSC3 | ||
140 | #define cpu_is_xsc3() 0 | ||
141 | #else | ||
142 | static inline int cpu_is_xsc3(void) | ||
143 | { | ||
144 | extern unsigned int processor_id; | ||
145 | |||
146 | if ((processor_id & 0xffffe000) == 0x69056000) | ||
147 | return 1; | ||
148 | |||
149 | return 0; | ||
150 | } | ||
151 | #endif | ||
152 | |||
153 | #if !defined(CONFIG_CPU_XSCALE) && !defined(CONFIG_CPU_XSC3) | ||
154 | #define cpu_is_xscale() 0 | ||
155 | #else | ||
156 | #define cpu_is_xscale() 1 | ||
157 | #endif | ||
158 | |||
159 | #define UDBG_UNDEFINED (1 << 0) | 101 | #define UDBG_UNDEFINED (1 << 0) |
160 | #define UDBG_SYSCALL (1 << 1) | 102 | #define UDBG_SYSCALL (1 << 1) |
161 | #define UDBG_BADABORT (1 << 2) | 103 | #define UDBG_BADABORT (1 << 2) |