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authorWill Deacon <will.deacon@arm.com>2011-02-15 06:41:49 -0500
committerRussell King <rmk+kernel@arm.linux.org.uk>2011-02-15 09:20:22 -0500
commitad6b9c9d78b9beebef02ac7f566a08db7be3c320 (patch)
tree3abfb25f7b190d2976f03d65bc4e23ac2afd747d /arch/arm/include/asm
parent29a38193c15bd72ba96c57a805443ef46ea6a6ac (diff)
ARM: 6671/1: LPAE: use phys_addr_t instead of unsigned long in outercache functions
The unsigned long datatype is not sufficient for mapping physical addresses >= 4GB. This patch ensures that the phys_addr_t datatype is used to represent physical addresses when passed to the outer cache functions. Note that the definitions in struct outer_cache_fns remain as unsigned long because there are currently no outer cache implementations supporting physical addresses wider than 32-bits. Acked-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/include/asm')
-rw-r--r--arch/arm/include/asm/outercache.h14
1 files changed, 8 insertions, 6 deletions
diff --git a/arch/arm/include/asm/outercache.h b/arch/arm/include/asm/outercache.h
index fc1900925275..88ad89209764 100644
--- a/arch/arm/include/asm/outercache.h
+++ b/arch/arm/include/asm/outercache.h
@@ -21,6 +21,8 @@
21#ifndef __ASM_OUTERCACHE_H 21#ifndef __ASM_OUTERCACHE_H
22#define __ASM_OUTERCACHE_H 22#define __ASM_OUTERCACHE_H
23 23
24#include <linux/types.h>
25
24struct outer_cache_fns { 26struct outer_cache_fns {
25 void (*inv_range)(unsigned long, unsigned long); 27 void (*inv_range)(unsigned long, unsigned long);
26 void (*clean_range)(unsigned long, unsigned long); 28 void (*clean_range)(unsigned long, unsigned long);
@@ -37,17 +39,17 @@ struct outer_cache_fns {
37 39
38extern struct outer_cache_fns outer_cache; 40extern struct outer_cache_fns outer_cache;
39 41
40static inline void outer_inv_range(unsigned long start, unsigned long end) 42static inline void outer_inv_range(phys_addr_t start, phys_addr_t end)
41{ 43{
42 if (outer_cache.inv_range) 44 if (outer_cache.inv_range)
43 outer_cache.inv_range(start, end); 45 outer_cache.inv_range(start, end);
44} 46}
45static inline void outer_clean_range(unsigned long start, unsigned long end) 47static inline void outer_clean_range(phys_addr_t start, phys_addr_t end)
46{ 48{
47 if (outer_cache.clean_range) 49 if (outer_cache.clean_range)
48 outer_cache.clean_range(start, end); 50 outer_cache.clean_range(start, end);
49} 51}
50static inline void outer_flush_range(unsigned long start, unsigned long end) 52static inline void outer_flush_range(phys_addr_t start, phys_addr_t end)
51{ 53{
52 if (outer_cache.flush_range) 54 if (outer_cache.flush_range)
53 outer_cache.flush_range(start, end); 55 outer_cache.flush_range(start, end);
@@ -73,11 +75,11 @@ static inline void outer_disable(void)
73 75
74#else 76#else
75 77
76static inline void outer_inv_range(unsigned long start, unsigned long end) 78static inline void outer_inv_range(phys_addr_t start, phys_addr_t end)
77{ } 79{ }
78static inline void outer_clean_range(unsigned long start, unsigned long end) 80static inline void outer_clean_range(phys_addr_t start, phys_addr_t end)
79{ } 81{ }
80static inline void outer_flush_range(unsigned long start, unsigned long end) 82static inline void outer_flush_range(phys_addr_t start, phys_addr_t end)
81{ } 83{ }
82static inline void outer_flush_all(void) { } 84static inline void outer_flush_all(void) { }
83static inline void outer_inv_all(void) { } 85static inline void outer_inv_all(void) { }