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authorThierry Reding <treding@nvidia.com>2014-07-28 10:34:18 -0400
committerThierry Reding <treding@nvidia.com>2014-11-10 09:59:23 -0500
commit84c4d3a6d438f59438e15cc046fe1a7cafc9069a (patch)
tree3542e0c8719e79d0aec3cbfb91e59dcf8103d621 /arch/arm/include/asm
parent9ab3a7a0d2b417773e8e8a880fc3a69f7fc1f57a (diff)
ARM: Use include/asm-generic/io.h
Include the generic I/O header file so that duplicate implementations can be removed. This will also help to establish consistency across more architectures regarding which accessors they support. Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'arch/arm/include/asm')
-rw-r--r--arch/arm/include/asm/io.h89
-rw-r--r--arch/arm/include/asm/memory.h4
2 files changed, 40 insertions, 53 deletions
diff --git a/arch/arm/include/asm/io.h b/arch/arm/include/asm/io.h
index 180567408ee8..db58deb00aa7 100644
--- a/arch/arm/include/asm/io.h
+++ b/arch/arm/include/asm/io.h
@@ -47,13 +47,13 @@ extern void atomic_io_modify_relaxed(void __iomem *reg, u32 mask, u32 set);
47 * Generic IO read/write. These perform native-endian accesses. Note 47 * Generic IO read/write. These perform native-endian accesses. Note
48 * that some architectures will want to re-define __raw_{read,write}w. 48 * that some architectures will want to re-define __raw_{read,write}w.
49 */ 49 */
50extern void __raw_writesb(void __iomem *addr, const void *data, int bytelen); 50void __raw_writesb(volatile void __iomem *addr, const void *data, int bytelen);
51extern void __raw_writesw(void __iomem *addr, const void *data, int wordlen); 51void __raw_writesw(volatile void __iomem *addr, const void *data, int wordlen);
52extern void __raw_writesl(void __iomem *addr, const void *data, int longlen); 52void __raw_writesl(volatile void __iomem *addr, const void *data, int longlen);
53 53
54extern void __raw_readsb(const void __iomem *addr, void *data, int bytelen); 54void __raw_readsb(const volatile void __iomem *addr, void *data, int bytelen);
55extern void __raw_readsw(const void __iomem *addr, void *data, int wordlen); 55void __raw_readsw(const volatile void __iomem *addr, void *data, int wordlen);
56extern void __raw_readsl(const void __iomem *addr, void *data, int longlen); 56void __raw_readsl(const volatile void __iomem *addr, void *data, int longlen);
57 57
58#if __LINUX_ARM_ARCH__ < 6 58#if __LINUX_ARM_ARCH__ < 6
59/* 59/*
@@ -69,6 +69,7 @@ extern void __raw_readsl(const void __iomem *addr, void *data, int longlen);
69 * writeback addressing modes as these incur a significant performance 69 * writeback addressing modes as these incur a significant performance
70 * overhead (the address generation must be emulated in software). 70 * overhead (the address generation must be emulated in software).
71 */ 71 */
72#define __raw_writew __raw_writew
72static inline void __raw_writew(u16 val, volatile void __iomem *addr) 73static inline void __raw_writew(u16 val, volatile void __iomem *addr)
73{ 74{
74 asm volatile("strh %1, %0" 75 asm volatile("strh %1, %0"
@@ -76,6 +77,7 @@ static inline void __raw_writew(u16 val, volatile void __iomem *addr)
76 : "r" (val)); 77 : "r" (val));
77} 78}
78 79
80#define __raw_readw __raw_readw
79static inline u16 __raw_readw(const volatile void __iomem *addr) 81static inline u16 __raw_readw(const volatile void __iomem *addr)
80{ 82{
81 u16 val; 83 u16 val;
@@ -86,6 +88,7 @@ static inline u16 __raw_readw(const volatile void __iomem *addr)
86} 88}
87#endif 89#endif
88 90
91#define __raw_writeb __raw_writeb
89static inline void __raw_writeb(u8 val, volatile void __iomem *addr) 92static inline void __raw_writeb(u8 val, volatile void __iomem *addr)
90{ 93{
91 asm volatile("strb %1, %0" 94 asm volatile("strb %1, %0"
@@ -93,6 +96,7 @@ static inline void __raw_writeb(u8 val, volatile void __iomem *addr)
93 : "r" (val)); 96 : "r" (val));
94} 97}
95 98
99#define __raw_writel __raw_writel
96static inline void __raw_writel(u32 val, volatile void __iomem *addr) 100static inline void __raw_writel(u32 val, volatile void __iomem *addr)
97{ 101{
98 asm volatile("str %1, %0" 102 asm volatile("str %1, %0"
@@ -100,6 +104,7 @@ static inline void __raw_writel(u32 val, volatile void __iomem *addr)
100 : "r" (val)); 104 : "r" (val));
101} 105}
102 106
107#define __raw_readb __raw_readb
103static inline u8 __raw_readb(const volatile void __iomem *addr) 108static inline u8 __raw_readb(const volatile void __iomem *addr)
104{ 109{
105 u8 val; 110 u8 val;
@@ -109,6 +114,7 @@ static inline u8 __raw_readb(const volatile void __iomem *addr)
109 return val; 114 return val;
110} 115}
111 116
117#define __raw_readl __raw_readl
112static inline u32 __raw_readl(const volatile void __iomem *addr) 118static inline u32 __raw_readl(const volatile void __iomem *addr)
113{ 119{
114 u32 val; 120 u32 val;
@@ -267,20 +273,6 @@ extern int pci_ioremap_io(unsigned int offset, phys_addr_t phys_addr);
267#define insl(p,d,l) __raw_readsl(__io(p),d,l) 273#define insl(p,d,l) __raw_readsl(__io(p),d,l)
268#endif 274#endif
269 275
270#define outb_p(val,port) outb((val),(port))
271#define outw_p(val,port) outw((val),(port))
272#define outl_p(val,port) outl((val),(port))
273#define inb_p(port) inb((port))
274#define inw_p(port) inw((port))
275#define inl_p(port) inl((port))
276
277#define outsb_p(port,from,len) outsb(port,from,len)
278#define outsw_p(port,from,len) outsw(port,from,len)
279#define outsl_p(port,from,len) outsl(port,from,len)
280#define insb_p(port,to,len) insb(port,to,len)
281#define insw_p(port,to,len) insw(port,to,len)
282#define insl_p(port,to,len) insl(port,to,len)
283
284/* 276/*
285 * String version of IO memory access ops: 277 * String version of IO memory access ops:
286 */ 278 */
@@ -347,40 +339,42 @@ extern void _memset_io(volatile void __iomem *, int, size_t);
347#define iounmap __arm_iounmap 339#define iounmap __arm_iounmap
348 340
349/* 341/*
350 * io{read,write}{8,16,32} macros 342 * io{read,write}{16,32}be() macros
351 */ 343 */
352#ifndef ioread8 344#define ioread16be(p) ({ __u16 __v = be16_to_cpu((__force __be16)__raw_readw(p)); __iormb(); __v; })
353#define ioread8(p) ({ unsigned int __v = __raw_readb(p); __iormb(); __v; }) 345#define ioread32be(p) ({ __u32 __v = be32_to_cpu((__force __be32)__raw_readl(p)); __iormb(); __v; })
354#define ioread16(p) ({ unsigned int __v = le16_to_cpu((__force __le16)__raw_readw(p)); __iormb(); __v; })
355#define ioread32(p) ({ unsigned int __v = le32_to_cpu((__force __le32)__raw_readl(p)); __iormb(); __v; })
356
357#define ioread16be(p) ({ unsigned int __v = be16_to_cpu((__force __be16)__raw_readw(p)); __iormb(); __v; })
358#define ioread32be(p) ({ unsigned int __v = be32_to_cpu((__force __be32)__raw_readl(p)); __iormb(); __v; })
359
360#define iowrite8(v,p) ({ __iowmb(); __raw_writeb(v, p); })
361#define iowrite16(v,p) ({ __iowmb(); __raw_writew((__force __u16)cpu_to_le16(v), p); })
362#define iowrite32(v,p) ({ __iowmb(); __raw_writel((__force __u32)cpu_to_le32(v), p); })
363 346
364#define iowrite16be(v,p) ({ __iowmb(); __raw_writew((__force __u16)cpu_to_be16(v), p); }) 347#define iowrite16be(v,p) ({ __iowmb(); __raw_writew((__force __u16)cpu_to_be16(v), p); })
365#define iowrite32be(v,p) ({ __iowmb(); __raw_writel((__force __u32)cpu_to_be32(v), p); }) 348#define iowrite32be(v,p) ({ __iowmb(); __raw_writel((__force __u32)cpu_to_be32(v), p); })
366
367#define ioread8_rep(p,d,c) __raw_readsb(p,d,c)
368#define ioread16_rep(p,d,c) __raw_readsw(p,d,c)
369#define ioread32_rep(p,d,c) __raw_readsl(p,d,c)
370
371#define iowrite8_rep(p,s,c) __raw_writesb(p,s,c)
372#define iowrite16_rep(p,s,c) __raw_writesw(p,s,c)
373#define iowrite32_rep(p,s,c) __raw_writesl(p,s,c)
374 349
350#ifndef ioport_map
351#define ioport_map ioport_map
375extern void __iomem *ioport_map(unsigned long port, unsigned int nr); 352extern void __iomem *ioport_map(unsigned long port, unsigned int nr);
353#endif
354#ifndef ioport_unmap
355#define ioport_unmap ioport_unmap
376extern void ioport_unmap(void __iomem *addr); 356extern void ioport_unmap(void __iomem *addr);
377#endif 357#endif
378 358
379struct pci_dev; 359struct pci_dev;
380 360
361#define pci_iounmap pci_iounmap
381extern void pci_iounmap(struct pci_dev *dev, void __iomem *addr); 362extern void pci_iounmap(struct pci_dev *dev, void __iomem *addr);
382 363
383/* 364/*
365 * Convert a physical pointer to a virtual kernel pointer for /dev/mem
366 * access
367 */
368#define xlate_dev_mem_ptr(p) __va(p)
369
370/*
371 * Convert a virtual cached pointer to an uncached pointer
372 */
373#define xlate_dev_kmem_ptr(p) p
374
375#include <asm-generic/io.h>
376
377/*
384 * can the hardware map this into one segment or not, given no other 378 * can the hardware map this into one segment or not, given no other
385 * constraints. 379 * constraints.
386 */ 380 */
@@ -402,17 +396,6 @@ extern int devmem_is_allowed(unsigned long pfn);
402#endif 396#endif
403 397
404/* 398/*
405 * Convert a physical pointer to a virtual kernel pointer for /dev/mem
406 * access
407 */
408#define xlate_dev_mem_ptr(p) __va(p)
409
410/*
411 * Convert a virtual cached pointer to an uncached pointer
412 */
413#define xlate_dev_kmem_ptr(p) p
414
415/*
416 * Register ISA memory and port locations for glibc iopl/inb/outb 399 * Register ISA memory and port locations for glibc iopl/inb/outb
417 * emulation. 400 * emulation.
418 */ 401 */
diff --git a/arch/arm/include/asm/memory.h b/arch/arm/include/asm/memory.h
index e731018869a7..184def0e1652 100644
--- a/arch/arm/include/asm/memory.h
+++ b/arch/arm/include/asm/memory.h
@@ -274,11 +274,13 @@ static inline unsigned long __phys_to_virt(phys_addr_t x)
274 * translation for translating DMA addresses. Use the driver 274 * translation for translating DMA addresses. Use the driver
275 * DMA support - see dma-mapping.h. 275 * DMA support - see dma-mapping.h.
276 */ 276 */
277#define virt_to_phys virt_to_phys
277static inline phys_addr_t virt_to_phys(const volatile void *x) 278static inline phys_addr_t virt_to_phys(const volatile void *x)
278{ 279{
279 return __virt_to_phys((unsigned long)(x)); 280 return __virt_to_phys((unsigned long)(x));
280} 281}
281 282
283#define phys_to_virt phys_to_virt
282static inline void *phys_to_virt(phys_addr_t x) 284static inline void *phys_to_virt(phys_addr_t x)
283{ 285{
284 return (void *)__phys_to_virt(x); 286 return (void *)__phys_to_virt(x);
@@ -322,11 +324,13 @@ static inline phys_addr_t __virt_to_idmap(unsigned long x)
322#endif 324#endif
323 325
324#ifdef CONFIG_VIRT_TO_BUS 326#ifdef CONFIG_VIRT_TO_BUS
327#define virt_to_bus virt_to_bus
325static inline __deprecated unsigned long virt_to_bus(void *x) 328static inline __deprecated unsigned long virt_to_bus(void *x)
326{ 329{
327 return __virt_to_bus((unsigned long)x); 330 return __virt_to_bus((unsigned long)x);
328} 331}
329 332
333#define bus_to_virt bus_to_virt
330static inline __deprecated void *bus_to_virt(unsigned long x) 334static inline __deprecated void *bus_to_virt(unsigned long x)
331{ 335{
332 return (void *)__bus_to_virt(x); 336 return (void *)__bus_to_virt(x);