diff options
author | Ard Biesheuvel <ard.biesheuvel@linaro.org> | 2015-03-10 04:47:44 -0400 |
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committer | Herbert Xu <herbert@gondor.apana.org.au> | 2015-03-12 06:13:35 -0400 |
commit | 652ccae5cc4e1305fb0a4619947f9ee89d8c7f5a (patch) | |
tree | 77825d76286e6e48628784aec071bf226747de61 /arch/arm/crypto | |
parent | 1eb8a1b340e2f0a562b4987683bbaee4d620bf0a (diff) |
crypto: arm - move ARM specific Kconfig definitions to a dedicated file
This moves all Kconfig symbols defined in crypto/Kconfig that depend
on CONFIG_ARM to a dedicated Kconfig file in arch/arm/crypto, which is
where the code that implements those features resides as well.
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Diffstat (limited to 'arch/arm/crypto')
-rw-r--r-- | arch/arm/crypto/Kconfig | 85 |
1 files changed, 85 insertions, 0 deletions
diff --git a/arch/arm/crypto/Kconfig b/arch/arm/crypto/Kconfig new file mode 100644 index 000000000000..66fe82857e99 --- /dev/null +++ b/arch/arm/crypto/Kconfig | |||
@@ -0,0 +1,85 @@ | |||
1 | |||
2 | menuconfig ARM_CRYPTO | ||
3 | bool "ARM Accelerated Cryptographic Algorithms" | ||
4 | depends on ARM | ||
5 | help | ||
6 | Say Y here to choose from a selection of cryptographic algorithms | ||
7 | implemented using ARM specific CPU features or instructions. | ||
8 | |||
9 | if ARM_CRYPTO | ||
10 | |||
11 | config CRYPTO_SHA1_ARM | ||
12 | tristate "SHA1 digest algorithm (ARM-asm)" | ||
13 | select CRYPTO_SHA1 | ||
14 | select CRYPTO_HASH | ||
15 | help | ||
16 | SHA-1 secure hash standard (FIPS 180-1/DFIPS 180-2) implemented | ||
17 | using optimized ARM assembler. | ||
18 | |||
19 | config CRYPTO_SHA1_ARM_NEON | ||
20 | tristate "SHA1 digest algorithm (ARM NEON)" | ||
21 | depends on KERNEL_MODE_NEON | ||
22 | select CRYPTO_SHA1_ARM | ||
23 | select CRYPTO_SHA1 | ||
24 | select CRYPTO_HASH | ||
25 | help | ||
26 | SHA-1 secure hash standard (FIPS 180-1/DFIPS 180-2) implemented | ||
27 | using optimized ARM NEON assembly, when NEON instructions are | ||
28 | available. | ||
29 | |||
30 | config CRYPTO_SHA512_ARM_NEON | ||
31 | tristate "SHA384 and SHA512 digest algorithm (ARM NEON)" | ||
32 | depends on KERNEL_MODE_NEON | ||
33 | select CRYPTO_SHA512 | ||
34 | select CRYPTO_HASH | ||
35 | help | ||
36 | SHA-512 secure hash standard (DFIPS 180-2) implemented | ||
37 | using ARM NEON instructions, when available. | ||
38 | |||
39 | This version of SHA implements a 512 bit hash with 256 bits of | ||
40 | security against collision attacks. | ||
41 | |||
42 | This code also includes SHA-384, a 384 bit hash with 192 bits | ||
43 | of security against collision attacks. | ||
44 | |||
45 | config CRYPTO_AES_ARM | ||
46 | tristate "AES cipher algorithms (ARM-asm)" | ||
47 | depends on ARM | ||
48 | select CRYPTO_ALGAPI | ||
49 | select CRYPTO_AES | ||
50 | help | ||
51 | Use optimized AES assembler routines for ARM platforms. | ||
52 | |||
53 | AES cipher algorithms (FIPS-197). AES uses the Rijndael | ||
54 | algorithm. | ||
55 | |||
56 | Rijndael appears to be consistently a very good performer in | ||
57 | both hardware and software across a wide range of computing | ||
58 | environments regardless of its use in feedback or non-feedback | ||
59 | modes. Its key setup time is excellent, and its key agility is | ||
60 | good. Rijndael's very low memory requirements make it very well | ||
61 | suited for restricted-space environments, in which it also | ||
62 | demonstrates excellent performance. Rijndael's operations are | ||
63 | among the easiest to defend against power and timing attacks. | ||
64 | |||
65 | The AES specifies three key sizes: 128, 192 and 256 bits | ||
66 | |||
67 | See <http://csrc.nist.gov/encryption/aes/> for more information. | ||
68 | |||
69 | config CRYPTO_AES_ARM_BS | ||
70 | tristate "Bit sliced AES using NEON instructions" | ||
71 | depends on KERNEL_MODE_NEON | ||
72 | select CRYPTO_ALGAPI | ||
73 | select CRYPTO_AES_ARM | ||
74 | select CRYPTO_ABLK_HELPER | ||
75 | help | ||
76 | Use a faster and more secure NEON based implementation of AES in CBC, | ||
77 | CTR and XTS modes | ||
78 | |||
79 | Bit sliced AES gives around 45% speedup on Cortex-A15 for CTR mode | ||
80 | and for XTS mode encryption, CBC and XTS mode decryption speedup is | ||
81 | around 25%. (CBC encryption speed is not affected by this driver.) | ||
82 | This implementation does not rely on any lookup tables so it is | ||
83 | believed to be invulnerable to cache timing attacks. | ||
84 | |||
85 | endif | ||