diff options
author | Linus Torvalds <torvalds@linux-foundation.org> | 2012-03-27 21:17:02 -0400 |
---|---|---|
committer | Linus Torvalds <torvalds@linux-foundation.org> | 2012-03-27 21:17:02 -0400 |
commit | 9e4db1c3eed55c22328d8022c2c80adb3093833f (patch) | |
tree | 9643545e6bd182f1d3e19942f590a6a1e3198320 /arch/arm/common | |
parent | de8856d2c11f562c60ed9340a83db4a4f829a6e6 (diff) | |
parent | aae528d9a8ad79d4b21b1b723abc9447fdb0d200 (diff) |
Merge branch 'platforms' of git://git.linaro.org/people/rmk/linux-arm
Pull ARM platform updates from Russell King:
"This covers platform stuff for platforms I have a direct interest in
(iow, I have the hardware). Essentially:
- as we no longer support any other Acorn platforms other than RiscPC
anymore, we can collect all that code into mach-rpc.
- convert Acorn expansion card stuff to use IRQ allocation functions,
and get rid of NO_IRQ from there.
- cleanups to the ebsa110 platform to move some private stuff out of
its header files.
- large amount of SA11x0 updates:
- conversion of private DMA implementation to DMA engine support
(this actually gives us greater flexibility in drivers over the old
API.)
- re-worked ucb1x00 updates - convert to genirq, remove sa11x0
dependencies, fix various minor issues
- move platform specific sa11x0 framebuffer data into platform files
in arch/arm instead of keeping this in the driver itself
- update sa11x0 IrDA driver for DMA engine, and allow it to use DMA
for SIR transmissions as well as FIR
- rework sa1111 support for genirq, and irq allocation
- fix sa1111 IRQ support so it works again
- use sparse IRQ support
After this, I have one more pull request remaining from my current
set, which I think is going to be the most problematical as it
generates 8 conflicts."
Fixed up the trivial conflict in arch/arm/mach-rpc/Makefile as per
Russell.
* 'platforms' of git://git.linaro.org/people/rmk/linux-arm: (125 commits)
ARM: 7343/1: sa11x0: convert to sparse IRQ
ARM: 7342/2: sa1100: prepare for sparse irq conversion
ARM: 7341/1: input: prepare jornada720 keyboard and ts for sa11x0 sparse irq
ARM: 7340/1: rtc: sa1100: include mach/irqs.h instead of asm/irq.h
ARM: sa11x0: remove unused DMA controller definitions
ARM: sa11x0: remove old SoC private DMA driver
USB: sa1111: add hcd .reset method
USB: sa1111: add OHCI shutdown methods
USB: sa1111: reorganize ohci-sa1111.c
USB: sa1111: get rid of nasty printk(KERN_DEBUG "%s: ...", __FILE__)
USB: sa1111: sparse and checkpatch cleanups
ARM: sa11x0: don't static map sa1111
ARM: sa1111: use dev_err() rather than printk()
ARM: sa1111: cleanup sub-device registration and unregistration
ARM: sa1111: only setup DMA for DMA capable devices
ARM: sa1111: register sa1111 devices with dmabounce in bus notifier
ARM: sa1111: move USB interface register definitions to ohci-sa1111.c
ARM: sa1111: move PCMCIA interface register definitions to sa1111_generic.c
ARM: sa1111: move PS/2 interface register definitions to sa1111p2.c
ARM: sa1111: delete unused physical GPIO register definitions
...
Diffstat (limited to 'arch/arm/common')
-rw-r--r-- | arch/arm/common/Kconfig | 3 | ||||
-rw-r--r-- | arch/arm/common/Makefile | 1 | ||||
-rw-r--r-- | arch/arm/common/sa1111.c | 281 | ||||
-rw-r--r-- | arch/arm/common/time-acorn.c | 95 |
4 files changed, 185 insertions, 195 deletions
diff --git a/arch/arm/common/Kconfig b/arch/arm/common/Kconfig index 81a933eb0903..3bb1d7589bd9 100644 --- a/arch/arm/common/Kconfig +++ b/arch/arm/common/Kconfig | |||
@@ -35,9 +35,6 @@ config DMABOUNCE | |||
35 | bool | 35 | bool |
36 | select ZONE_DMA | 36 | select ZONE_DMA |
37 | 37 | ||
38 | config TIMER_ACORN | ||
39 | bool | ||
40 | |||
41 | config SHARP_LOCOMO | 38 | config SHARP_LOCOMO |
42 | bool | 39 | bool |
43 | 40 | ||
diff --git a/arch/arm/common/Makefile b/arch/arm/common/Makefile index 6ea9b6f3607a..69feafe7286c 100644 --- a/arch/arm/common/Makefile +++ b/arch/arm/common/Makefile | |||
@@ -9,7 +9,6 @@ obj-$(CONFIG_PL330) += pl330.o | |||
9 | obj-$(CONFIG_SA1111) += sa1111.o | 9 | obj-$(CONFIG_SA1111) += sa1111.o |
10 | obj-$(CONFIG_PCI_HOST_VIA82C505) += via82c505.o | 10 | obj-$(CONFIG_PCI_HOST_VIA82C505) += via82c505.o |
11 | obj-$(CONFIG_DMABOUNCE) += dmabounce.o | 11 | obj-$(CONFIG_DMABOUNCE) += dmabounce.o |
12 | obj-$(CONFIG_TIMER_ACORN) += time-acorn.o | ||
13 | obj-$(CONFIG_SHARP_LOCOMO) += locomo.o | 12 | obj-$(CONFIG_SHARP_LOCOMO) += locomo.o |
14 | obj-$(CONFIG_SHARP_PARAM) += sharpsl_param.o | 13 | obj-$(CONFIG_SHARP_PARAM) += sharpsl_param.o |
15 | obj-$(CONFIG_SHARP_SCOOP) += scoop.o | 14 | obj-$(CONFIG_SHARP_SCOOP) += scoop.o |
diff --git a/arch/arm/common/sa1111.c b/arch/arm/common/sa1111.c index 61691cdbdcf2..9173d112ea01 100644 --- a/arch/arm/common/sa1111.c +++ b/arch/arm/common/sa1111.c | |||
@@ -16,6 +16,7 @@ | |||
16 | */ | 16 | */ |
17 | #include <linux/module.h> | 17 | #include <linux/module.h> |
18 | #include <linux/init.h> | 18 | #include <linux/init.h> |
19 | #include <linux/irq.h> | ||
19 | #include <linux/kernel.h> | 20 | #include <linux/kernel.h> |
20 | #include <linux/delay.h> | 21 | #include <linux/delay.h> |
21 | #include <linux/errno.h> | 22 | #include <linux/errno.h> |
@@ -28,9 +29,8 @@ | |||
28 | #include <linux/io.h> | 29 | #include <linux/io.h> |
29 | 30 | ||
30 | #include <mach/hardware.h> | 31 | #include <mach/hardware.h> |
31 | #include <asm/mach-types.h> | ||
32 | #include <asm/irq.h> | ||
33 | #include <asm/mach/irq.h> | 32 | #include <asm/mach/irq.h> |
33 | #include <asm/mach-types.h> | ||
34 | #include <asm/sizes.h> | 34 | #include <asm/sizes.h> |
35 | 35 | ||
36 | #include <asm/hardware/sa1111.h> | 36 | #include <asm/hardware/sa1111.h> |
@@ -86,8 +86,10 @@ | |||
86 | #define IRQ_S1_CD_VALID (52) | 86 | #define IRQ_S1_CD_VALID (52) |
87 | #define IRQ_S0_BVD1_STSCHG (53) | 87 | #define IRQ_S0_BVD1_STSCHG (53) |
88 | #define IRQ_S1_BVD1_STSCHG (54) | 88 | #define IRQ_S1_BVD1_STSCHG (54) |
89 | #define SA1111_IRQ_NR (55) | ||
89 | 90 | ||
90 | extern void __init sa1110_mb_enable(void); | 91 | extern void sa1110_mb_enable(void); |
92 | extern void sa1110_mb_disable(void); | ||
91 | 93 | ||
92 | /* | 94 | /* |
93 | * We keep the following data for the overall SA1111. Note that the | 95 | * We keep the following data for the overall SA1111. Note that the |
@@ -104,6 +106,7 @@ struct sa1111 { | |||
104 | int irq_base; /* base for cascaded on-chip IRQs */ | 106 | int irq_base; /* base for cascaded on-chip IRQs */ |
105 | spinlock_t lock; | 107 | spinlock_t lock; |
106 | void __iomem *base; | 108 | void __iomem *base; |
109 | struct sa1111_platform_data *pdata; | ||
107 | #ifdef CONFIG_PM | 110 | #ifdef CONFIG_PM |
108 | void *saved_state; | 111 | void *saved_state; |
109 | #endif | 112 | #endif |
@@ -118,6 +121,7 @@ static struct sa1111 *g_sa1111; | |||
118 | struct sa1111_dev_info { | 121 | struct sa1111_dev_info { |
119 | unsigned long offset; | 122 | unsigned long offset; |
120 | unsigned long skpcr_mask; | 123 | unsigned long skpcr_mask; |
124 | bool dma; | ||
121 | unsigned int devid; | 125 | unsigned int devid; |
122 | unsigned int irq[6]; | 126 | unsigned int irq[6]; |
123 | }; | 127 | }; |
@@ -126,6 +130,7 @@ static struct sa1111_dev_info sa1111_devices[] = { | |||
126 | { | 130 | { |
127 | .offset = SA1111_USB, | 131 | .offset = SA1111_USB, |
128 | .skpcr_mask = SKPCR_UCLKEN, | 132 | .skpcr_mask = SKPCR_UCLKEN, |
133 | .dma = true, | ||
129 | .devid = SA1111_DEVID_USB, | 134 | .devid = SA1111_DEVID_USB, |
130 | .irq = { | 135 | .irq = { |
131 | IRQ_USBPWR, | 136 | IRQ_USBPWR, |
@@ -139,6 +144,7 @@ static struct sa1111_dev_info sa1111_devices[] = { | |||
139 | { | 144 | { |
140 | .offset = 0x0600, | 145 | .offset = 0x0600, |
141 | .skpcr_mask = SKPCR_I2SCLKEN | SKPCR_L3CLKEN, | 146 | .skpcr_mask = SKPCR_I2SCLKEN | SKPCR_L3CLKEN, |
147 | .dma = true, | ||
142 | .devid = SA1111_DEVID_SAC, | 148 | .devid = SA1111_DEVID_SAC, |
143 | .irq = { | 149 | .irq = { |
144 | AUDXMTDMADONEA, | 150 | AUDXMTDMADONEA, |
@@ -155,7 +161,7 @@ static struct sa1111_dev_info sa1111_devices[] = { | |||
155 | { | 161 | { |
156 | .offset = SA1111_KBD, | 162 | .offset = SA1111_KBD, |
157 | .skpcr_mask = SKPCR_PTCLKEN, | 163 | .skpcr_mask = SKPCR_PTCLKEN, |
158 | .devid = SA1111_DEVID_PS2, | 164 | .devid = SA1111_DEVID_PS2_KBD, |
159 | .irq = { | 165 | .irq = { |
160 | IRQ_TPRXINT, | 166 | IRQ_TPRXINT, |
161 | IRQ_TPTXINT | 167 | IRQ_TPTXINT |
@@ -164,7 +170,7 @@ static struct sa1111_dev_info sa1111_devices[] = { | |||
164 | { | 170 | { |
165 | .offset = SA1111_MSE, | 171 | .offset = SA1111_MSE, |
166 | .skpcr_mask = SKPCR_PMCLKEN, | 172 | .skpcr_mask = SKPCR_PMCLKEN, |
167 | .devid = SA1111_DEVID_PS2, | 173 | .devid = SA1111_DEVID_PS2_MSE, |
168 | .irq = { | 174 | .irq = { |
169 | IRQ_MSRXINT, | 175 | IRQ_MSRXINT, |
170 | IRQ_MSTXINT | 176 | IRQ_MSTXINT |
@@ -434,16 +440,28 @@ static struct irq_chip sa1111_high_chip = { | |||
434 | .irq_set_wake = sa1111_wake_highirq, | 440 | .irq_set_wake = sa1111_wake_highirq, |
435 | }; | 441 | }; |
436 | 442 | ||
437 | static void sa1111_setup_irq(struct sa1111 *sachip) | 443 | static int sa1111_setup_irq(struct sa1111 *sachip, unsigned irq_base) |
438 | { | 444 | { |
439 | void __iomem *irqbase = sachip->base + SA1111_INTC; | 445 | void __iomem *irqbase = sachip->base + SA1111_INTC; |
440 | unsigned int irq; | 446 | unsigned i, irq; |
447 | int ret; | ||
441 | 448 | ||
442 | /* | 449 | /* |
443 | * We're guaranteed that this region hasn't been taken. | 450 | * We're guaranteed that this region hasn't been taken. |
444 | */ | 451 | */ |
445 | request_mem_region(sachip->phys + SA1111_INTC, 512, "irq"); | 452 | request_mem_region(sachip->phys + SA1111_INTC, 512, "irq"); |
446 | 453 | ||
454 | ret = irq_alloc_descs(-1, irq_base, SA1111_IRQ_NR, -1); | ||
455 | if (ret <= 0) { | ||
456 | dev_err(sachip->dev, "unable to allocate %u irqs: %d\n", | ||
457 | SA1111_IRQ_NR, ret); | ||
458 | if (ret == 0) | ||
459 | ret = -EINVAL; | ||
460 | return ret; | ||
461 | } | ||
462 | |||
463 | sachip->irq_base = ret; | ||
464 | |||
447 | /* disable all IRQs */ | 465 | /* disable all IRQs */ |
448 | sa1111_writel(0, irqbase + SA1111_INTEN0); | 466 | sa1111_writel(0, irqbase + SA1111_INTEN0); |
449 | sa1111_writel(0, irqbase + SA1111_INTEN1); | 467 | sa1111_writel(0, irqbase + SA1111_INTEN1); |
@@ -463,14 +481,16 @@ static void sa1111_setup_irq(struct sa1111 *sachip) | |||
463 | sa1111_writel(~0, irqbase + SA1111_INTSTATCLR0); | 481 | sa1111_writel(~0, irqbase + SA1111_INTSTATCLR0); |
464 | sa1111_writel(~0, irqbase + SA1111_INTSTATCLR1); | 482 | sa1111_writel(~0, irqbase + SA1111_INTSTATCLR1); |
465 | 483 | ||
466 | for (irq = IRQ_GPAIN0; irq <= SSPROR; irq++) { | 484 | for (i = IRQ_GPAIN0; i <= SSPROR; i++) { |
485 | irq = sachip->irq_base + i; | ||
467 | irq_set_chip_and_handler(irq, &sa1111_low_chip, | 486 | irq_set_chip_and_handler(irq, &sa1111_low_chip, |
468 | handle_edge_irq); | 487 | handle_edge_irq); |
469 | irq_set_chip_data(irq, sachip); | 488 | irq_set_chip_data(irq, sachip); |
470 | set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); | 489 | set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); |
471 | } | 490 | } |
472 | 491 | ||
473 | for (irq = AUDXMTDMADONEA; irq <= IRQ_S1_BVD1_STSCHG; irq++) { | 492 | for (i = AUDXMTDMADONEA; i <= IRQ_S1_BVD1_STSCHG; i++) { |
493 | irq = sachip->irq_base + i; | ||
474 | irq_set_chip_and_handler(irq, &sa1111_high_chip, | 494 | irq_set_chip_and_handler(irq, &sa1111_high_chip, |
475 | handle_edge_irq); | 495 | handle_edge_irq); |
476 | irq_set_chip_data(irq, sachip); | 496 | irq_set_chip_data(irq, sachip); |
@@ -483,6 +503,11 @@ static void sa1111_setup_irq(struct sa1111 *sachip) | |||
483 | irq_set_irq_type(sachip->irq, IRQ_TYPE_EDGE_RISING); | 503 | irq_set_irq_type(sachip->irq, IRQ_TYPE_EDGE_RISING); |
484 | irq_set_handler_data(sachip->irq, sachip); | 504 | irq_set_handler_data(sachip->irq, sachip); |
485 | irq_set_chained_handler(sachip->irq, sa1111_irq_handler); | 505 | irq_set_chained_handler(sachip->irq, sa1111_irq_handler); |
506 | |||
507 | dev_info(sachip->dev, "Providing IRQ%u-%u\n", | ||
508 | sachip->irq_base, sachip->irq_base + SA1111_IRQ_NR - 1); | ||
509 | |||
510 | return 0; | ||
486 | } | 511 | } |
487 | 512 | ||
488 | /* | 513 | /* |
@@ -581,41 +606,10 @@ sa1111_configure_smc(struct sa1111 *sachip, int sdram, unsigned int drac, | |||
581 | } | 606 | } |
582 | #endif | 607 | #endif |
583 | 608 | ||
584 | #ifdef CONFIG_DMABOUNCE | ||
585 | /* | ||
586 | * According to the "Intel StrongARM SA-1111 Microprocessor Companion | ||
587 | * Chip Specification Update" (June 2000), erratum #7, there is a | ||
588 | * significant bug in the SA1111 SDRAM shared memory controller. If | ||
589 | * an access to a region of memory above 1MB relative to the bank base, | ||
590 | * it is important that address bit 10 _NOT_ be asserted. Depending | ||
591 | * on the configuration of the RAM, bit 10 may correspond to one | ||
592 | * of several different (processor-relative) address bits. | ||
593 | * | ||
594 | * This routine only identifies whether or not a given DMA address | ||
595 | * is susceptible to the bug. | ||
596 | * | ||
597 | * This should only get called for sa1111_device types due to the | ||
598 | * way we configure our device dma_masks. | ||
599 | */ | ||
600 | static int sa1111_needs_bounce(struct device *dev, dma_addr_t addr, size_t size) | ||
601 | { | ||
602 | /* | ||
603 | * Section 4.6 of the "Intel StrongARM SA-1111 Development Module | ||
604 | * User's Guide" mentions that jumpers R51 and R52 control the | ||
605 | * target of SA-1111 DMA (either SDRAM bank 0 on Assabet, or | ||
606 | * SDRAM bank 1 on Neponset). The default configuration selects | ||
607 | * Assabet, so any address in bank 1 is necessarily invalid. | ||
608 | */ | ||
609 | return (machine_is_assabet() || machine_is_pfs168()) && | ||
610 | (addr >= 0xc8000000 || (addr + size) >= 0xc8000000); | ||
611 | } | ||
612 | #endif | ||
613 | |||
614 | static void sa1111_dev_release(struct device *_dev) | 609 | static void sa1111_dev_release(struct device *_dev) |
615 | { | 610 | { |
616 | struct sa1111_dev *dev = SA1111_DEV(_dev); | 611 | struct sa1111_dev *dev = SA1111_DEV(_dev); |
617 | 612 | ||
618 | release_resource(&dev->res); | ||
619 | kfree(dev); | 613 | kfree(dev); |
620 | } | 614 | } |
621 | 615 | ||
@@ -624,67 +618,58 @@ sa1111_init_one_child(struct sa1111 *sachip, struct resource *parent, | |||
624 | struct sa1111_dev_info *info) | 618 | struct sa1111_dev_info *info) |
625 | { | 619 | { |
626 | struct sa1111_dev *dev; | 620 | struct sa1111_dev *dev; |
621 | unsigned i; | ||
627 | int ret; | 622 | int ret; |
628 | 623 | ||
629 | dev = kzalloc(sizeof(struct sa1111_dev), GFP_KERNEL); | 624 | dev = kzalloc(sizeof(struct sa1111_dev), GFP_KERNEL); |
630 | if (!dev) { | 625 | if (!dev) { |
631 | ret = -ENOMEM; | 626 | ret = -ENOMEM; |
632 | goto out; | 627 | goto err_alloc; |
633 | } | 628 | } |
634 | 629 | ||
630 | device_initialize(&dev->dev); | ||
635 | dev_set_name(&dev->dev, "%4.4lx", info->offset); | 631 | dev_set_name(&dev->dev, "%4.4lx", info->offset); |
636 | dev->devid = info->devid; | 632 | dev->devid = info->devid; |
637 | dev->dev.parent = sachip->dev; | 633 | dev->dev.parent = sachip->dev; |
638 | dev->dev.bus = &sa1111_bus_type; | 634 | dev->dev.bus = &sa1111_bus_type; |
639 | dev->dev.release = sa1111_dev_release; | 635 | dev->dev.release = sa1111_dev_release; |
640 | dev->dev.coherent_dma_mask = sachip->dev->coherent_dma_mask; | ||
641 | dev->res.start = sachip->phys + info->offset; | 636 | dev->res.start = sachip->phys + info->offset; |
642 | dev->res.end = dev->res.start + 511; | 637 | dev->res.end = dev->res.start + 511; |
643 | dev->res.name = dev_name(&dev->dev); | 638 | dev->res.name = dev_name(&dev->dev); |
644 | dev->res.flags = IORESOURCE_MEM; | 639 | dev->res.flags = IORESOURCE_MEM; |
645 | dev->mapbase = sachip->base + info->offset; | 640 | dev->mapbase = sachip->base + info->offset; |
646 | dev->skpcr_mask = info->skpcr_mask; | 641 | dev->skpcr_mask = info->skpcr_mask; |
647 | memmove(dev->irq, info->irq, sizeof(dev->irq)); | ||
648 | |||
649 | ret = request_resource(parent, &dev->res); | ||
650 | if (ret) { | ||
651 | printk("SA1111: failed to allocate resource for %s\n", | ||
652 | dev->res.name); | ||
653 | dev_set_name(&dev->dev, NULL); | ||
654 | kfree(dev); | ||
655 | goto out; | ||
656 | } | ||
657 | |||
658 | 642 | ||
659 | ret = device_register(&dev->dev); | 643 | for (i = 0; i < ARRAY_SIZE(info->irq); i++) |
660 | if (ret) { | 644 | dev->irq[i] = sachip->irq_base + info->irq[i]; |
661 | release_resource(&dev->res); | ||
662 | kfree(dev); | ||
663 | goto out; | ||
664 | } | ||
665 | 645 | ||
666 | #ifdef CONFIG_DMABOUNCE | ||
667 | /* | 646 | /* |
668 | * If the parent device has a DMA mask associated with it, | 647 | * If the parent device has a DMA mask associated with it, and |
669 | * propagate it down to the children. | 648 | * this child supports DMA, propagate it down to the children. |
670 | */ | 649 | */ |
671 | if (sachip->dev->dma_mask) { | 650 | if (info->dma && sachip->dev->dma_mask) { |
672 | dev->dma_mask = *sachip->dev->dma_mask; | 651 | dev->dma_mask = *sachip->dev->dma_mask; |
673 | dev->dev.dma_mask = &dev->dma_mask; | 652 | dev->dev.dma_mask = &dev->dma_mask; |
653 | dev->dev.coherent_dma_mask = sachip->dev->coherent_dma_mask; | ||
654 | } | ||
674 | 655 | ||
675 | if (dev->dma_mask != 0xffffffffUL) { | 656 | ret = request_resource(parent, &dev->res); |
676 | ret = dmabounce_register_dev(&dev->dev, 1024, 4096, | 657 | if (ret) { |
677 | sa1111_needs_bounce); | 658 | dev_err(sachip->dev, "failed to allocate resource for %s\n", |
678 | if (ret) { | 659 | dev->res.name); |
679 | dev_err(&dev->dev, "SA1111: Failed to register" | 660 | goto err_resource; |
680 | " with dmabounce\n"); | ||
681 | device_unregister(&dev->dev); | ||
682 | } | ||
683 | } | ||
684 | } | 661 | } |
685 | #endif | ||
686 | 662 | ||
687 | out: | 663 | ret = device_add(&dev->dev); |
664 | if (ret) | ||
665 | goto err_add; | ||
666 | return 0; | ||
667 | |||
668 | err_add: | ||
669 | release_resource(&dev->res); | ||
670 | err_resource: | ||
671 | put_device(&dev->dev); | ||
672 | err_alloc: | ||
688 | return ret; | 673 | return ret; |
689 | } | 674 | } |
690 | 675 | ||
@@ -698,16 +683,21 @@ out: | |||
698 | * Returns: | 683 | * Returns: |
699 | * %-ENODEV device not found. | 684 | * %-ENODEV device not found. |
700 | * %-EBUSY physical address already marked in-use. | 685 | * %-EBUSY physical address already marked in-use. |
686 | * %-EINVAL no platform data passed | ||
701 | * %0 successful. | 687 | * %0 successful. |
702 | */ | 688 | */ |
703 | static int __devinit | 689 | static int __devinit |
704 | __sa1111_probe(struct device *me, struct resource *mem, int irq) | 690 | __sa1111_probe(struct device *me, struct resource *mem, int irq) |
705 | { | 691 | { |
692 | struct sa1111_platform_data *pd = me->platform_data; | ||
706 | struct sa1111 *sachip; | 693 | struct sa1111 *sachip; |
707 | unsigned long id; | 694 | unsigned long id; |
708 | unsigned int has_devs; | 695 | unsigned int has_devs; |
709 | int i, ret = -ENODEV; | 696 | int i, ret = -ENODEV; |
710 | 697 | ||
698 | if (!pd) | ||
699 | return -EINVAL; | ||
700 | |||
711 | sachip = kzalloc(sizeof(struct sa1111), GFP_KERNEL); | 701 | sachip = kzalloc(sizeof(struct sa1111), GFP_KERNEL); |
712 | if (!sachip) | 702 | if (!sachip) |
713 | return -ENOMEM; | 703 | return -ENOMEM; |
@@ -727,6 +717,7 @@ __sa1111_probe(struct device *me, struct resource *mem, int irq) | |||
727 | sachip->dev = me; | 717 | sachip->dev = me; |
728 | dev_set_drvdata(sachip->dev, sachip); | 718 | dev_set_drvdata(sachip->dev, sachip); |
729 | 719 | ||
720 | sachip->pdata = pd; | ||
730 | sachip->phys = mem->start; | 721 | sachip->phys = mem->start; |
731 | sachip->irq = irq; | 722 | sachip->irq = irq; |
732 | 723 | ||
@@ -759,6 +750,16 @@ __sa1111_probe(struct device *me, struct resource *mem, int irq) | |||
759 | */ | 750 | */ |
760 | sa1111_wake(sachip); | 751 | sa1111_wake(sachip); |
761 | 752 | ||
753 | /* | ||
754 | * The interrupt controller must be initialised before any | ||
755 | * other device to ensure that the interrupts are available. | ||
756 | */ | ||
757 | if (sachip->irq != NO_IRQ) { | ||
758 | ret = sa1111_setup_irq(sachip, pd->irq_base); | ||
759 | if (ret) | ||
760 | goto err_unmap; | ||
761 | } | ||
762 | |||
762 | #ifdef CONFIG_ARCH_SA1100 | 763 | #ifdef CONFIG_ARCH_SA1100 |
763 | { | 764 | { |
764 | unsigned int val; | 765 | unsigned int val; |
@@ -789,24 +790,14 @@ __sa1111_probe(struct device *me, struct resource *mem, int irq) | |||
789 | } | 790 | } |
790 | #endif | 791 | #endif |
791 | 792 | ||
792 | /* | ||
793 | * The interrupt controller must be initialised before any | ||
794 | * other device to ensure that the interrupts are available. | ||
795 | */ | ||
796 | if (sachip->irq != NO_IRQ) | ||
797 | sa1111_setup_irq(sachip); | ||
798 | |||
799 | g_sa1111 = sachip; | 793 | g_sa1111 = sachip; |
800 | 794 | ||
801 | has_devs = ~0; | 795 | has_devs = ~0; |
802 | if (machine_is_assabet() || machine_is_jornada720() || | 796 | if (pd) |
803 | machine_is_badge4()) | 797 | has_devs &= ~pd->disable_devs; |
804 | has_devs &= ~(1 << 4); | ||
805 | else | ||
806 | has_devs &= ~(1 << 1); | ||
807 | 798 | ||
808 | for (i = 0; i < ARRAY_SIZE(sa1111_devices); i++) | 799 | for (i = 0; i < ARRAY_SIZE(sa1111_devices); i++) |
809 | if (has_devs & (1 << i)) | 800 | if (sa1111_devices[i].devid & has_devs) |
810 | sa1111_init_one_child(sachip, mem, &sa1111_devices[i]); | 801 | sa1111_init_one_child(sachip, mem, &sa1111_devices[i]); |
811 | 802 | ||
812 | return 0; | 803 | return 0; |
@@ -824,7 +815,10 @@ __sa1111_probe(struct device *me, struct resource *mem, int irq) | |||
824 | 815 | ||
825 | static int sa1111_remove_one(struct device *dev, void *data) | 816 | static int sa1111_remove_one(struct device *dev, void *data) |
826 | { | 817 | { |
827 | device_unregister(dev); | 818 | struct sa1111_dev *sadev = SA1111_DEV(dev); |
819 | device_del(&sadev->dev); | ||
820 | release_resource(&sadev->res); | ||
821 | put_device(&sadev->dev); | ||
828 | return 0; | 822 | return 0; |
829 | } | 823 | } |
830 | 824 | ||
@@ -846,6 +840,7 @@ static void __sa1111_remove(struct sa1111 *sachip) | |||
846 | if (sachip->irq != NO_IRQ) { | 840 | if (sachip->irq != NO_IRQ) { |
847 | irq_set_chained_handler(sachip->irq, NULL); | 841 | irq_set_chained_handler(sachip->irq, NULL); |
848 | irq_set_handler_data(sachip->irq, NULL); | 842 | irq_set_handler_data(sachip->irq, NULL); |
843 | irq_free_descs(sachip->irq_base, SA1111_IRQ_NR); | ||
849 | 844 | ||
850 | release_mem_region(sachip->phys + SA1111_INTC, 512); | 845 | release_mem_region(sachip->phys + SA1111_INTC, 512); |
851 | } | 846 | } |
@@ -904,6 +899,9 @@ static int sa1111_suspend(struct platform_device *dev, pm_message_t state) | |||
904 | save->skpwm0 = sa1111_readl(base + SA1111_SKPWM0); | 899 | save->skpwm0 = sa1111_readl(base + SA1111_SKPWM0); |
905 | save->skpwm1 = sa1111_readl(base + SA1111_SKPWM1); | 900 | save->skpwm1 = sa1111_readl(base + SA1111_SKPWM1); |
906 | 901 | ||
902 | sa1111_writel(0, sachip->base + SA1111_SKPWM0); | ||
903 | sa1111_writel(0, sachip->base + SA1111_SKPWM1); | ||
904 | |||
907 | base = sachip->base + SA1111_INTC; | 905 | base = sachip->base + SA1111_INTC; |
908 | save->intpol0 = sa1111_readl(base + SA1111_INTPOL0); | 906 | save->intpol0 = sa1111_readl(base + SA1111_INTPOL0); |
909 | save->intpol1 = sa1111_readl(base + SA1111_INTPOL1); | 907 | save->intpol1 = sa1111_readl(base + SA1111_INTPOL1); |
@@ -919,13 +917,15 @@ static int sa1111_suspend(struct platform_device *dev, pm_message_t state) | |||
919 | */ | 917 | */ |
920 | val = sa1111_readl(sachip->base + SA1111_SKCR); | 918 | val = sa1111_readl(sachip->base + SA1111_SKCR); |
921 | sa1111_writel(val | SKCR_SLEEP, sachip->base + SA1111_SKCR); | 919 | sa1111_writel(val | SKCR_SLEEP, sachip->base + SA1111_SKCR); |
922 | sa1111_writel(0, sachip->base + SA1111_SKPWM0); | ||
923 | sa1111_writel(0, sachip->base + SA1111_SKPWM1); | ||
924 | 920 | ||
925 | clk_disable(sachip->clk); | 921 | clk_disable(sachip->clk); |
926 | 922 | ||
927 | spin_unlock_irqrestore(&sachip->lock, flags); | 923 | spin_unlock_irqrestore(&sachip->lock, flags); |
928 | 924 | ||
925 | #ifdef CONFIG_ARCH_SA1100 | ||
926 | sa1110_mb_disable(); | ||
927 | #endif | ||
928 | |||
929 | return 0; | 929 | return 0; |
930 | } | 930 | } |
931 | 931 | ||
@@ -966,6 +966,11 @@ static int sa1111_resume(struct platform_device *dev) | |||
966 | */ | 966 | */ |
967 | sa1111_wake(sachip); | 967 | sa1111_wake(sachip); |
968 | 968 | ||
969 | #ifdef CONFIG_ARCH_SA1100 | ||
970 | /* Enable the memory bus request/grant signals */ | ||
971 | sa1110_mb_enable(); | ||
972 | #endif | ||
973 | |||
969 | /* | 974 | /* |
970 | * Only lock for write ops. Also, sa1111_wake must be called with | 975 | * Only lock for write ops. Also, sa1111_wake must be called with |
971 | * released spinlock! | 976 | * released spinlock! |
@@ -1053,6 +1058,7 @@ static struct platform_driver sa1111_device_driver = { | |||
1053 | .resume = sa1111_resume, | 1058 | .resume = sa1111_resume, |
1054 | .driver = { | 1059 | .driver = { |
1055 | .name = "sa1111", | 1060 | .name = "sa1111", |
1061 | .owner = THIS_MODULE, | ||
1056 | }, | 1062 | }, |
1057 | }; | 1063 | }; |
1058 | 1064 | ||
@@ -1238,16 +1244,23 @@ EXPORT_SYMBOL(sa1111_set_sleep_io); | |||
1238 | * sa1111_enable_device - enable an on-chip SA1111 function block | 1244 | * sa1111_enable_device - enable an on-chip SA1111 function block |
1239 | * @sadev: SA1111 function block device to enable | 1245 | * @sadev: SA1111 function block device to enable |
1240 | */ | 1246 | */ |
1241 | void sa1111_enable_device(struct sa1111_dev *sadev) | 1247 | int sa1111_enable_device(struct sa1111_dev *sadev) |
1242 | { | 1248 | { |
1243 | struct sa1111 *sachip = sa1111_chip_driver(sadev); | 1249 | struct sa1111 *sachip = sa1111_chip_driver(sadev); |
1244 | unsigned long flags; | 1250 | unsigned long flags; |
1245 | unsigned int val; | 1251 | unsigned int val; |
1252 | int ret = 0; | ||
1246 | 1253 | ||
1247 | spin_lock_irqsave(&sachip->lock, flags); | 1254 | if (sachip->pdata && sachip->pdata->enable) |
1248 | val = sa1111_readl(sachip->base + SA1111_SKPCR); | 1255 | ret = sachip->pdata->enable(sachip->pdata->data, sadev->devid); |
1249 | sa1111_writel(val | sadev->skpcr_mask, sachip->base + SA1111_SKPCR); | 1256 | |
1250 | spin_unlock_irqrestore(&sachip->lock, flags); | 1257 | if (ret == 0) { |
1258 | spin_lock_irqsave(&sachip->lock, flags); | ||
1259 | val = sa1111_readl(sachip->base + SA1111_SKPCR); | ||
1260 | sa1111_writel(val | sadev->skpcr_mask, sachip->base + SA1111_SKPCR); | ||
1261 | spin_unlock_irqrestore(&sachip->lock, flags); | ||
1262 | } | ||
1263 | return ret; | ||
1251 | } | 1264 | } |
1252 | EXPORT_SYMBOL(sa1111_enable_device); | 1265 | EXPORT_SYMBOL(sa1111_enable_device); |
1253 | 1266 | ||
@@ -1265,6 +1278,9 @@ void sa1111_disable_device(struct sa1111_dev *sadev) | |||
1265 | val = sa1111_readl(sachip->base + SA1111_SKPCR); | 1278 | val = sa1111_readl(sachip->base + SA1111_SKPCR); |
1266 | sa1111_writel(val & ~sadev->skpcr_mask, sachip->base + SA1111_SKPCR); | 1279 | sa1111_writel(val & ~sadev->skpcr_mask, sachip->base + SA1111_SKPCR); |
1267 | spin_unlock_irqrestore(&sachip->lock, flags); | 1280 | spin_unlock_irqrestore(&sachip->lock, flags); |
1281 | |||
1282 | if (sachip->pdata && sachip->pdata->disable) | ||
1283 | sachip->pdata->disable(sachip->pdata->data, sadev->devid); | ||
1268 | } | 1284 | } |
1269 | EXPORT_SYMBOL(sa1111_disable_device); | 1285 | EXPORT_SYMBOL(sa1111_disable_device); |
1270 | 1286 | ||
@@ -1279,7 +1295,7 @@ static int sa1111_match(struct device *_dev, struct device_driver *_drv) | |||
1279 | struct sa1111_dev *dev = SA1111_DEV(_dev); | 1295 | struct sa1111_dev *dev = SA1111_DEV(_dev); |
1280 | struct sa1111_driver *drv = SA1111_DRV(_drv); | 1296 | struct sa1111_driver *drv = SA1111_DRV(_drv); |
1281 | 1297 | ||
1282 | return dev->devid == drv->devid; | 1298 | return dev->devid & drv->devid; |
1283 | } | 1299 | } |
1284 | 1300 | ||
1285 | static int sa1111_bus_suspend(struct device *dev, pm_message_t state) | 1301 | static int sa1111_bus_suspend(struct device *dev, pm_message_t state) |
@@ -1304,6 +1320,14 @@ static int sa1111_bus_resume(struct device *dev) | |||
1304 | return ret; | 1320 | return ret; |
1305 | } | 1321 | } |
1306 | 1322 | ||
1323 | static void sa1111_bus_shutdown(struct device *dev) | ||
1324 | { | ||
1325 | struct sa1111_driver *drv = SA1111_DRV(dev->driver); | ||
1326 | |||
1327 | if (drv && drv->shutdown) | ||
1328 | drv->shutdown(SA1111_DEV(dev)); | ||
1329 | } | ||
1330 | |||
1307 | static int sa1111_bus_probe(struct device *dev) | 1331 | static int sa1111_bus_probe(struct device *dev) |
1308 | { | 1332 | { |
1309 | struct sa1111_dev *sadev = SA1111_DEV(dev); | 1333 | struct sa1111_dev *sadev = SA1111_DEV(dev); |
@@ -1333,6 +1357,7 @@ struct bus_type sa1111_bus_type = { | |||
1333 | .remove = sa1111_bus_remove, | 1357 | .remove = sa1111_bus_remove, |
1334 | .suspend = sa1111_bus_suspend, | 1358 | .suspend = sa1111_bus_suspend, |
1335 | .resume = sa1111_bus_resume, | 1359 | .resume = sa1111_bus_resume, |
1360 | .shutdown = sa1111_bus_shutdown, | ||
1336 | }; | 1361 | }; |
1337 | EXPORT_SYMBOL(sa1111_bus_type); | 1362 | EXPORT_SYMBOL(sa1111_bus_type); |
1338 | 1363 | ||
@@ -1349,9 +1374,70 @@ void sa1111_driver_unregister(struct sa1111_driver *driver) | |||
1349 | } | 1374 | } |
1350 | EXPORT_SYMBOL(sa1111_driver_unregister); | 1375 | EXPORT_SYMBOL(sa1111_driver_unregister); |
1351 | 1376 | ||
1377 | #ifdef CONFIG_DMABOUNCE | ||
1378 | /* | ||
1379 | * According to the "Intel StrongARM SA-1111 Microprocessor Companion | ||
1380 | * Chip Specification Update" (June 2000), erratum #7, there is a | ||
1381 | * significant bug in the SA1111 SDRAM shared memory controller. If | ||
1382 | * an access to a region of memory above 1MB relative to the bank base, | ||
1383 | * it is important that address bit 10 _NOT_ be asserted. Depending | ||
1384 | * on the configuration of the RAM, bit 10 may correspond to one | ||
1385 | * of several different (processor-relative) address bits. | ||
1386 | * | ||
1387 | * This routine only identifies whether or not a given DMA address | ||
1388 | * is susceptible to the bug. | ||
1389 | * | ||
1390 | * This should only get called for sa1111_device types due to the | ||
1391 | * way we configure our device dma_masks. | ||
1392 | */ | ||
1393 | static int sa1111_needs_bounce(struct device *dev, dma_addr_t addr, size_t size) | ||
1394 | { | ||
1395 | /* | ||
1396 | * Section 4.6 of the "Intel StrongARM SA-1111 Development Module | ||
1397 | * User's Guide" mentions that jumpers R51 and R52 control the | ||
1398 | * target of SA-1111 DMA (either SDRAM bank 0 on Assabet, or | ||
1399 | * SDRAM bank 1 on Neponset). The default configuration selects | ||
1400 | * Assabet, so any address in bank 1 is necessarily invalid. | ||
1401 | */ | ||
1402 | return (machine_is_assabet() || machine_is_pfs168()) && | ||
1403 | (addr >= 0xc8000000 || (addr + size) >= 0xc8000000); | ||
1404 | } | ||
1405 | |||
1406 | static int sa1111_notifier_call(struct notifier_block *n, unsigned long action, | ||
1407 | void *data) | ||
1408 | { | ||
1409 | struct sa1111_dev *dev = SA1111_DEV(data); | ||
1410 | |||
1411 | switch (action) { | ||
1412 | case BUS_NOTIFY_ADD_DEVICE: | ||
1413 | if (dev->dev.dma_mask && dev->dma_mask < 0xffffffffUL) { | ||
1414 | int ret = dmabounce_register_dev(&dev->dev, 1024, 4096, | ||
1415 | sa1111_needs_bounce); | ||
1416 | if (ret) | ||
1417 | dev_err(&dev->dev, "failed to register with dmabounce: %d\n", ret); | ||
1418 | } | ||
1419 | break; | ||
1420 | |||
1421 | case BUS_NOTIFY_DEL_DEVICE: | ||
1422 | if (dev->dev.dma_mask && dev->dma_mask < 0xffffffffUL) | ||
1423 | dmabounce_unregister_dev(&dev->dev); | ||
1424 | break; | ||
1425 | } | ||
1426 | return NOTIFY_OK; | ||
1427 | } | ||
1428 | |||
1429 | static struct notifier_block sa1111_bus_notifier = { | ||
1430 | .notifier_call = sa1111_notifier_call, | ||
1431 | }; | ||
1432 | #endif | ||
1433 | |||
1352 | static int __init sa1111_init(void) | 1434 | static int __init sa1111_init(void) |
1353 | { | 1435 | { |
1354 | int ret = bus_register(&sa1111_bus_type); | 1436 | int ret = bus_register(&sa1111_bus_type); |
1437 | #ifdef CONFIG_DMABOUNCE | ||
1438 | if (ret == 0) | ||
1439 | bus_register_notifier(&sa1111_bus_type, &sa1111_bus_notifier); | ||
1440 | #endif | ||
1355 | if (ret == 0) | 1441 | if (ret == 0) |
1356 | platform_driver_register(&sa1111_device_driver); | 1442 | platform_driver_register(&sa1111_device_driver); |
1357 | return ret; | 1443 | return ret; |
@@ -1360,6 +1446,9 @@ static int __init sa1111_init(void) | |||
1360 | static void __exit sa1111_exit(void) | 1446 | static void __exit sa1111_exit(void) |
1361 | { | 1447 | { |
1362 | platform_driver_unregister(&sa1111_device_driver); | 1448 | platform_driver_unregister(&sa1111_device_driver); |
1449 | #ifdef CONFIG_DMABOUNCE | ||
1450 | bus_unregister_notifier(&sa1111_bus_type, &sa1111_bus_notifier); | ||
1451 | #endif | ||
1363 | bus_unregister(&sa1111_bus_type); | 1452 | bus_unregister(&sa1111_bus_type); |
1364 | } | 1453 | } |
1365 | 1454 | ||
diff --git a/arch/arm/common/time-acorn.c b/arch/arm/common/time-acorn.c deleted file mode 100644 index deeed561b168..000000000000 --- a/arch/arm/common/time-acorn.c +++ /dev/null | |||
@@ -1,95 +0,0 @@ | |||
1 | /* | ||
2 | * linux/arch/arm/common/time-acorn.c | ||
3 | * | ||
4 | * Copyright (c) 1996-2000 Russell King. | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License version 2 as | ||
8 | * published by the Free Software Foundation. | ||
9 | * | ||
10 | * Changelog: | ||
11 | * 24-Sep-1996 RMK Created | ||
12 | * 10-Oct-1996 RMK Brought up to date with arch-sa110eval | ||
13 | * 04-Dec-1997 RMK Updated for new arch/arm/time.c | ||
14 | * 13=Jun-2004 DS Moved to arch/arm/common b/c shared w/CLPS7500 | ||
15 | */ | ||
16 | #include <linux/timex.h> | ||
17 | #include <linux/init.h> | ||
18 | #include <linux/interrupt.h> | ||
19 | #include <linux/irq.h> | ||
20 | #include <linux/io.h> | ||
21 | |||
22 | #include <mach/hardware.h> | ||
23 | #include <asm/hardware/ioc.h> | ||
24 | |||
25 | #include <asm/mach/time.h> | ||
26 | |||
27 | unsigned long ioc_timer_gettimeoffset(void) | ||
28 | { | ||
29 | unsigned int count1, count2, status; | ||
30 | long offset; | ||
31 | |||
32 | ioc_writeb (0, IOC_T0LATCH); | ||
33 | barrier (); | ||
34 | count1 = ioc_readb(IOC_T0CNTL) | (ioc_readb(IOC_T0CNTH) << 8); | ||
35 | barrier (); | ||
36 | status = ioc_readb(IOC_IRQREQA); | ||
37 | barrier (); | ||
38 | ioc_writeb (0, IOC_T0LATCH); | ||
39 | barrier (); | ||
40 | count2 = ioc_readb(IOC_T0CNTL) | (ioc_readb(IOC_T0CNTH) << 8); | ||
41 | |||
42 | offset = count2; | ||
43 | if (count2 < count1) { | ||
44 | /* | ||
45 | * We have not had an interrupt between reading count1 | ||
46 | * and count2. | ||
47 | */ | ||
48 | if (status & (1 << 5)) | ||
49 | offset -= LATCH; | ||
50 | } else if (count2 > count1) { | ||
51 | /* | ||
52 | * We have just had another interrupt between reading | ||
53 | * count1 and count2. | ||
54 | */ | ||
55 | offset -= LATCH; | ||
56 | } | ||
57 | |||
58 | offset = (LATCH - offset) * (tick_nsec / 1000); | ||
59 | return (offset + LATCH/2) / LATCH; | ||
60 | } | ||
61 | |||
62 | void __init ioctime_init(void) | ||
63 | { | ||
64 | ioc_writeb(LATCH & 255, IOC_T0LTCHL); | ||
65 | ioc_writeb(LATCH >> 8, IOC_T0LTCHH); | ||
66 | ioc_writeb(0, IOC_T0GO); | ||
67 | } | ||
68 | |||
69 | static irqreturn_t | ||
70 | ioc_timer_interrupt(int irq, void *dev_id) | ||
71 | { | ||
72 | timer_tick(); | ||
73 | return IRQ_HANDLED; | ||
74 | } | ||
75 | |||
76 | static struct irqaction ioc_timer_irq = { | ||
77 | .name = "timer", | ||
78 | .flags = IRQF_DISABLED, | ||
79 | .handler = ioc_timer_interrupt | ||
80 | }; | ||
81 | |||
82 | /* | ||
83 | * Set up timer interrupt. | ||
84 | */ | ||
85 | static void __init ioc_timer_init(void) | ||
86 | { | ||
87 | ioctime_init(); | ||
88 | setup_irq(IRQ_TIMER, &ioc_timer_irq); | ||
89 | } | ||
90 | |||
91 | struct sys_timer ioc_timer = { | ||
92 | .init = ioc_timer_init, | ||
93 | .offset = ioc_timer_gettimeoffset, | ||
94 | }; | ||
95 | |||