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author | Linus Torvalds <torvalds@linux-foundation.org> | 2012-03-27 19:14:44 -0400 |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2012-03-27 19:14:44 -0400 |
commit | 281b05392fc2cb26209b4d85abaf4889ab1991f3 (patch) | |
tree | bbf5000ce7bd739b1ca85e9918741e285d267c7c /arch/arm/common | |
parent | 48d554418d3bfbba5e9dc1ebdf352f1b1f3ff4ee (diff) | |
parent | bde755679a3ba5af0d16231f8532e8373c5e2ecc (diff) |
Merge tag 'soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull "ARM: SoC specific updates" from Arnd Bergmann:
"These changes are all specific to an soc family or the code for one
soc. Lots of work for Tegra3 this time, but also a lot of other
platforms. There will be another (smaller) set of soc patches later
in the merge window for stuff that has dependencies on external trees
or that was sent just before the merge window opened.
The asoc tree added a few devices to the i.mx platform, which conflict
with other devices added in the same place here.
The tegra Makefile conflicts between a number of branches, mostly
because of changes regarding localtimer.c, which was removed in the
end.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>"
Fix up some trivial conflicts, including the mentioned Tegra Makefile.
* tag 'soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (51 commits)
ARM: EXYNOS: fix cycle count for periodic mode of clock event timers
ARM: EXYNOS: add support JPEG
ARM: EXYNOS: Add DMC1, allow PPMU access for DMC
ARM: SAMSUNG: Correct MIPI-CSIS io memory resource definition
ARM: SAMSUNG: fix __init attribute on regarding s3c_set_platdata()
ARM: SAMSUNG: Add __init attribute to samsung_bl_set()
ARM: S5PV210: Add usb otg phy control
ARM: S3C64XX: Add usb otg phy control
ARM: EXYNOS: Enable l2 configuration through device tree
ARM: EXYNOS: remove useless code to save/restore L2
ARM: EXYNOS: save L2 settings during bootup
ARM: S5P: add L2 early resume code
ARM: EXYNOS: Add support AFTR mode on EXYNOS4210
ARM: mx35: Setup the AIPS registers
ARM: mx5: Use common function for configuring AIPS
ARM: mx3: Setup AIPS registers
ARM: mx3: Let mx31 and mx35 enter in LPM mode in WFI
ARM: defconfig: imx_v6_v7: build in REGULATOR_FIXED_VOLTAGE
ARM: imx: update imx_v6_v7_defconfig
ARM: tegra: Demote EMC clock inconsistency BUG to WARN
...
Diffstat (limited to 'arch/arm/common')
-rw-r--r-- | arch/arm/common/timer-sp.c | 17 |
1 files changed, 16 insertions, 1 deletions
diff --git a/arch/arm/common/timer-sp.c b/arch/arm/common/timer-sp.c index 8794a34eae61..df13a3ffff35 100644 --- a/arch/arm/common/timer-sp.c +++ b/arch/arm/common/timer-sp.c | |||
@@ -26,6 +26,7 @@ | |||
26 | #include <linux/irq.h> | 26 | #include <linux/irq.h> |
27 | #include <linux/io.h> | 27 | #include <linux/io.h> |
28 | 28 | ||
29 | #include <asm/sched_clock.h> | ||
29 | #include <asm/hardware/arm_timer.h> | 30 | #include <asm/hardware/arm_timer.h> |
30 | 31 | ||
31 | static long __init sp804_get_clock_rate(const char *name) | 32 | static long __init sp804_get_clock_rate(const char *name) |
@@ -67,7 +68,16 @@ static long __init sp804_get_clock_rate(const char *name) | |||
67 | return rate; | 68 | return rate; |
68 | } | 69 | } |
69 | 70 | ||
70 | void __init sp804_clocksource_init(void __iomem *base, const char *name) | 71 | static void __iomem *sched_clock_base; |
72 | |||
73 | static u32 sp804_read(void) | ||
74 | { | ||
75 | return ~readl_relaxed(sched_clock_base + TIMER_VALUE); | ||
76 | } | ||
77 | |||
78 | void __init __sp804_clocksource_and_sched_clock_init(void __iomem *base, | ||
79 | const char *name, | ||
80 | int use_sched_clock) | ||
71 | { | 81 | { |
72 | long rate = sp804_get_clock_rate(name); | 82 | long rate = sp804_get_clock_rate(name); |
73 | 83 | ||
@@ -83,6 +93,11 @@ void __init sp804_clocksource_init(void __iomem *base, const char *name) | |||
83 | 93 | ||
84 | clocksource_mmio_init(base + TIMER_VALUE, name, | 94 | clocksource_mmio_init(base + TIMER_VALUE, name, |
85 | rate, 200, 32, clocksource_mmio_readl_down); | 95 | rate, 200, 32, clocksource_mmio_readl_down); |
96 | |||
97 | if (use_sched_clock) { | ||
98 | sched_clock_base = base; | ||
99 | setup_sched_clock(sp804_read, 32, rate); | ||
100 | } | ||
86 | } | 101 | } |
87 | 102 | ||
88 | 103 | ||