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authorTim Harvey <tharvey@gateworks.com>2014-02-07 02:24:56 -0500
committerShawn Guo <shawn.guo@linaro.org>2014-02-09 08:28:53 -0500
commite3946fe8050534ccaf8c1266cb1fa90c7f3345c3 (patch)
tree2d4d55ca38f4f1b33349a62db8e268264902845c /arch/arm/boot
parenta113533726e909d2f3490b74df3df6a26ec54f33 (diff)
ARM: dts: add Gateworks Ventana support
The Gateworks Ventana product family consists of several baseboard designs based on the Freescale i.MX6 family of processors. Each baseboard has a different set of possible features. Signed-off-by: Tim Harvey <tharvey@gateworks.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Diffstat (limited to 'arch/arm/boot')
-rw-r--r--arch/arm/boot/dts/Makefile9
-rw-r--r--arch/arm/boot/dts/imx6dl-gw51xx.dts19
-rw-r--r--arch/arm/boot/dts/imx6dl-gw52xx.dts19
-rw-r--r--arch/arm/boot/dts/imx6dl-gw53xx.dts19
-rw-r--r--arch/arm/boot/dts/imx6dl-gw54xx.dts19
-rw-r--r--arch/arm/boot/dts/imx6q-gw51xx.dts19
-rw-r--r--arch/arm/boot/dts/imx6q-gw52xx.dts23
-rw-r--r--arch/arm/boot/dts/imx6q-gw53xx.dts23
-rw-r--r--arch/arm/boot/dts/imx6q-gw5400-a.dts546
-rw-r--r--arch/arm/boot/dts/imx6q-gw54xx.dts23
-rw-r--r--arch/arm/boot/dts/imx6qdl-gw51xx.dtsi374
-rw-r--r--arch/arm/boot/dts/imx6qdl-gw52xx.dtsi490
-rw-r--r--arch/arm/boot/dts/imx6qdl-gw53xx.dtsi553
-rw-r--r--arch/arm/boot/dts/imx6qdl-gw54xx.dtsi580
14 files changed, 2716 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index b9d6a8b485e0..8081479fe64c 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -153,12 +153,21 @@ dtb-$(CONFIG_ARCH_MXC) += \
153 imx53-qsb.dtb \ 153 imx53-qsb.dtb \
154 imx53-smd.dtb \ 154 imx53-smd.dtb \
155 imx6dl-cubox-i.dtb \ 155 imx6dl-cubox-i.dtb \
156 imx6dl-gw51xx.dtb \
157 imx6dl-gw52xx.dtb \
158 imx6dl-gw53xx.dtb \
159 imx6dl-gw54xx.dtb \
156 imx6dl-hummingboard.dtb \ 160 imx6dl-hummingboard.dtb \
157 imx6dl-sabreauto.dtb \ 161 imx6dl-sabreauto.dtb \
158 imx6dl-sabresd.dtb \ 162 imx6dl-sabresd.dtb \
159 imx6dl-wandboard.dtb \ 163 imx6dl-wandboard.dtb \
160 imx6q-arm2.dtb \ 164 imx6q-arm2.dtb \
161 imx6q-cubox-i.dtb \ 165 imx6q-cubox-i.dtb \
166 imx6q-gw51xx.dtb \
167 imx6q-gw52xx.dtb \
168 imx6q-gw53xx.dtb \
169 imx6q-gw5400-a.dtb \
170 imx6q-gw54xx.dtb \
162 imx6q-phytec-pbab01.dtb \ 171 imx6q-phytec-pbab01.dtb \
163 imx6q-sabreauto.dtb \ 172 imx6q-sabreauto.dtb \
164 imx6q-sabrelite.dtb \ 173 imx6q-sabrelite.dtb \
diff --git a/arch/arm/boot/dts/imx6dl-gw51xx.dts b/arch/arm/boot/dts/imx6dl-gw51xx.dts
new file mode 100644
index 000000000000..4bd055f4c930
--- /dev/null
+++ b/arch/arm/boot/dts/imx6dl-gw51xx.dts
@@ -0,0 +1,19 @@
1/*
2 * Copyright 2013 Gateworks Corporation
3 *
4 * The code contained herein is licensed under the GNU General Public
5 * License. You may obtain a copy of the GNU General Public License
6 * Version 2 or later at the following locations:
7 *
8 * http://www.opensource.org/licenses/gpl-license.html
9 * http://www.gnu.org/copyleft/gpl.html
10 */
11
12/dts-v1/;
13#include "imx6dl.dtsi"
14#include "imx6qdl-gw51xx.dtsi"
15
16/ {
17 model = "Gateworks Ventana i.MX6 DualLite GW51XX";
18 compatible = "gw,imx6dl-gw51xx", "gw,ventana", "fsl,imx6dl";
19};
diff --git a/arch/arm/boot/dts/imx6dl-gw52xx.dts b/arch/arm/boot/dts/imx6dl-gw52xx.dts
new file mode 100644
index 000000000000..c9136058f15e
--- /dev/null
+++ b/arch/arm/boot/dts/imx6dl-gw52xx.dts
@@ -0,0 +1,19 @@
1/*
2 * Copyright 2013 Gateworks Corporation
3 *
4 * The code contained herein is licensed under the GNU General Public
5 * License. You may obtain a copy of the GNU General Public License
6 * Version 2 or later at the following locations:
7 *
8 * http://www.opensource.org/licenses/gpl-license.html
9 * http://www.gnu.org/copyleft/gpl.html
10 */
11
12/dts-v1/;
13#include "imx6dl.dtsi"
14#include "imx6qdl-gw52xx.dtsi"
15
16/ {
17 model = "Gateworks Ventana i.MX6 DualLite GW52XX";
18 compatible = "gw,imx6dl-gw52xx", "gw,ventana", "fsl,imx6dl";
19};
diff --git a/arch/arm/boot/dts/imx6dl-gw53xx.dts b/arch/arm/boot/dts/imx6dl-gw53xx.dts
new file mode 100644
index 000000000000..61818a14fde6
--- /dev/null
+++ b/arch/arm/boot/dts/imx6dl-gw53xx.dts
@@ -0,0 +1,19 @@
1/*
2 * Copyright 2013 Gateworks Corporation
3 *
4 * The code contained herein is licensed under the GNU General Public
5 * License. You may obtain a copy of the GNU General Public License
6 * Version 2 or later at the following locations:
7 *
8 * http://www.opensource.org/licenses/gpl-license.html
9 * http://www.gnu.org/copyleft/gpl.html
10 */
11
12/dts-v1/;
13#include "imx6dl.dtsi"
14#include "imx6qdl-gw53xx.dtsi"
15
16/ {
17 model = "Gateworks Ventana i.MX6 DualLite GW53XX";
18 compatible = "gw,imx6dl-gw53xx", "gw,ventana", "fsl,imx6dl";
19};
diff --git a/arch/arm/boot/dts/imx6dl-gw54xx.dts b/arch/arm/boot/dts/imx6dl-gw54xx.dts
new file mode 100644
index 000000000000..ab38b6770a06
--- /dev/null
+++ b/arch/arm/boot/dts/imx6dl-gw54xx.dts
@@ -0,0 +1,19 @@
1/*
2 * Copyright 2013 Gateworks Corporation
3 *
4 * The code contained herein is licensed under the GNU General Public
5 * License. You may obtain a copy of the GNU General Public License
6 * Version 2 or later at the following locations:
7 *
8 * http://www.opensource.org/licenses/gpl-license.html
9 * http://www.gnu.org/copyleft/gpl.html
10 */
11
12/dts-v1/;
13#include "imx6dl.dtsi"
14#include "imx6qdl-gw54xx.dtsi"
15
16/ {
17 model = "Gateworks Ventana i.MX6 DualLite GW54XX";
18 compatible = "gw,imx6dl-gw54xx", "gw,ventana", "fsl,imx6dl";
19};
diff --git a/arch/arm/boot/dts/imx6q-gw51xx.dts b/arch/arm/boot/dts/imx6q-gw51xx.dts
new file mode 100644
index 000000000000..af4929aee075
--- /dev/null
+++ b/arch/arm/boot/dts/imx6q-gw51xx.dts
@@ -0,0 +1,19 @@
1/*
2 * Copyright 2013 Gateworks Corporation
3 *
4 * The code contained herein is licensed under the GNU General Public
5 * License. You may obtain a copy of the GNU General Public License
6 * Version 2 or later at the following locations:
7 *
8 * http://www.opensource.org/licenses/gpl-license.html
9 * http://www.gnu.org/copyleft/gpl.html
10 */
11
12/dts-v1/;
13#include "imx6q.dtsi"
14#include "imx6qdl-gw54xx.dtsi"
15
16/ {
17 model = "Gateworks Ventana i.MX6 Quad GW51XX";
18 compatible = "gw,imx6q-gw51xx", "gw,ventana", "fsl,imx6q";
19};
diff --git a/arch/arm/boot/dts/imx6q-gw52xx.dts b/arch/arm/boot/dts/imx6q-gw52xx.dts
new file mode 100644
index 000000000000..5f71ddbc7f05
--- /dev/null
+++ b/arch/arm/boot/dts/imx6q-gw52xx.dts
@@ -0,0 +1,23 @@
1/*
2 * Copyright 2013 Gateworks Corporation
3 *
4 * The code contained herein is licensed under the GNU General Public
5 * License. You may obtain a copy of the GNU General Public License
6 * Version 2 or later at the following locations:
7 *
8 * http://www.opensource.org/licenses/gpl-license.html
9 * http://www.gnu.org/copyleft/gpl.html
10 */
11
12/dts-v1/;
13#include "imx6q.dtsi"
14#include "imx6qdl-gw52xx.dtsi"
15
16/ {
17 model = "Gateworks Ventana i.MX6 Quad GW52XX";
18 compatible = "gw,imx6q-gw52xx", "gw,ventana", "fsl,imx6q";
19};
20
21&sata {
22 status = "okay";
23};
diff --git a/arch/arm/boot/dts/imx6q-gw53xx.dts b/arch/arm/boot/dts/imx6q-gw53xx.dts
new file mode 100644
index 000000000000..360c316b4740
--- /dev/null
+++ b/arch/arm/boot/dts/imx6q-gw53xx.dts
@@ -0,0 +1,23 @@
1/*
2 * Copyright 2013 Gateworks Corporation
3 *
4 * The code contained herein is licensed under the GNU General Public
5 * License. You may obtain a copy of the GNU General Public License
6 * Version 2 or later at the following locations:
7 *
8 * http://www.opensource.org/licenses/gpl-license.html
9 * http://www.gnu.org/copyleft/gpl.html
10 */
11
12/dts-v1/;
13#include "imx6q.dtsi"
14#include "imx6qdl-gw53xx.dtsi"
15
16/ {
17 model = "Gateworks Ventana i.MX6 Quad GW53XX";
18 compatible = "gw,imx6q-gw53xx", "gw,ventana", "fsl,imx6q";
19};
20
21&sata {
22 status = "okay";
23};
diff --git a/arch/arm/boot/dts/imx6q-gw5400-a.dts b/arch/arm/boot/dts/imx6q-gw5400-a.dts
new file mode 100644
index 000000000000..902f98310481
--- /dev/null
+++ b/arch/arm/boot/dts/imx6q-gw5400-a.dts
@@ -0,0 +1,546 @@
1/*
2 * Copyright 2013 Gateworks Corporation
3 *
4 * The code contained herein is licensed under the GNU General Public
5 * License. You may obtain a copy of the GNU General Public License
6 * Version 2 or later at the following locations:
7 *
8 * http://www.opensource.org/licenses/gpl-license.html
9 * http://www.gnu.org/copyleft/gpl.html
10 */
11
12/dts-v1/;
13#include "imx6q.dtsi"
14
15/ {
16 model = "Gateworks Ventana GW5400-A";
17 compatible = "gw,imx6q-gw5400-a", "gw,ventana", "fsl,imx6q";
18
19 /* these are used by bootloader for disabling nodes */
20 aliases {
21 ethernet0 = &fec;
22 ethernet1 = &eth1;
23 i2c0 = &i2c1;
24 i2c1 = &i2c2;
25 i2c2 = &i2c3;
26 led0 = &led0;
27 led1 = &led1;
28 led2 = &led2;
29 sky2 = &eth1;
30 ssi0 = &ssi1;
31 spi0 = &ecspi1;
32 usb0 = &usbh1;
33 usb1 = &usbotg;
34 usdhc2 = &usdhc3;
35 };
36
37 chosen {
38 bootargs = "console=ttymxc1,115200";
39 };
40
41 leds {
42 compatible = "gpio-leds";
43
44 led0: user1 {
45 label = "user1";
46 gpios = <&gpio4 6 0>; /* 102 -> MX6_PANLEDG */
47 default-state = "on";
48 linux,default-trigger = "heartbeat";
49 };
50
51 led1: user2 {
52 label = "user2";
53 gpios = <&gpio4 10 0>; /* 106 -> MX6_PANLEDR */
54 default-state = "off";
55 };
56
57 led2: user3 {
58 label = "user3";
59 gpios = <&gpio4 15 1>; /* 111 -> MX6_LOCLED# */
60 default-state = "off";
61 };
62 };
63
64 memory {
65 reg = <0x10000000 0x40000000>;
66 };
67
68 pps {
69 compatible = "pps-gpio";
70 gpios = <&gpio1 5 0>;
71 status = "okay";
72 };
73
74 regulators {
75 compatible = "simple-bus";
76 #address-cells = <1>;
77 #size-cells = <0>;
78
79 reg_1p0v: regulator@0 {
80 compatible = "regulator-fixed";
81 reg = <0>;
82 regulator-name = "1P0V";
83 regulator-min-microvolt = <1000000>;
84 regulator-max-microvolt = <1000000>;
85 regulator-always-on;
86 };
87
88 reg_3p3v: regulator@1 {
89 compatible = "regulator-fixed";
90 reg = <1>;
91 regulator-name = "3P3V";
92 regulator-min-microvolt = <3300000>;
93 regulator-max-microvolt = <3300000>;
94 regulator-always-on;
95 };
96
97 reg_usb_h1_vbus: regulator@2 {
98 compatible = "regulator-fixed";
99 reg = <2>;
100 regulator-name = "usb_h1_vbus";
101 regulator-min-microvolt = <5000000>;
102 regulator-max-microvolt = <5000000>;
103 regulator-always-on;
104 };
105
106 reg_usb_otg_vbus: regulator@3 {
107 compatible = "regulator-fixed";
108 reg = <3>;
109 regulator-name = "usb_otg_vbus";
110 regulator-min-microvolt = <5000000>;
111 regulator-max-microvolt = <5000000>;
112 gpio = <&gpio3 22 0>;
113 enable-active-high;
114 };
115 };
116
117 sound {
118 compatible = "fsl,imx6q-sabrelite-sgtl5000",
119 "fsl,imx-audio-sgtl5000";
120 model = "imx6q-sabrelite-sgtl5000";
121 ssi-controller = <&ssi1>;
122 audio-codec = <&codec>;
123 audio-routing =
124 "MIC_IN", "Mic Jack",
125 "Mic Jack", "Mic Bias",
126 "Headphone Jack", "HP_OUT";
127 mux-int-port = <1>;
128 mux-ext-port = <4>;
129 };
130};
131
132&audmux {
133 pinctrl-names = "default";
134 pinctrl-0 = <&pinctrl_audmux>;
135 status = "okay";
136};
137
138&ecspi1 {
139 fsl,spi-num-chipselects = <1>;
140 cs-gpios = <&gpio3 19 0>;
141 pinctrl-names = "default";
142 pinctrl-0 = <&pinctrl_ecspi1>;
143 status = "okay";
144
145 flash: m25p80@0 {
146 compatible = "sst,w25q256";
147 spi-max-frequency = <30000000>;
148 reg = <0>;
149 };
150};
151
152&fec {
153 pinctrl-names = "default";
154 pinctrl-0 = <&pinctrl_enet>;
155 phy-mode = "rgmii";
156 phy-reset-gpios = <&gpio1 30 0>;
157 status = "okay";
158};
159
160&i2c1 {
161 clock-frequency = <100000>;
162 pinctrl-names = "default";
163 pinctrl-0 = <&pinctrl_i2c1>;
164 status = "okay";
165
166 eeprom1: eeprom@50 {
167 compatible = "atmel,24c02";
168 reg = <0x50>;
169 pagesize = <16>;
170 };
171
172 eeprom2: eeprom@51 {
173 compatible = "atmel,24c02";
174 reg = <0x51>;
175 pagesize = <16>;
176 };
177
178 eeprom3: eeprom@52 {
179 compatible = "atmel,24c02";
180 reg = <0x52>;
181 pagesize = <16>;
182 };
183
184 eeprom4: eeprom@53 {
185 compatible = "atmel,24c02";
186 reg = <0x53>;
187 pagesize = <16>;
188 };
189
190 gpio: pca9555@23 {
191 compatible = "nxp,pca9555";
192 reg = <0x23>;
193 gpio-controller;
194 #gpio-cells = <2>;
195 };
196
197 hwmon: gsc@29 {
198 compatible = "gw,gsp";
199 reg = <0x29>;
200 };
201
202 rtc: ds1672@68 {
203 compatible = "dallas,ds1672";
204 reg = <0x68>;
205 };
206};
207
208&i2c2 {
209 clock-frequency = <100000>;
210 pinctrl-names = "default";
211 pinctrl-0 = <&pinctrl_i2c2>;
212 status = "okay";
213
214 pmic: pfuze100@08 {
215 compatible = "fsl,pfuze100";
216 reg = <0x08>;
217
218 regulators {
219 sw1a_reg: sw1ab {
220 regulator-min-microvolt = <300000>;
221 regulator-max-microvolt = <1875000>;
222 regulator-boot-on;
223 regulator-always-on;
224 regulator-ramp-delay = <6250>;
225 };
226
227 sw1c_reg: sw1c {
228 regulator-min-microvolt = <300000>;
229 regulator-max-microvolt = <1875000>;
230 regulator-boot-on;
231 regulator-always-on;
232 regulator-ramp-delay = <6250>;
233 };
234
235 sw2_reg: sw2 {
236 regulator-min-microvolt = <800000>;
237 regulator-max-microvolt = <3950000>;
238 regulator-boot-on;
239 regulator-always-on;
240 };
241
242 sw3a_reg: sw3a {
243 regulator-min-microvolt = <400000>;
244 regulator-max-microvolt = <1975000>;
245 regulator-boot-on;
246 regulator-always-on;
247 };
248
249 sw3b_reg: sw3b {
250 regulator-min-microvolt = <400000>;
251 regulator-max-microvolt = <1975000>;
252 regulator-boot-on;
253 regulator-always-on;
254 };
255
256 sw4_reg: sw4 {
257 regulator-min-microvolt = <800000>;
258 regulator-max-microvolt = <3300000>;
259 };
260
261 swbst_reg: swbst {
262 regulator-min-microvolt = <5000000>;
263 regulator-max-microvolt = <5150000>;
264 };
265
266 snvs_reg: vsnvs {
267 regulator-min-microvolt = <1000000>;
268 regulator-max-microvolt = <3000000>;
269 regulator-boot-on;
270 regulator-always-on;
271 };
272
273 vref_reg: vrefddr {
274 regulator-boot-on;
275 regulator-always-on;
276 };
277
278 vgen1_reg: vgen1 {
279 regulator-min-microvolt = <800000>;
280 regulator-max-microvolt = <1550000>;
281 };
282
283 vgen2_reg: vgen2 {
284 regulator-min-microvolt = <800000>;
285 regulator-max-microvolt = <1550000>;
286 };
287
288 vgen3_reg: vgen3 {
289 regulator-min-microvolt = <1800000>;
290 regulator-max-microvolt = <3300000>;
291 };
292
293 vgen4_reg: vgen4 {
294 regulator-min-microvolt = <1800000>;
295 regulator-max-microvolt = <3300000>;
296 regulator-always-on;
297 };
298
299 vgen5_reg: vgen5 {
300 regulator-min-microvolt = <1800000>;
301 regulator-max-microvolt = <3300000>;
302 regulator-always-on;
303 };
304
305 vgen6_reg: vgen6 {
306 regulator-min-microvolt = <1800000>;
307 regulator-max-microvolt = <3300000>;
308 regulator-always-on;
309 };
310 };
311 };
312
313 pciswitch: pex8609@3f {
314 compatible = "plx,pex8609";
315 reg = <0x3f>;
316 };
317
318 pciclkgen: si52147@6b {
319 compatible = "sil,si52147";
320 reg = <0x6b>;
321 };
322};
323
324&i2c3 {
325 clock-frequency = <100000>;
326 pinctrl-names = "default";
327 pinctrl-0 = <&pinctrl_i2c3>;
328 status = "okay";
329
330 accelerometer: mma8450@1c {
331 compatible = "fsl,mma8450";
332 reg = <0x1c>;
333 };
334
335 codec: sgtl5000@0a {
336 compatible = "fsl,sgtl5000";
337 reg = <0x0a>;
338 clocks = <&clks 201>;
339 VDDA-supply = <&sw4_reg>;
340 VDDIO-supply = <&reg_3p3v>;
341 };
342
343 hdmiin: adv7611@4c {
344 compatible = "adi,adv7611";
345 reg = <0x4c>;
346 };
347
348 touchscreen: egalax_ts@04 {
349 compatible = "eeti,egalax_ts";
350 reg = <0x04>;
351 interrupt-parent = <&gpio7>;
352 interrupts = <12 2>; /* gpio7_12 active low */
353 wakeup-gpios = <&gpio7 12 0>;
354 };
355
356 videoout: adv7393@2a {
357 compatible = "adi,adv7393";
358 reg = <0x2a>;
359 };
360
361 videoin: adv7180@20 {
362 compatible = "adi,adv7180";
363 reg = <0x20>;
364 };
365};
366
367&iomuxc {
368 pinctrl-names = "default";
369 pinctrl-0 = <&pinctrl_hog>;
370
371 imx6q-gw5400-a {
372 pinctrl_hog: hoggrp {
373 fsl,pins = <
374 MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x80000000 /* OTG_PWR_EN */
375 MX6QDL_PAD_EIM_D19__GPIO3_IO19 0x80000000 /* SPINOR_CS0# */
376 MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28 0x80000000 /* PCIE IRQ */
377 MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x80000000 /* PCIE RST */
378 MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x000130b0 /* AUD4_MCK */
379 MX6QDL_PAD_GPIO_5__GPIO1_IO05 0x80000000 /* GPS_PPS */
380 MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x80000000 /* TOUCH_IRQ# */
381 MX6QDL_PAD_KEY_COL0__GPIO4_IO06 0x80000000 /* user1 led */
382 MX6QDL_PAD_KEY_COL2__GPIO4_IO10 0x80000000 /* user2 led */
383 MX6QDL_PAD_KEY_ROW4__GPIO4_IO15 0x80000000 /* user3 led */
384 MX6QDL_PAD_SD1_DAT0__GPIO1_IO16 0x80000000 /* USBHUB_RST# */
385 MX6QDL_PAD_SD1_DAT3__GPIO1_IO21 0x80000000 /* MIPI_DIO */
386 >;
387 };
388
389 pinctrl_audmux: audmuxgrp {
390 fsl,pins = <
391 MX6QDL_PAD_SD2_DAT0__AUD4_RXD 0x130b0
392 MX6QDL_PAD_SD2_DAT3__AUD4_TXC 0x130b0
393 MX6QDL_PAD_SD2_DAT2__AUD4_TXD 0x110b0
394 MX6QDL_PAD_SD2_DAT1__AUD4_TXFS 0x130b0
395 >;
396 };
397
398 pinctrl_ecspi1: ecspi1grp {
399 fsl,pins = <
400 MX6QDL_PAD_EIM_D17__ECSPI1_MISO 0x100b1
401 MX6QDL_PAD_EIM_D18__ECSPI1_MOSI 0x100b1
402 MX6QDL_PAD_EIM_D16__ECSPI1_SCLK 0x100b1
403 >;
404 };
405
406 pinctrl_enet: enetgrp {
407 fsl,pins = <
408 MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0
409 MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0
410 MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0
411 MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0
412 MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0
413 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0
414 MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0
415 MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0
416 MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0
417 MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0
418 MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0
419 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0
420 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
421 MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
422 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
423 MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8
424 >;
425 };
426
427 pinctrl_i2c1: i2c1grp {
428 fsl,pins = <
429 MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
430 MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
431 >;
432 };
433
434 pinctrl_i2c2: i2c2grp {
435 fsl,pins = <
436 MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
437 MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
438 >;
439 };
440
441 pinctrl_i2c3: i2c3grp {
442 fsl,pins = <
443 MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1
444 MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
445 >;
446 };
447
448 pinctrl_uart1: uart1grp {
449 fsl,pins = <
450 MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA 0x1b0b1
451 MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA 0x1b0b1
452 >;
453 };
454
455 pinctrl_uart2: uart2grp {
456 fsl,pins = <
457 MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA 0x1b0b1
458 MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA 0x1b0b1
459 >;
460 };
461
462 pinctrl_uart5: uart5grp {
463 fsl,pins = <
464 MX6QDL_PAD_KEY_COL1__UART5_TX_DATA 0x1b0b1
465 MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA 0x1b0b1
466 >;
467 };
468
469 pinctrl_usbotg: usbotggrp {
470 fsl,pins = <
471 MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059
472 >;
473 };
474
475 pinctrl_usdhc3: usdhc3grp {
476 fsl,pins = <
477 MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
478 MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
479 MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
480 MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
481 MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
482 MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
483 >;
484 };
485 };
486};
487
488&ldb {
489 status = "okay";
490 lvds-channel@0 {
491 crtcs = <&ipu1 0>, <&ipu1 1>, <&ipu2 0>, <&ipu2 1>;
492 };
493};
494
495&pcie {
496 reset-gpio = <&gpio1 29 0>;
497 status = "okay";
498
499 eth1: sky2@8 { /* MAC/PHY on bus 8 */
500 compatible = "marvell,sky2";
501 };
502};
503
504&ssi1 {
505 fsl,mode = "i2s-slave";
506 status = "okay";
507};
508
509&uart1 {
510 pinctrl-names = "default";
511 pinctrl-0 = <&pinctrl_uart1>;
512 status = "okay";
513};
514
515&uart2 {
516 pinctrl-names = "default";
517 pinctrl-0 = <&pinctrl_uart2>;
518 status = "okay";
519};
520
521&uart5 {
522 pinctrl-names = "default";
523 pinctrl-0 = <&pinctrl_uart5>;
524 status = "okay";
525};
526
527&usbotg {
528 vbus-supply = <&reg_usb_otg_vbus>;
529 pinctrl-names = "default";
530 pinctrl-0 = <&pinctrl_usbotg>;
531 disable-over-current;
532 status = "okay";
533};
534
535&usbh1 {
536 vbus-supply = <&reg_usb_h1_vbus>;
537 status = "okay";
538};
539
540&usdhc3 {
541 pinctrl-names = "default";
542 pinctrl-0 = <&pinctrl_usdhc3>;
543 cd-gpios = <&gpio7 0 0>;
544 vmmc-supply = <&reg_3p3v>;
545 status = "okay";
546};
diff --git a/arch/arm/boot/dts/imx6q-gw54xx.dts b/arch/arm/boot/dts/imx6q-gw54xx.dts
new file mode 100644
index 000000000000..ab518d66a75e
--- /dev/null
+++ b/arch/arm/boot/dts/imx6q-gw54xx.dts
@@ -0,0 +1,23 @@
1/*
2 * Copyright 2013 Gateworks Corporation
3 *
4 * The code contained herein is licensed under the GNU General Public
5 * License. You may obtain a copy of the GNU General Public License
6 * Version 2 or later at the following locations:
7 *
8 * http://www.opensource.org/licenses/gpl-license.html
9 * http://www.gnu.org/copyleft/gpl.html
10 */
11
12/dts-v1/;
13#include "imx6q.dtsi"
14#include "imx6qdl-gw54xx.dtsi"
15
16/ {
17 model = "Gateworks Ventana i.MX6 Quad GW54XX";
18 compatible = "gw,imx6q-gw54xx", "gw,ventana", "fsl,imx6q";
19};
20
21&sata {
22 status = "okay";
23};
diff --git a/arch/arm/boot/dts/imx6qdl-gw51xx.dtsi b/arch/arm/boot/dts/imx6qdl-gw51xx.dtsi
new file mode 100644
index 000000000000..98a422153ce7
--- /dev/null
+++ b/arch/arm/boot/dts/imx6qdl-gw51xx.dtsi
@@ -0,0 +1,374 @@
1/*
2 * Copyright 2013 Gateworks Corporation
3 *
4 * The code contained herein is licensed under the GNU General Public
5 * License. You may obtain a copy of the GNU General Public License
6 * Version 2 or later at the following locations:
7 *
8 * http://www.opensource.org/licenses/gpl-license.html
9 * http://www.gnu.org/copyleft/gpl.html
10 */
11
12/ {
13 /* these are used by bootloader for disabling nodes */
14 aliases {
15 can0 = &can1;
16 ethernet0 = &fec;
17 led0 = &led0;
18 led1 = &led1;
19 nand = &gpmi;
20 usb0 = &usbh1;
21 usb1 = &usbotg;
22 };
23
24 chosen {
25 bootargs = "console=ttymxc1,115200";
26 };
27
28 leds {
29 compatible = "gpio-leds";
30
31 led0: user1 {
32 label = "user1";
33 gpios = <&gpio4 6 0>; /* 102 -> MX6_PANLEDG */
34 default-state = "on";
35 linux,default-trigger = "heartbeat";
36 };
37
38 led1: user2 {
39 label = "user2";
40 gpios = <&gpio4 7 0>; /* 103 -> MX6_PANLEDR */
41 default-state = "off";
42 };
43 };
44
45 memory {
46 reg = <0x10000000 0x20000000>;
47 };
48
49 pps {
50 compatible = "pps-gpio";
51 gpios = <&gpio1 26 0>;
52 status = "okay";
53 };
54
55 regulators {
56 compatible = "simple-bus";
57 #address-cells = <1>;
58 #size-cells = <0>;
59
60 reg_3p3v: regulator@0 {
61 compatible = "regulator-fixed";
62 reg = <0>;
63 regulator-name = "3P3V";
64 regulator-min-microvolt = <3300000>;
65 regulator-max-microvolt = <3300000>;
66 regulator-always-on;
67 };
68
69 reg_5p0v: regulator@1 {
70 compatible = "regulator-fixed";
71 reg = <1>;
72 regulator-name = "5P0V";
73 regulator-min-microvolt = <5000000>;
74 regulator-max-microvolt = <5000000>;
75 regulator-always-on;
76 };
77
78 reg_usb_otg_vbus: regulator@2 {
79 compatible = "regulator-fixed";
80 reg = <2>;
81 regulator-name = "usb_otg_vbus";
82 regulator-min-microvolt = <5000000>;
83 regulator-max-microvolt = <5000000>;
84 gpio = <&gpio3 22 0>;
85 enable-active-high;
86 };
87 };
88};
89
90&fec {
91 pinctrl-names = "default";
92 pinctrl-0 = <&pinctrl_enet>;
93 phy-mode = "rgmii";
94 phy-reset-gpios = <&gpio1 30 0>;
95 status = "okay";
96};
97
98&gpmi {
99 pinctrl-names = "default";
100 pinctrl-0 = <&pinctrl_gpmi_nand>;
101 status = "okay";
102};
103
104&i2c1 {
105 clock-frequency = <100000>;
106 pinctrl-names = "default";
107 pinctrl-0 = <&pinctrl_i2c1>;
108 status = "okay";
109
110 eeprom1: eeprom@50 {
111 compatible = "atmel,24c02";
112 reg = <0x50>;
113 pagesize = <16>;
114 };
115
116 eeprom2: eeprom@51 {
117 compatible = "atmel,24c02";
118 reg = <0x51>;
119 pagesize = <16>;
120 };
121
122 eeprom3: eeprom@52 {
123 compatible = "atmel,24c02";
124 reg = <0x52>;
125 pagesize = <16>;
126 };
127
128 eeprom4: eeprom@53 {
129 compatible = "atmel,24c02";
130 reg = <0x53>;
131 pagesize = <16>;
132 };
133
134 gpio: pca9555@23 {
135 compatible = "nxp,pca9555";
136 reg = <0x23>;
137 gpio-controller;
138 #gpio-cells = <2>;
139 };
140
141 hwmon: gsc@29 {
142 compatible = "gw,gsp";
143 reg = <0x29>;
144 };
145
146 rtc: ds1672@68 {
147 compatible = "dallas,ds1672";
148 reg = <0x68>;
149 };
150};
151
152&i2c2 {
153 clock-frequency = <100000>;
154 pinctrl-names = "default";
155 pinctrl-0 = <&pinctrl_i2c2>;
156 status = "okay";
157
158 pmic: ltc3676@3c {
159 compatible = "ltc,ltc3676";
160 reg = <0x3c>;
161
162 regulators {
163 sw1_reg: ltc3676__sw1 {
164 regulator-min-microvolt = <1175000>;
165 regulator-max-microvolt = <1175000>;
166 regulator-boot-on;
167 regulator-always-on;
168 };
169
170 sw2_reg: ltc3676__sw2 {
171 regulator-min-microvolt = <1800000>;
172 regulator-max-microvolt = <1800000>;
173 regulator-boot-on;
174 regulator-always-on;
175 };
176
177 sw3_reg: ltc3676__sw3 {
178 regulator-min-microvolt = <1175000>;
179 regulator-max-microvolt = <1175000>;
180 regulator-boot-on;
181 regulator-always-on;
182 };
183
184 sw4_reg: ltc3676__sw4 {
185 regulator-min-microvolt = <1500000>;
186 regulator-max-microvolt = <1500000>;
187 regulator-boot-on;
188 regulator-always-on;
189 };
190
191 ldo2_reg: ltc3676__ldo2 {
192 regulator-min-microvolt = <2500000>;
193 regulator-max-microvolt = <2500000>;
194 regulator-boot-on;
195 regulator-always-on;
196 };
197
198 ldo4_reg: ltc3676__ldo4 {
199 regulator-min-microvolt = <3000000>;
200 regulator-max-microvolt = <3000000>;
201 };
202 };
203 };
204};
205
206&i2c3 {
207 clock-frequency = <100000>;
208 pinctrl-names = "default";
209 pinctrl-0 = <&pinctrl_i2c3>;
210 status = "okay";
211
212 videoin: adv7180@20 {
213 compatible = "adi,adv7180";
214 reg = <0x20>;
215 };
216};
217
218&iomuxc {
219 pinctrl-names = "default";
220 pinctrl-0 = <&pinctrl_hog>;
221
222 imx6qdl-gw51xx {
223 pinctrl_hog: hoggrp {
224 fsl,pins = <
225 MX6QDL_PAD_EIM_A19__GPIO2_IO19 0x80000000 /* MEZZ_DIO0 */
226 MX6QDL_PAD_EIM_A20__GPIO2_IO18 0x80000000 /* MEZZ_DIO1 */
227 MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x80000000 /* OTG_PWR_EN */
228 MX6QDL_PAD_ENET_RXD1__GPIO1_IO26 0x80000000 /* GPS_PPS */
229 MX6QDL_PAD_ENET_TXD0__GPIO1_IO30 0x80000000 /* PHY Reset */
230 MX6QDL_PAD_GPIO_0__GPIO1_IO00 0x80000000 /* PCIE_RST# */
231 MX6QDL_PAD_KEY_COL0__GPIO4_IO06 0x80000000 /* user1 led */
232 MX6QDL_PAD_KEY_ROW0__GPIO4_IO07 0x80000000 /* user2 led */
233 >;
234 };
235
236 pinctrl_enet: enetgrp {
237 fsl,pins = <
238 MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0
239 MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0
240 MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0
241 MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0
242 MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0
243 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0
244 MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0
245 MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0
246 MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0
247 MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0
248 MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0
249 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0
250 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
251 MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
252 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
253 MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8
254 >;
255 };
256
257 pinctrl_gpmi_nand: gpminandgrp {
258 fsl,pins = <
259 MX6QDL_PAD_NANDF_CLE__NAND_CLE 0xb0b1
260 MX6QDL_PAD_NANDF_ALE__NAND_ALE 0xb0b1
261 MX6QDL_PAD_NANDF_WP_B__NAND_WP_B 0xb0b1
262 MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0xb000
263 MX6QDL_PAD_NANDF_CS0__NAND_CE0_B 0xb0b1
264 MX6QDL_PAD_NANDF_CS1__NAND_CE1_B 0xb0b1
265 MX6QDL_PAD_SD4_CMD__NAND_RE_B 0xb0b1
266 MX6QDL_PAD_SD4_CLK__NAND_WE_B 0xb0b1
267 MX6QDL_PAD_NANDF_D0__NAND_DATA00 0xb0b1
268 MX6QDL_PAD_NANDF_D1__NAND_DATA01 0xb0b1
269 MX6QDL_PAD_NANDF_D2__NAND_DATA02 0xb0b1
270 MX6QDL_PAD_NANDF_D3__NAND_DATA03 0xb0b1
271 MX6QDL_PAD_NANDF_D4__NAND_DATA04 0xb0b1
272 MX6QDL_PAD_NANDF_D5__NAND_DATA05 0xb0b1
273 MX6QDL_PAD_NANDF_D6__NAND_DATA06 0xb0b1
274 MX6QDL_PAD_NANDF_D7__NAND_DATA07 0xb0b1
275 >;
276 };
277
278 pinctrl_i2c1: i2c1grp {
279 fsl,pins = <
280 MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
281 MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
282 >;
283 };
284
285 pinctrl_i2c2: i2c2grp {
286 fsl,pins = <
287 MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
288 MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
289 >;
290 };
291
292 pinctrl_i2c3: i2c3grp {
293 fsl,pins = <
294 MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1
295 MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
296 >;
297 };
298
299 pinctrl_uart1: uart1grp {
300 fsl,pins = <
301 MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA 0x1b0b1
302 MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA 0x1b0b1
303 >;
304 };
305
306 pinctrl_uart2: uart2grp {
307 fsl,pins = <
308 MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA 0x1b0b1
309 MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA 0x1b0b1
310 >;
311 };
312
313 pinctrl_uart3: uart3grp {
314 fsl,pins = <
315 MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1
316 MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1
317 >;
318 };
319
320 pinctrl_uart5: uart5grp {
321 fsl,pins = <
322 MX6QDL_PAD_KEY_COL1__UART5_TX_DATA 0x1b0b1
323 MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA 0x1b0b1
324 >;
325 };
326
327 pinctrl_usbotg: usbotggrp {
328 fsl,pins = <
329 MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059
330 >;
331 };
332 };
333};
334
335&pcie {
336 reset-gpio = <&gpio1 0 0>;
337 status = "okay";
338};
339
340&uart1 {
341 pinctrl-names = "default";
342 pinctrl-0 = <&pinctrl_uart1>;
343 status = "okay";
344};
345
346&uart2 {
347 pinctrl-names = "default";
348 pinctrl-0 = <&pinctrl_uart2>;
349 status = "okay";
350};
351
352&uart3 {
353 pinctrl-names = "default";
354 pinctrl-0 = <&pinctrl_uart3>;
355 status = "okay";
356};
357
358&uart5 {
359 pinctrl-names = "default";
360 pinctrl-0 = <&pinctrl_uart5>;
361 status = "okay";
362};
363
364&usbotg {
365 vbus-supply = <&reg_usb_otg_vbus>;
366 pinctrl-names = "default";
367 pinctrl-0 = <&pinctrl_usbotg>;
368 disable-over-current;
369 status = "okay";
370};
371
372&usbh1 {
373 status = "okay";
374};
diff --git a/arch/arm/boot/dts/imx6qdl-gw52xx.dtsi b/arch/arm/boot/dts/imx6qdl-gw52xx.dtsi
new file mode 100644
index 000000000000..8e99c9a9bc76
--- /dev/null
+++ b/arch/arm/boot/dts/imx6qdl-gw52xx.dtsi
@@ -0,0 +1,490 @@
1/*
2 * Copyright 2013 Gateworks Corporation
3 *
4 * The code contained herein is licensed under the GNU General Public
5 * License. You may obtain a copy of the GNU General Public License
6 * Version 2 or later at the following locations:
7 *
8 * http://www.opensource.org/licenses/gpl-license.html
9 * http://www.gnu.org/copyleft/gpl.html
10 */
11
12/ {
13 /* these are used by bootloader for disabling nodes */
14 aliases {
15 ethernet0 = &fec;
16 led0 = &led0;
17 led1 = &led1;
18 led2 = &led2;
19 nand = &gpmi;
20 ssi0 = &ssi1;
21 usb0 = &usbh1;
22 usb1 = &usbotg;
23 usdhc2 = &usdhc3;
24 };
25
26 chosen {
27 bootargs = "console=ttymxc1,115200";
28 };
29
30 leds {
31 compatible = "gpio-leds";
32
33 led0: user1 {
34 label = "user1";
35 gpios = <&gpio4 6 0>; /* 102 -> MX6_PANLEDG */
36 default-state = "on";
37 linux,default-trigger = "heartbeat";
38 };
39
40 led1: user2 {
41 label = "user2";
42 gpios = <&gpio4 7 0>; /* 103 -> MX6_PANLEDR */
43 default-state = "off";
44 };
45
46 led2: user3 {
47 label = "user3";
48 gpios = <&gpio4 15 1>; /* 111 - MX6_LOCLED# */
49 default-state = "off";
50 };
51 };
52
53 memory {
54 reg = <0x10000000 0x20000000>;
55 };
56
57 pps {
58 compatible = "pps-gpio";
59 gpios = <&gpio1 26 0>;
60 status = "okay";
61 };
62
63 regulators {
64 compatible = "simple-bus";
65 #address-cells = <1>;
66 #size-cells = <0>;
67
68 reg_1p0v: regulator@0 {
69 compatible = "regulator-fixed";
70 reg = <0>;
71 regulator-name = "1P0V";
72 regulator-min-microvolt = <1000000>;
73 regulator-max-microvolt = <1000000>;
74 regulator-always-on;
75 };
76
77 /* remove this fixed regulator once ltc3676__sw2 driver available */
78 reg_1p8v: regulator@1 {
79 compatible = "regulator-fixed";
80 reg = <1>;
81 regulator-name = "1P8V";
82 regulator-min-microvolt = <1800000>;
83 regulator-max-microvolt = <1800000>;
84 regulator-always-on;
85 };
86
87 reg_3p3v: regulator@2 {
88 compatible = "regulator-fixed";
89 reg = <2>;
90 regulator-name = "3P3V";
91 regulator-min-microvolt = <3300000>;
92 regulator-max-microvolt = <3300000>;
93 regulator-always-on;
94 };
95
96 reg_5p0v: regulator@3 {
97 compatible = "regulator-fixed";
98 reg = <3>;
99 regulator-name = "5P0V";
100 regulator-min-microvolt = <5000000>;
101 regulator-max-microvolt = <5000000>;
102 regulator-always-on;
103 };
104
105 reg_usb_otg_vbus: regulator@4 {
106 compatible = "regulator-fixed";
107 reg = <4>;
108 regulator-name = "usb_otg_vbus";
109 regulator-min-microvolt = <5000000>;
110 regulator-max-microvolt = <5000000>;
111 gpio = <&gpio3 22 0>;
112 enable-active-high;
113 };
114 };
115
116 sound {
117 compatible = "fsl,imx6q-sabrelite-sgtl5000",
118 "fsl,imx-audio-sgtl5000";
119 model = "imx6q-sabrelite-sgtl5000";
120 ssi-controller = <&ssi1>;
121 audio-codec = <&codec>;
122 audio-routing =
123 "MIC_IN", "Mic Jack",
124 "Mic Jack", "Mic Bias",
125 "Headphone Jack", "HP_OUT";
126 mux-int-port = <1>;
127 mux-ext-port = <4>;
128 };
129};
130
131&audmux {
132 pinctrl-names = "default";
133 pinctrl-0 = <&pinctrl_audmux>;
134 status = "okay";
135};
136
137&fec {
138 pinctrl-names = "default";
139 pinctrl-0 = <&pinctrl_enet>;
140 phy-mode = "rgmii";
141 phy-reset-gpios = <&gpio1 30 0>;
142 status = "okay";
143};
144
145&gpmi {
146 pinctrl-names = "default";
147 pinctrl-0 = <&pinctrl_gpmi_nand>;
148 status = "okay";
149};
150
151&i2c1 {
152 clock-frequency = <100000>;
153 pinctrl-names = "default";
154 pinctrl-0 = <&pinctrl_i2c1>;
155 status = "okay";
156
157 eeprom1: eeprom@50 {
158 compatible = "atmel,24c02";
159 reg = <0x50>;
160 pagesize = <16>;
161 };
162
163 eeprom2: eeprom@51 {
164 compatible = "atmel,24c02";
165 reg = <0x51>;
166 pagesize = <16>;
167 };
168
169 eeprom3: eeprom@52 {
170 compatible = "atmel,24c02";
171 reg = <0x52>;
172 pagesize = <16>;
173 };
174
175 eeprom4: eeprom@53 {
176 compatible = "atmel,24c02";
177 reg = <0x53>;
178 pagesize = <16>;
179 };
180
181 gpio: pca9555@23 {
182 compatible = "nxp,pca9555";
183 reg = <0x23>;
184 gpio-controller;
185 #gpio-cells = <2>;
186 };
187
188 hwmon: gsc@29 {
189 compatible = "gw,gsp";
190 reg = <0x29>;
191 };
192
193 rtc: ds1672@68 {
194 compatible = "dallas,ds1672";
195 reg = <0x68>;
196 };
197};
198
199&i2c2 {
200 clock-frequency = <100000>;
201 pinctrl-names = "default";
202 pinctrl-0 = <&pinctrl_i2c2>;
203 status = "okay";
204
205 pciswitch: pex8609@3f {
206 compatible = "plx,pex8609";
207 reg = <0x3f>;
208 };
209
210 pmic: ltc3676@3c {
211 compatible = "ltc,ltc3676";
212 reg = <0x3c>;
213
214 regulators {
215 sw1_reg: ltc3676__sw1 {
216 regulator-min-microvolt = <1175000>;
217 regulator-max-microvolt = <1175000>;
218 regulator-boot-on;
219 regulator-always-on;
220 };
221
222 sw2_reg: ltc3676__sw2 {
223 regulator-min-microvolt = <1800000>;
224 regulator-max-microvolt = <1800000>;
225 regulator-boot-on;
226 regulator-always-on;
227 };
228
229 sw3_reg: ltc3676__sw3 {
230 regulator-min-microvolt = <1175000>;
231 regulator-max-microvolt = <1175000>;
232 regulator-boot-on;
233 regulator-always-on;
234 };
235
236 sw4_reg: ltc3676__sw4 {
237 regulator-min-microvolt = <1500000>;
238 regulator-max-microvolt = <1500000>;
239 regulator-boot-on;
240 regulator-always-on;
241 };
242
243 ldo2_reg: ltc3676__ldo2 {
244 regulator-min-microvolt = <2500000>;
245 regulator-max-microvolt = <2500000>;
246 regulator-boot-on;
247 regulator-always-on;
248 };
249
250 ldo3_reg: ltc3676__ldo3 {
251 regulator-min-microvolt = <1800000>;
252 regulator-max-microvolt = <1800000>;
253 regulator-boot-on;
254 regulator-always-on;
255 };
256
257 ldo4_reg: ltc3676__ldo4 {
258 regulator-min-microvolt = <3000000>;
259 regulator-max-microvolt = <3000000>;
260 };
261 };
262 };
263};
264
265&i2c3 {
266 clock-frequency = <100000>;
267 pinctrl-names = "default";
268 pinctrl-0 = <&pinctrl_i2c3>;
269 status = "okay";
270
271 accelerometer: fxos8700@1e {
272 compatible = "fsl,fxos8700";
273 reg = <0x13>;
274 };
275
276 codec: sgtl5000@0a {
277 compatible = "fsl,sgtl5000";
278 reg = <0x0a>;
279 clocks = <&clks 169>;
280 VDDA-supply = <&reg_1p8v>;
281 VDDIO-supply = <&reg_3p3v>;
282 };
283
284 touchscreen: egalax_ts@04 {
285 compatible = "eeti,egalax_ts";
286 reg = <0x04>;
287 interrupt-parent = <&gpio7>;
288 interrupts = <12 2>; /* gpio7_12 active low */
289 wakeup-gpios = <&gpio7 12 0>;
290 };
291
292 videoin: adv7180@20 {
293 compatible = "adi,adv7180";
294 reg = <0x20>;
295 };
296};
297
298&iomuxc {
299 pinctrl-names = "default";
300 pinctrl-0 = <&pinctrl_hog>;
301
302 imx6qdl-gw52xx {
303 pinctrl_hog: hoggrp {
304 fsl,pins = <
305 MX6QDL_PAD_EIM_A19__GPIO2_IO19 0x80000000 /* MEZZ_DIO0 */
306 MX6QDL_PAD_EIM_A20__GPIO2_IO18 0x80000000 /* MEZZ_DIO1 */
307 MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x80000000 /* OTG_PWR_EN */
308 MX6QDL_PAD_EIM_D31__GPIO3_IO31 0x80000000 /* VIDDEC_PDN# */
309 MX6QDL_PAD_ENET_TXD0__GPIO1_IO30 0x80000000 /* PHY Reset */
310 MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x80000000 /* PCIE_RST# */
311 MX6QDL_PAD_ENET_RXD0__GPIO1_IO27 0x80000000 /* GPS_PWDN */
312 MX6QDL_PAD_ENET_RXD1__GPIO1_IO26 0x80000000 /* GPS_PPS */
313 MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x000130b0 /* AUD4_MCK */
314 MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x80000000 /* USB_SEL_PCI */
315 MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x80000000 /* TOUCH_IRQ# */
316 MX6QDL_PAD_KEY_COL0__GPIO4_IO06 0x80000000 /* user1 led */
317 MX6QDL_PAD_KEY_ROW0__GPIO4_IO07 0x80000000 /* user2 led */
318 MX6QDL_PAD_KEY_ROW4__GPIO4_IO15 0x80000000 /* user3 led */
319 MX6QDL_PAD_SD2_CMD__GPIO1_IO11 0x80000000 /* LVDS_TCH# */
320 MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x80000000 /* SD3_CD# */
321 MX6QDL_PAD_SD4_DAT3__GPIO2_IO11 0x80000000 /* UART2_EN# */
322 >;
323 };
324
325 pinctrl_audmux: audmuxgrp {
326 fsl,pins = <
327 MX6QDL_PAD_SD2_DAT0__AUD4_RXD 0x130b0
328 MX6QDL_PAD_SD2_DAT3__AUD4_TXC 0x130b0
329 MX6QDL_PAD_SD2_DAT2__AUD4_TXD 0x110b0
330 MX6QDL_PAD_SD2_DAT1__AUD4_TXFS 0x130b0
331 >;
332 };
333
334 pinctrl_enet: enetgrp {
335 fsl,pins = <
336 MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0
337 MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0
338 MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0
339 MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0
340 MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0
341 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0
342 MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0
343 MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0
344 MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0
345 MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0
346 MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0
347 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0
348 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
349 MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
350 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
351 MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8
352 >;
353 };
354
355 pinctrl_gpmi_nand: gpminandgrp {
356 fsl,pins = <
357 MX6QDL_PAD_NANDF_CLE__NAND_CLE 0xb0b1
358 MX6QDL_PAD_NANDF_ALE__NAND_ALE 0xb0b1
359 MX6QDL_PAD_NANDF_WP_B__NAND_WP_B 0xb0b1
360 MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0xb000
361 MX6QDL_PAD_NANDF_CS0__NAND_CE0_B 0xb0b1
362 MX6QDL_PAD_NANDF_CS1__NAND_CE1_B 0xb0b1
363 MX6QDL_PAD_SD4_CMD__NAND_RE_B 0xb0b1
364 MX6QDL_PAD_SD4_CLK__NAND_WE_B 0xb0b1
365 MX6QDL_PAD_NANDF_D0__NAND_DATA00 0xb0b1
366 MX6QDL_PAD_NANDF_D1__NAND_DATA01 0xb0b1
367 MX6QDL_PAD_NANDF_D2__NAND_DATA02 0xb0b1
368 MX6QDL_PAD_NANDF_D3__NAND_DATA03 0xb0b1
369 MX6QDL_PAD_NANDF_D4__NAND_DATA04 0xb0b1
370 MX6QDL_PAD_NANDF_D5__NAND_DATA05 0xb0b1
371 MX6QDL_PAD_NANDF_D6__NAND_DATA06 0xb0b1
372 MX6QDL_PAD_NANDF_D7__NAND_DATA07 0xb0b1
373 >;
374 };
375
376 pinctrl_i2c1: i2c1grp {
377 fsl,pins = <
378 MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
379 MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
380 >;
381 };
382
383 pinctrl_i2c2: i2c2grp {
384 fsl,pins = <
385 MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
386 MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
387 >;
388 };
389
390 pinctrl_i2c3: i2c3grp {
391 fsl,pins = <
392 MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1
393 MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
394 >;
395 };
396
397 pinctrl_uart1: uart1grp {
398 fsl,pins = <
399 MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA 0x1b0b1
400 MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA 0x1b0b1
401 >;
402 };
403
404 pinctrl_uart2: uart2grp {
405 fsl,pins = <
406 MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA 0x1b0b1
407 MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA 0x1b0b1
408 >;
409 };
410
411 pinctrl_uart5: uart5grp {
412 fsl,pins = <
413 MX6QDL_PAD_KEY_COL1__UART5_TX_DATA 0x1b0b1
414 MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA 0x1b0b1
415 >;
416 };
417
418 pinctrl_usbotg: usbotggrp {
419 fsl,pins = <
420 MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059
421 >;
422 };
423
424 pinctrl_usdhc3: usdhc3grp {
425 fsl,pins = <
426 MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
427 MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
428 MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
429 MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
430 MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
431 MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
432 >;
433 };
434 };
435};
436
437&ldb {
438 status = "okay";
439 lvds-channel@0 {
440 crtcs = <&ipu1 0>, <&ipu1 1>;
441 };
442};
443
444&pcie {
445 reset-gpio = <&gpio1 29 0>;
446 status = "okay";
447};
448
449&ssi1 {
450 fsl,mode = "i2s-slave";
451 status = "okay";
452};
453
454&uart1 {
455 pinctrl-names = "default";
456 pinctrl-0 = <&pinctrl_uart1>;
457 status = "okay";
458};
459
460&uart2 {
461 pinctrl-names = "default";
462 pinctrl-0 = <&pinctrl_uart2>;
463 status = "okay";
464};
465
466&uart5 {
467 pinctrl-names = "default";
468 pinctrl-0 = <&pinctrl_uart5>;
469 status = "okay";
470};
471
472&usbotg {
473 vbus-supply = <&reg_usb_otg_vbus>;
474 pinctrl-names = "default";
475 pinctrl-0 = <&pinctrl_usbotg>;
476 disable-over-current;
477 status = "okay";
478};
479
480&usbh1 {
481 status = "okay";
482};
483
484&usdhc3 {
485 pinctrl-names = "default";
486 pinctrl-0 = <&pinctrl_usdhc3>;
487 cd-gpios = <&gpio7 0 0>;
488 vmmc-supply = <&reg_3p3v>;
489 status = "okay";
490};
diff --git a/arch/arm/boot/dts/imx6qdl-gw53xx.dtsi b/arch/arm/boot/dts/imx6qdl-gw53xx.dtsi
new file mode 100644
index 000000000000..c8e5ae06deaf
--- /dev/null
+++ b/arch/arm/boot/dts/imx6qdl-gw53xx.dtsi
@@ -0,0 +1,553 @@
1/*
2 * Copyright 2013 Gateworks Corporation
3 *
4 * The code contained herein is licensed under the GNU General Public
5 * License. You may obtain a copy of the GNU General Public License
6 * Version 2 or later at the following locations:
7 *
8 * http://www.opensource.org/licenses/gpl-license.html
9 * http://www.gnu.org/copyleft/gpl.html
10 */
11
12/ {
13 /* these are used by bootloader for disabling nodes */
14 aliases {
15 can0 = &can1;
16 ethernet0 = &fec;
17 ethernet1 = &eth1;
18 led0 = &led0;
19 led1 = &led1;
20 led2 = &led2;
21 nand = &gpmi;
22 sky2 = &eth1;
23 ssi0 = &ssi1;
24 usb0 = &usbh1;
25 usb1 = &usbotg;
26 usdhc2 = &usdhc3;
27 };
28
29 chosen {
30 bootargs = "console=ttymxc1,115200";
31 };
32
33 leds {
34 compatible = "gpio-leds";
35
36 led0: user1 {
37 label = "user1";
38 gpios = <&gpio4 6 0>; /* 102 -> MX6_PANLEDG */
39 default-state = "on";
40 linux,default-trigger = "heartbeat";
41 };
42
43 led1: user2 {
44 label = "user2";
45 gpios = <&gpio4 7 0>; /* 103 -> MX6_PANLEDR */
46 default-state = "off";
47 };
48
49 led2: user3 {
50 label = "user3";
51 gpios = <&gpio4 15 1>; /* 111 -> MX6_LOCLED# */
52 default-state = "off";
53 };
54 };
55
56 memory {
57 reg = <0x10000000 0x40000000>;
58 };
59
60 pps {
61 compatible = "pps-gpio";
62 gpios = <&gpio1 26 0>;
63 status = "okay";
64 };
65
66 regulators {
67 compatible = "simple-bus";
68 #address-cells = <1>;
69 #size-cells = <0>;
70
71 reg_1p0v: regulator@0 {
72 compatible = "regulator-fixed";
73 reg = <0>;
74 regulator-name = "1P0V";
75 regulator-min-microvolt = <1000000>;
76 regulator-max-microvolt = <1000000>;
77 regulator-always-on;
78 };
79
80 /* remove when pmic 1p8 regulator available */
81 reg_1p8v: regulator@1 {
82 compatible = "regulator-fixed";
83 reg = <1>;
84 regulator-name = "1P8V";
85 regulator-min-microvolt = <1800000>;
86 regulator-max-microvolt = <1800000>;
87 regulator-always-on;
88 };
89
90 reg_3p3v: regulator@2 {
91 compatible = "regulator-fixed";
92 reg = <2>;
93 regulator-name = "3P3V";
94 regulator-min-microvolt = <3300000>;
95 regulator-max-microvolt = <3300000>;
96 regulator-always-on;
97 };
98
99 reg_usb_h1_vbus: regulator@3 {
100 compatible = "regulator-fixed";
101 reg = <3>;
102 regulator-name = "usb_h1_vbus";
103 regulator-min-microvolt = <5000000>;
104 regulator-max-microvolt = <5000000>;
105 regulator-always-on;
106 };
107
108 reg_usb_otg_vbus: regulator@4 {
109 compatible = "regulator-fixed";
110 reg = <4>;
111 regulator-name = "usb_otg_vbus";
112 regulator-min-microvolt = <5000000>;
113 regulator-max-microvolt = <5000000>;
114 gpio = <&gpio3 22 0>;
115 enable-active-high;
116 };
117 };
118
119 sound {
120 compatible = "fsl,imx6q-sabrelite-sgtl5000",
121 "fsl,imx-audio-sgtl5000";
122 model = "imx6q-sabrelite-sgtl5000";
123 ssi-controller = <&ssi1>;
124 audio-codec = <&codec>;
125 audio-routing =
126 "MIC_IN", "Mic Jack",
127 "Mic Jack", "Mic Bias",
128 "Headphone Jack", "HP_OUT";
129 mux-int-port = <1>;
130 mux-ext-port = <4>;
131 };
132};
133
134&audmux {
135 pinctrl-names = "default";
136 pinctrl-0 = <&pinctrl_audmux>;
137 status = "okay";
138};
139
140&can1 {
141 pinctrl-names = "default";
142 pinctrl-0 = <&pinctrl_flexcan1>;
143 status = "okay";
144};
145
146&fec {
147 pinctrl-names = "default";
148 pinctrl-0 = <&pinctrl_enet>;
149 phy-mode = "rgmii";
150 phy-reset-gpios = <&gpio1 30 0>;
151 status = "okay";
152};
153
154&gpmi {
155 pinctrl-names = "default";
156 pinctrl-0 = <&pinctrl_gpmi_nand>;
157 status = "okay";
158};
159
160&i2c1 {
161 clock-frequency = <100000>;
162 pinctrl-names = "default";
163 pinctrl-0 = <&pinctrl_i2c1>;
164 status = "okay";
165
166 eeprom1: eeprom@50 {
167 compatible = "atmel,24c02";
168 reg = <0x50>;
169 pagesize = <16>;
170 };
171
172 eeprom2: eeprom@51 {
173 compatible = "atmel,24c02";
174 reg = <0x51>;
175 pagesize = <16>;
176 };
177
178 eeprom3: eeprom@52 {
179 compatible = "atmel,24c02";
180 reg = <0x52>;
181 pagesize = <16>;
182 };
183
184 eeprom4: eeprom@53 {
185 compatible = "atmel,24c02";
186 reg = <0x53>;
187 pagesize = <16>;
188 };
189
190 gpio: pca9555@23 {
191 compatible = "nxp,pca9555";
192 reg = <0x23>;
193 gpio-controller;
194 #gpio-cells = <2>;
195 };
196
197 hwmon: gsc@29 {
198 compatible = "gw,gsp";
199 reg = <0x29>;
200 };
201
202 rtc: ds1672@68 {
203 compatible = "dallas,ds1672";
204 reg = <0x68>;
205 };
206};
207
208&i2c2 {
209 clock-frequency = <100000>;
210 pinctrl-names = "default";
211 pinctrl-0 = <&pinctrl_i2c2>;
212 status = "okay";
213
214 pciclkgen: si53156@6b {
215 compatible = "sil,si53156";
216 reg = <0x6b>;
217 };
218
219 pciswitch: pex8606@3f {
220 compatible = "plx,pex8606";
221 reg = <0x3f>;
222 };
223
224 pmic: ltc3676@3c {
225 compatible = "ltc,ltc3676";
226 reg = <0x3c>;
227
228 regulators {
229 /* VDD_SOC */
230 sw1_reg: ltc3676__sw1 {
231 regulator-min-microvolt = <1175000>;
232 regulator-max-microvolt = <1175000>;
233 regulator-boot-on;
234 regulator-always-on;
235 };
236
237 /* VDD_1P8 */
238 sw2_reg: ltc3676__sw2 {
239 regulator-min-microvolt = <1800000>;
240 regulator-max-microvolt = <1800000>;
241 regulator-boot-on;
242 regulator-always-on;
243 };
244
245 /* VDD_ARM */
246 sw3_reg: ltc3676__sw3 {
247 regulator-min-microvolt = <1175000>;
248 regulator-max-microvolt = <1175000>;
249 regulator-boot-on;
250 regulator-always-on;
251 };
252
253 /* VDD_DDR */
254 sw4_reg: ltc3676__sw4 {
255 regulator-min-microvolt = <1500000>;
256 regulator-max-microvolt = <1500000>;
257 regulator-boot-on;
258 regulator-always-on;
259 };
260
261 /* VDD_2P5 */
262 ldo2_reg: ltc3676__ldo2 {
263 regulator-min-microvolt = <2500000>;
264 regulator-max-microvolt = <2500000>;
265 regulator-boot-on;
266 regulator-always-on;
267 };
268
269 /* VDD_1P8 */
270 ldo3_reg: ltc3676__ldo3 {
271 regulator-min-microvolt = <1800000>;
272 regulator-max-microvolt = <1800000>;
273 regulator-boot-on;
274 regulator-always-on;
275 };
276
277 /* VDD_HIGH */
278 ldo4_reg: ltc3676__ldo4 {
279 regulator-min-microvolt = <3000000>;
280 regulator-max-microvolt = <3000000>;
281 };
282 };
283 };
284};
285
286&i2c3 {
287 clock-frequency = <100000>;
288 pinctrl-names = "default";
289 pinctrl-0 = <&pinctrl_i2c3>;
290 status = "okay";
291
292 accelerometer: fxos8700@1e {
293 compatible = "fsl,fxos8700";
294 reg = <0x1e>;
295 };
296
297 codec: sgtl5000@0a {
298 compatible = "fsl,sgtl5000";
299 reg = <0x0a>;
300 clocks = <&clks 201>;
301 VDDA-supply = <&reg_1p8v>;
302 VDDIO-supply = <&reg_3p3v>;
303 };
304
305 hdmiin: adv7611@4c {
306 compatible = "adi,adv7611";
307 reg = <0x4c>;
308 };
309
310 touchscreen: egalax_ts@04 {
311 compatible = "eeti,egalax_ts";
312 reg = <0x04>;
313 interrupt-parent = <&gpio1>;
314 interrupts = <11 2>; /* gpio1_11 active low */
315 wakeup-gpios = <&gpio1 11 0>;
316 };
317
318 videoout: adv7393@2a {
319 compatible = "adi,adv7393";
320 reg = <0x2a>;
321 };
322
323 videoin: adv7180@20 {
324 compatible = "adi,adv7180";
325 reg = <0x20>;
326 };
327};
328
329&iomuxc {
330 pinctrl-names = "default";
331 pinctrl-0 = <&pinctrl_hog>;
332
333 imx6qdl-gw53xx {
334 pinctrl_hog: hoggrp {
335 fsl,pins = <
336 MX6QDL_PAD_EIM_A19__GPIO2_IO19 0x80000000 /* PCIE6EXP_DIO0 */
337 MX6QDL_PAD_EIM_A20__GPIO2_IO18 0x80000000 /* PCIE6EXP_DIO1 */
338 MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x80000000 /* OTG_PWR_EN */
339 MX6QDL_PAD_ENET_RXD0__GPIO1_IO27 0x80000000 /* GPS_SHDN */
340 MX6QDL_PAD_ENET_RXD1__GPIO1_IO26 0x80000000 /* GPS_PPS */
341 MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28 0x80000000 /* PCIE IRQ */
342 MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x80000000 /* PCIE RST */
343 MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x000130b0 /* AUD4_MCK */
344 MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x80000000 /* CAN_STBY */
345 MX6QDL_PAD_GPIO_8__GPIO1_IO08 0x80000000 /* PMIC_IRQ# */
346 MX6QDL_PAD_GPIO_9__GPIO1_IO09 0x80000000 /* HUB_RST# */
347 MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x80000000 /* PCIE_WDIS# */
348 MX6QDL_PAD_GPIO_19__GPIO4_IO05 0x80000000 /* ACCEL_IRQ# */
349 MX6QDL_PAD_KEY_COL0__GPIO4_IO06 0x80000000 /* user1 led */
350 MX6QDL_PAD_KEY_COL4__GPIO4_IO14 0x80000000 /* USBOTG_OC# */
351 MX6QDL_PAD_KEY_ROW0__GPIO4_IO07 0x80000000 /* user2 led */
352 MX6QDL_PAD_KEY_ROW4__GPIO4_IO15 0x80000000 /* user3 led */
353 MX6QDL_PAD_SD2_CMD__GPIO1_IO11 0x80000000 /* TOUCH_IRQ# */
354 MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x80000000 /* SD3_DET# */
355 >;
356 };
357
358 pinctrl_audmux: audmuxgrp {
359 fsl,pins = <
360 MX6QDL_PAD_SD2_DAT0__AUD4_RXD 0x130b0
361 MX6QDL_PAD_SD2_DAT3__AUD4_TXC 0x130b0
362 MX6QDL_PAD_SD2_DAT2__AUD4_TXD 0x110b0
363 MX6QDL_PAD_SD2_DAT1__AUD4_TXFS 0x130b0
364 >;
365 };
366
367 pinctrl_enet: enetgrp {
368 fsl,pins = <
369 MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0
370 MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0
371 MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0
372 MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0
373 MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0
374 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0
375 MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0
376 MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0
377 MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0
378 MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0
379 MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0
380 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0
381 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
382 MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
383 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
384 MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8
385 >;
386 };
387
388 pinctrl_flexcan1: flexcan1grp {
389 fsl,pins = <
390 MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX 0x80000000
391 MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX 0x80000000
392 >;
393 };
394
395 pinctrl_gpmi_nand: gpminandgrp {
396 fsl,pins = <
397 MX6QDL_PAD_NANDF_CLE__NAND_CLE 0xb0b1
398 MX6QDL_PAD_NANDF_ALE__NAND_ALE 0xb0b1
399 MX6QDL_PAD_NANDF_WP_B__NAND_WP_B 0xb0b1
400 MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0xb000
401 MX6QDL_PAD_NANDF_CS0__NAND_CE0_B 0xb0b1
402 MX6QDL_PAD_NANDF_CS1__NAND_CE1_B 0xb0b1
403 MX6QDL_PAD_SD4_CMD__NAND_RE_B 0xb0b1
404 MX6QDL_PAD_SD4_CLK__NAND_WE_B 0xb0b1
405 MX6QDL_PAD_NANDF_D0__NAND_DATA00 0xb0b1
406 MX6QDL_PAD_NANDF_D1__NAND_DATA01 0xb0b1
407 MX6QDL_PAD_NANDF_D2__NAND_DATA02 0xb0b1
408 MX6QDL_PAD_NANDF_D3__NAND_DATA03 0xb0b1
409 MX6QDL_PAD_NANDF_D4__NAND_DATA04 0xb0b1
410 MX6QDL_PAD_NANDF_D5__NAND_DATA05 0xb0b1
411 MX6QDL_PAD_NANDF_D6__NAND_DATA06 0xb0b1
412 MX6QDL_PAD_NANDF_D7__NAND_DATA07 0xb0b1
413 >;
414 };
415
416 pinctrl_i2c1: i2c1grp {
417 fsl,pins = <
418 MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
419 MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
420 >;
421 };
422
423 pinctrl_i2c2: i2c2grp {
424 fsl,pins = <
425 MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
426 MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
427 >;
428 };
429
430 pinctrl_i2c3: i2c3grp {
431 fsl,pins = <
432 MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1
433 MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
434 >;
435 };
436
437 pinctrl_uart1: uart1grp {
438 fsl,pins = <
439 MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA 0x1b0b1
440 MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA 0x1b0b1
441 >;
442 };
443
444 pinctrl_uart2: uart2grp {
445 fsl,pins = <
446 MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA 0x1b0b1
447 MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA 0x1b0b1
448 >;
449 };
450
451 pinctrl_uart5: uart5grp {
452 fsl,pins = <
453 MX6QDL_PAD_KEY_COL1__UART5_TX_DATA 0x1b0b1
454 MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA 0x1b0b1
455 >;
456 };
457
458 pinctrl_usbotg: usbotggrp {
459 fsl,pins = <
460 MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059
461 >;
462 };
463
464 pinctrl_usdhc3: usdhc3grp {
465 fsl,pins = <
466 MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
467 MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
468 MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
469 MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
470 MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
471 MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
472 >;
473 };
474 };
475};
476
477&ldb {
478 status = "okay";
479
480 lvds-channel@1 {
481 fsl,data-mapping = "spwg";
482 fsl,data-width = <18>;
483 status = "okay";
484
485 display-timings {
486 native-mode = <&timing0>;
487 timing0: hsd100pxn1 {
488 clock-frequency = <65000000>;
489 hactive = <1024>;
490 vactive = <768>;
491 hback-porch = <220>;
492 hfront-porch = <40>;
493 vback-porch = <21>;
494 vfront-porch = <7>;
495 hsync-len = <60>;
496 vsync-len = <10>;
497 };
498 };
499 };
500};
501
502&pcie {
503 reset-gpio = <&gpio1 29 0>;
504 status = "okay";
505
506 eth1: sky2@8 { /* MAC/PHY on bus 8 */
507 compatible = "marvell,sky2";
508 };
509};
510
511&ssi1 {
512 fsl,mode = "i2s-slave";
513 status = "okay";
514};
515
516&uart1 {
517 pinctrl-names = "default";
518 pinctrl-0 = <&pinctrl_uart1>;
519 status = "okay";
520};
521
522&uart2 {
523 pinctrl-names = "default";
524 pinctrl-0 = <&pinctrl_uart2>;
525 status = "okay";
526};
527
528&uart5 {
529 pinctrl-names = "default";
530 pinctrl-0 = <&pinctrl_uart5>;
531 status = "okay";
532};
533
534&usbotg {
535 vbus-supply = <&reg_usb_otg_vbus>;
536 pinctrl-names = "default";
537 pinctrl-0 = <&pinctrl_usbotg>;
538 disable-over-current;
539 status = "okay";
540};
541
542&usbh1 {
543 vbus-supply = <&reg_usb_h1_vbus>;
544 status = "okay";
545};
546
547&usdhc3 {
548 pinctrl-names = "default";
549 pinctrl-0 = <&pinctrl_usdhc3>;
550 cd-gpios = <&gpio7 0 0>;
551 vmmc-supply = <&reg_3p3v>;
552 status = "okay";
553};
diff --git a/arch/arm/boot/dts/imx6qdl-gw54xx.dtsi b/arch/arm/boot/dts/imx6qdl-gw54xx.dtsi
new file mode 100644
index 000000000000..2795dfc8c926
--- /dev/null
+++ b/arch/arm/boot/dts/imx6qdl-gw54xx.dtsi
@@ -0,0 +1,580 @@
1/*
2 * Copyright 2013 Gateworks Corporation
3 *
4 * The code contained herein is licensed under the GNU General Public
5 * License. You may obtain a copy of the GNU General Public License
6 * Version 2 or later at the following locations:
7 *
8 * http://www.opensource.org/licenses/gpl-license.html
9 * http://www.gnu.org/copyleft/gpl.html
10 */
11
12/ {
13 /* these are used by bootloader for disabling nodes */
14 aliases {
15 can0 = &can1;
16 ethernet0 = &fec;
17 ethernet1 = &eth1;
18 led0 = &led0;
19 led1 = &led1;
20 led2 = &led2;
21 nand = &gpmi;
22 sky2 = &eth1;
23 ssi0 = &ssi1;
24 usb0 = &usbh1;
25 usb1 = &usbotg;
26 usdhc2 = &usdhc3;
27 };
28
29 chosen {
30 bootargs = "console=ttymxc1,115200";
31 };
32
33 leds {
34 compatible = "gpio-leds";
35
36 led0: user1 {
37 label = "user1";
38 gpios = <&gpio4 6 0>; /* 102 -> MX6_PANLEDG */
39 default-state = "on";
40 linux,default-trigger = "heartbeat";
41 };
42
43 led1: user2 {
44 label = "user2";
45 gpios = <&gpio4 7 0>; /* 103 -> MX6_PANLEDR */
46 default-state = "off";
47 };
48
49 led2: user3 {
50 label = "user3";
51 gpios = <&gpio4 15 1>; /* 111 -> MX6_LOCLED# */
52 default-state = "off";
53 };
54 };
55
56 memory {
57 reg = <0x10000000 0x40000000>;
58 };
59
60 pps {
61 compatible = "pps-gpio";
62 gpios = <&gpio1 26 0>;
63 status = "okay";
64 };
65
66 regulators {
67 compatible = "simple-bus";
68 #address-cells = <1>;
69 #size-cells = <0>;
70
71 reg_1p0v: regulator@0 {
72 compatible = "regulator-fixed";
73 reg = <0>;
74 regulator-name = "1P0V";
75 regulator-min-microvolt = <1000000>;
76 regulator-max-microvolt = <1000000>;
77 regulator-always-on;
78 };
79
80 reg_3p3v: regulator@1 {
81 compatible = "regulator-fixed";
82 reg = <1>;
83 regulator-name = "3P3V";
84 regulator-min-microvolt = <3300000>;
85 regulator-max-microvolt = <3300000>;
86 regulator-always-on;
87 };
88
89 reg_usb_h1_vbus: regulator@2 {
90 compatible = "regulator-fixed";
91 reg = <2>;
92 regulator-name = "usb_h1_vbus";
93 regulator-min-microvolt = <5000000>;
94 regulator-max-microvolt = <5000000>;
95 regulator-always-on;
96 };
97
98 reg_usb_otg_vbus: regulator@3 {
99 compatible = "regulator-fixed";
100 reg = <3>;
101 regulator-name = "usb_otg_vbus";
102 regulator-min-microvolt = <5000000>;
103 regulator-max-microvolt = <5000000>;
104 gpio = <&gpio3 22 0>;
105 enable-active-high;
106 };
107 };
108
109 sound {
110 compatible = "fsl,imx6q-sabrelite-sgtl5000",
111 "fsl,imx-audio-sgtl5000";
112 model = "imx6q-sabrelite-sgtl5000";
113 ssi-controller = <&ssi1>;
114 audio-codec = <&codec>;
115 audio-routing =
116 "MIC_IN", "Mic Jack",
117 "Mic Jack", "Mic Bias",
118 "Headphone Jack", "HP_OUT";
119 mux-int-port = <1>;
120 mux-ext-port = <4>;
121 };
122};
123
124&audmux {
125 pinctrl-names = "default";
126 pinctrl-0 = <&pinctrl_audmux>; /* AUD4<->sgtl5000 */
127 status = "okay";
128};
129
130&can1 {
131 pinctrl-names = "default";
132 pinctrl-0 = <&pinctrl_flexcan1>;
133 status = "okay";
134};
135
136&fec {
137 pinctrl-names = "default";
138 pinctrl-0 = <&pinctrl_enet>;
139 phy-mode = "rgmii";
140 phy-reset-gpios = <&gpio1 30 0>;
141 status = "okay";
142};
143
144&gpmi {
145 pinctrl-names = "default";
146 pinctrl-0 = <&pinctrl_gpmi_nand>;
147 status = "okay";
148};
149
150&i2c1 {
151 clock-frequency = <100000>;
152 pinctrl-names = "default";
153 pinctrl-0 = <&pinctrl_i2c1>;
154 status = "okay";
155
156 eeprom1: eeprom@50 {
157 compatible = "atmel,24c02";
158 reg = <0x50>;
159 pagesize = <16>;
160 };
161
162 eeprom2: eeprom@51 {
163 compatible = "atmel,24c02";
164 reg = <0x51>;
165 pagesize = <16>;
166 };
167
168 eeprom3: eeprom@52 {
169 compatible = "atmel,24c02";
170 reg = <0x52>;
171 pagesize = <16>;
172 };
173
174 eeprom4: eeprom@53 {
175 compatible = "atmel,24c02";
176 reg = <0x53>;
177 pagesize = <16>;
178 };
179
180 gpio: pca9555@23 {
181 compatible = "nxp,pca9555";
182 reg = <0x23>;
183 gpio-controller;
184 #gpio-cells = <2>;
185 };
186
187 hwmon: gsc@29 {
188 compatible = "gw,gsp";
189 reg = <0x29>;
190 };
191
192 rtc: ds1672@68 {
193 compatible = "dallas,ds1672";
194 reg = <0x68>;
195 };
196};
197
198&i2c2 {
199 clock-frequency = <100000>;
200 pinctrl-names = "default";
201 pinctrl-0 = <&pinctrl_i2c2>;
202 status = "okay";
203
204 pmic: pfuze100@08 {
205 compatible = "fsl,pfuze100";
206 reg = <0x08>;
207
208 regulators {
209 sw1a_reg: sw1ab {
210 regulator-min-microvolt = <300000>;
211 regulator-max-microvolt = <1875000>;
212 regulator-boot-on;
213 regulator-always-on;
214 regulator-ramp-delay = <6250>;
215 };
216
217 sw1c_reg: sw1c {
218 regulator-min-microvolt = <300000>;
219 regulator-max-microvolt = <1875000>;
220 regulator-boot-on;
221 regulator-always-on;
222 regulator-ramp-delay = <6250>;
223 };
224
225 sw2_reg: sw2 {
226 regulator-min-microvolt = <800000>;
227 regulator-max-microvolt = <3950000>;
228 regulator-boot-on;
229 regulator-always-on;
230 };
231
232 sw3a_reg: sw3a {
233 regulator-min-microvolt = <400000>;
234 regulator-max-microvolt = <1975000>;
235 regulator-boot-on;
236 regulator-always-on;
237 };
238
239 sw3b_reg: sw3b {
240 regulator-min-microvolt = <400000>;
241 regulator-max-microvolt = <1975000>;
242 regulator-boot-on;
243 regulator-always-on;
244 };
245
246 sw4_reg: sw4 {
247 regulator-min-microvolt = <800000>;
248 regulator-max-microvolt = <3300000>;
249 };
250
251 swbst_reg: swbst {
252 regulator-min-microvolt = <5000000>;
253 regulator-max-microvolt = <5150000>;
254 };
255
256 snvs_reg: vsnvs {
257 regulator-min-microvolt = <1000000>;
258 regulator-max-microvolt = <3000000>;
259 regulator-boot-on;
260 regulator-always-on;
261 };
262
263 vref_reg: vrefddr {
264 regulator-boot-on;
265 regulator-always-on;
266 };
267
268 vgen1_reg: vgen1 {
269 regulator-min-microvolt = <800000>;
270 regulator-max-microvolt = <1550000>;
271 };
272
273 vgen2_reg: vgen2 {
274 regulator-min-microvolt = <800000>;
275 regulator-max-microvolt = <1550000>;
276 };
277
278 vgen3_reg: vgen3 {
279 regulator-min-microvolt = <1800000>;
280 regulator-max-microvolt = <3300000>;
281 };
282
283 vgen4_reg: vgen4 {
284 regulator-min-microvolt = <1800000>;
285 regulator-max-microvolt = <3300000>;
286 regulator-always-on;
287 };
288
289 vgen5_reg: vgen5 {
290 regulator-min-microvolt = <1800000>;
291 regulator-max-microvolt = <3300000>;
292 regulator-always-on;
293 };
294
295 vgen6_reg: vgen6 {
296 regulator-min-microvolt = <1800000>;
297 regulator-max-microvolt = <3300000>;
298 regulator-always-on;
299 };
300 };
301 };
302
303 pciswitch: pex8609@3f {
304 compatible = "plx,pex8609";
305 reg = <0x3f>;
306 };
307
308 pciclkgen: si52147@6b {
309 compatible = "sil,si52147";
310 reg = <0x6b>;
311 };
312};
313
314&i2c3 {
315 clock-frequency = <100000>;
316 pinctrl-names = "default";
317 pinctrl-0 = <&pinctrl_i2c3>;
318 status = "okay";
319
320 accelerometer: fxos8700@1e {
321 compatible = "fsl,fxos8700";
322 reg = <0x1e>;
323 };
324
325 codec: sgtl5000@0a {
326 compatible = "fsl,sgtl5000";
327 reg = <0x0a>;
328 clocks = <&clks 201>;
329 VDDA-supply = <&sw4_reg>;
330 VDDIO-supply = <&reg_3p3v>;
331 };
332
333 hdmiin: adv7611@4c {
334 compatible = "adi,adv7611";
335 reg = <0x4c>;
336 };
337
338 touchscreen: egalax_ts@04 {
339 compatible = "eeti,egalax_ts";
340 reg = <0x04>;
341 interrupt-parent = <&gpio7>;
342 interrupts = <12 2>; /* gpio7_12 active low */
343 wakeup-gpios = <&gpio7 12 0>;
344 };
345
346 videoout: adv7393@2a {
347 compatible = "adi,adv7393";
348 reg = <0x2a>;
349 };
350
351 videoin: adv7180@20 {
352 compatible = "adi,adv7180";
353 reg = <0x20>;
354 };
355};
356
357&iomuxc {
358 pinctrl-names = "default";
359 pinctrl-0 = <&pinctrl_hog>;
360
361 imx6qdl-gw54xx {
362 pinctrl_hog: hoggrp {
363 fsl,pins = <
364 MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x80000000 /* OTG_PWR_EN */
365 MX6QDL_PAD_EIM_D19__GPIO3_IO19 0x80000000 /* SPINOR_CS0# */
366 MX6QDL_PAD_ENET_RXD1__GPIO1_IO26 0x80000000 /* GPS_PPS */
367 MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28 0x80000000 /* PCIE IRQ */
368 MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x80000000 /* PCIE RST */
369 MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x000130b0 /* AUD4_MCK */
370 MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x80000000 /* CAN_STBY */
371 MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x80000000 /* TOUCH_IRQ# */
372 MX6QDL_PAD_KEY_COL0__GPIO4_IO06 0x80000000 /* user1 led */
373 MX6QDL_PAD_KEY_ROW0__GPIO4_IO07 0x80000000 /* user2 led */
374 MX6QDL_PAD_KEY_ROW4__GPIO4_IO15 0x80000000 /* user3 led */
375 MX6QDL_PAD_SD1_DAT0__GPIO1_IO16 0x80000000 /* USBHUB_RST# */
376 MX6QDL_PAD_SD1_DAT3__GPIO1_IO21 0x80000000 /* MIPI_DIO */
377 >;
378 };
379
380 pinctrl_audmux: audmuxgrp {
381 fsl,pins = <
382 MX6QDL_PAD_SD2_DAT0__AUD4_RXD 0x130b0
383 MX6QDL_PAD_SD2_DAT3__AUD4_TXC 0x130b0
384 MX6QDL_PAD_SD2_DAT2__AUD4_TXD 0x110b0
385 MX6QDL_PAD_SD2_DAT1__AUD4_TXFS 0x130b0
386 >;
387 };
388
389 pinctrl_enet: enetgrp {
390 fsl,pins = <
391 MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0
392 MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0
393 MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0
394 MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0
395 MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0
396 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0
397 MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0
398 MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0
399 MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0
400 MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0
401 MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0
402 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0
403 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
404 MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
405 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
406 MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8
407 >;
408 };
409
410 pinctrl_flexcan1: flexcan1grp {
411 fsl,pins = <
412 MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX 0x80000000
413 MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX 0x80000000
414 >;
415 };
416
417 pinctrl_gpmi_nand: gpminandgrp {
418 fsl,pins = <
419 MX6QDL_PAD_NANDF_CLE__NAND_CLE 0xb0b1
420 MX6QDL_PAD_NANDF_ALE__NAND_ALE 0xb0b1
421 MX6QDL_PAD_NANDF_WP_B__NAND_WP_B 0xb0b1
422 MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0xb000
423 MX6QDL_PAD_NANDF_CS0__NAND_CE0_B 0xb0b1
424 MX6QDL_PAD_NANDF_CS1__NAND_CE1_B 0xb0b1
425 MX6QDL_PAD_SD4_CMD__NAND_RE_B 0xb0b1
426 MX6QDL_PAD_SD4_CLK__NAND_WE_B 0xb0b1
427 MX6QDL_PAD_NANDF_D0__NAND_DATA00 0xb0b1
428 MX6QDL_PAD_NANDF_D1__NAND_DATA01 0xb0b1
429 MX6QDL_PAD_NANDF_D2__NAND_DATA02 0xb0b1
430 MX6QDL_PAD_NANDF_D3__NAND_DATA03 0xb0b1
431 MX6QDL_PAD_NANDF_D4__NAND_DATA04 0xb0b1
432 MX6QDL_PAD_NANDF_D5__NAND_DATA05 0xb0b1
433 MX6QDL_PAD_NANDF_D6__NAND_DATA06 0xb0b1
434 MX6QDL_PAD_NANDF_D7__NAND_DATA07 0xb0b1
435 >;
436 };
437
438 pinctrl_i2c1: i2c1grp {
439 fsl,pins = <
440 MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
441 MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
442 >;
443 };
444
445 pinctrl_i2c2: i2c2grp {
446 fsl,pins = <
447 MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
448 MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
449 >;
450 };
451
452 pinctrl_i2c3: i2c3grp {
453 fsl,pins = <
454 MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1
455 MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
456 >;
457 };
458
459 pinctrl_uart1: uart1grp {
460 fsl,pins = <
461 MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA 0x1b0b1
462 MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA 0x1b0b1
463 >;
464 };
465
466 pinctrl_uart2: uart2grp {
467 fsl,pins = <
468 MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA 0x1b0b1
469 MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA 0x1b0b1
470 >;
471 };
472
473 pinctrl_uart5: uart5grp {
474 fsl,pins = <
475 MX6QDL_PAD_KEY_COL1__UART5_TX_DATA 0x1b0b1
476 MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA 0x1b0b1
477 >;
478 };
479
480 pinctrl_usbotg: usbotggrp {
481 fsl,pins = <
482 MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059
483 >;
484 };
485
486 pinctrl_usdhc3: usdhc3grp {
487 fsl,pins = <
488 MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
489 MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
490 MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
491 MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
492 MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
493 MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
494 >;
495 };
496 };
497};
498
499&ldb {
500 status = "okay";
501
502 lvds-channel@1 {
503 fsl,data-mapping = "spwg";
504 fsl,data-width = <18>;
505 status = "okay";
506
507 display-timings {
508 native-mode = <&timing0>;
509 timing0: hsd100pxn1 {
510 clock-frequency = <65000000>;
511 hactive = <1024>;
512 vactive = <768>;
513 hback-porch = <220>;
514 hfront-porch = <40>;
515 vback-porch = <21>;
516 vfront-porch = <7>;
517 hsync-len = <60>;
518 vsync-len = <10>;
519 };
520 };
521 };
522};
523
524&pcie {
525 reset-gpio = <&gpio1 29 0>;
526 status = "okay";
527
528 eth1: sky2@8 { /* MAC/PHY on bus 8 */
529 compatible = "marvell,sky2";
530 };
531};
532
533&ssi1 {
534 fsl,mode = "i2s-slave";
535 status = "okay";
536};
537
538&ssi2 {
539 fsl,mode = "i2s-slave";
540 status = "okay";
541};
542
543&uart1 {
544 pinctrl-names = "default";
545 pinctrl-0 = <&pinctrl_uart1>;
546 status = "okay";
547};
548
549&uart2 {
550 pinctrl-names = "default";
551 pinctrl-0 = <&pinctrl_uart2>;
552 status = "okay";
553};
554
555&uart5 {
556 pinctrl-names = "default";
557 pinctrl-0 = <&pinctrl_uart5>;
558 status = "okay";
559};
560
561&usbotg {
562 vbus-supply = <&reg_usb_otg_vbus>;
563 pinctrl-names = "default";
564 pinctrl-0 = <&pinctrl_usbotg>;
565 disable-over-current;
566 status = "okay";
567};
568
569&usbh1 {
570 vbus-supply = <&reg_usb_h1_vbus>;
571 status = "okay";
572};
573
574&usdhc3 {
575 pinctrl-names = "default";
576 pinctrl-0 = <&pinctrl_usdhc3>;
577 cd-gpios = <&gpio7 0 0>;
578 vmmc-supply = <&reg_3p3v>;
579 status = "okay";
580};