diff options
author | Richard Zhao <richard.zhao@freescale.com> | 2012-05-08 22:47:20 -0400 |
---|---|---|
committer | Shawn Guo <shawn.guo@linaro.org> | 2012-05-11 03:18:02 -0400 |
commit | d99a79fcf4cbbc4dc6dc1e21e6860b97357269ea (patch) | |
tree | 4da02f866c8b8ac7c3e1e074e392119b27eb78a9 /arch/arm/boot | |
parent | f965cd55e29ee582dd58531c7afd5fc061e0b7e4 (diff) |
ARM: dts: imx6q-sabrelite: add i2c1 pinctrl support
Signed-off-by: Richard Zhao <richard.zhao@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Diffstat (limited to 'arch/arm/boot')
-rw-r--r-- | arch/arm/boot/dts/imx6q-sabrelite.dts | 2 | ||||
-rw-r--r-- | arch/arm/boot/dts/imx6q.dtsi | 7 |
2 files changed, 9 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/imx6q-sabrelite.dts b/arch/arm/boot/dts/imx6q-sabrelite.dts index 2f631f25fffe..85b7c6c1ecf2 100644 --- a/arch/arm/boot/dts/imx6q-sabrelite.dts +++ b/arch/arm/boot/dts/imx6q-sabrelite.dts | |||
@@ -76,6 +76,8 @@ | |||
76 | i2c@021a0000 { /* I2C1 */ | 76 | i2c@021a0000 { /* I2C1 */ |
77 | status = "okay"; | 77 | status = "okay"; |
78 | clock-frequency = <100000>; | 78 | clock-frequency = <100000>; |
79 | pinctrl-names = "default"; | ||
80 | pinctrl-0 = <&pinctrl_i2c1_1>; | ||
79 | 81 | ||
80 | codec: sgtl5000@0a { | 82 | codec: sgtl5000@0a { |
81 | compatible = "fsl,sgtl5000"; | 83 | compatible = "fsl,sgtl5000"; |
diff --git a/arch/arm/boot/dts/imx6q.dtsi b/arch/arm/boot/dts/imx6q.dtsi index b5a15c4c2fdc..32ea8998c72e 100644 --- a/arch/arm/boot/dts/imx6q.dtsi +++ b/arch/arm/boot/dts/imx6q.dtsi | |||
@@ -486,6 +486,13 @@ | |||
486 | reg = <0x020e0000 0x4000>; | 486 | reg = <0x020e0000 0x4000>; |
487 | 487 | ||
488 | /* shared pinctrl settings */ | 488 | /* shared pinctrl settings */ |
489 | i2c1 { | ||
490 | pinctrl_i2c1_1: i2c1grp-1 { | ||
491 | fsl,pins = <137 0x4001b8b1 /* MX6Q_PAD_EIM_D21__I2C1_SCL */ | ||
492 | 196 0x4001b8b1>; /* MX6Q_PAD_EIM_D28__I2C1_SDA */ | ||
493 | }; | ||
494 | }; | ||
495 | |||
489 | usdhc3 { | 496 | usdhc3 { |
490 | pinctrl_usdhc3_1: usdhc3grp-1 { | 497 | pinctrl_usdhc3_1: usdhc3grp-1 { |
491 | fsl,pins = <1273 0x17059 /* MX6Q_PAD_SD3_CMD__USDHC3_CMD */ | 498 | fsl,pins = <1273 0x17059 /* MX6Q_PAD_SD3_CMD__USDHC3_CMD */ |