diff options
author | Linus Torvalds <torvalds@linux-foundation.org> | 2012-12-12 14:51:39 -0500 |
---|---|---|
committer | Linus Torvalds <torvalds@linux-foundation.org> | 2012-12-12 14:51:39 -0500 |
commit | d01e4afdbb65e030fd6f1f96c30a558e2eb0f279 (patch) | |
tree | 02ef82b2740cf93a98199eded5ef765fa6e03052 /arch/arm/boot | |
parent | 8287361abca36504da813638310d2547469283eb (diff) | |
parent | 794b175fc0c0c4844dbb7b137a73bbfd01f6c608 (diff) |
Merge tag 'cleanup' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC cleanups on various subarchitectures from Olof Johansson:
"Cleanup patches for various ARM platforms and some of their associated
drivers. There's also a branch in here that enables Freescale i.MX to
be part of the multiplatform support -- the first "big" SoC that is
moved over (more multiplatform work comes in a separate branch later
during the merge window)."
Conflicts fixed as per Olof, including a silent semantic one in
arch/arm/mach-omap2/board-generic.c (omap_prcm_restart() was renamed to
omap3xxx_restart(), and a new user of the old name was added).
* tag 'cleanup' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (189 commits)
ARM: omap: fix typo on timer cleanup
ARM: EXYNOS: Remove unused regs-mem.h file
ARM: EXYNOS: Remove unused non-dt support for dwmci controller
ARM: Kirkwood: Use hw_pci.ops instead of hw_pci.scan
ARM: OMAP3: cm-t3517: use GPTIMER for system clock
ARM: OMAP2+: timer: remove CONFIG_OMAP_32K_TIMER
ARM: SAMSUNG: use devm_ functions for ADC driver
ARM: EXYNOS: no duplicate mask/unmask in eint0_15
ARM: S3C24XX: SPI clock channel setup is fixed for S3C2443
ARM: EXYNOS: Remove i2c0 resource information and setting of device names
ARM: Kirkwood: checkpatch cleanups
ARM: Kirkwood: Fix sparse warnings.
ARM: Kirkwood: Remove unused includes
ARM: kirkwood: cleanup lsxl board includes
ARM: integrator: use BUG_ON where possible
ARM: integrator: push down SC dependencies
ARM: integrator: delete static UART1 mapping
ARM: integrator: delete SC mapping on the CP
ARM: integrator: remove static CP syscon mapping
ARM: integrator: remove static AP syscon mapping
...
Diffstat (limited to 'arch/arm/boot')
39 files changed, 1459 insertions, 472 deletions
diff --git a/arch/arm/boot/compressed/Makefile b/arch/arm/boot/compressed/Makefile index a517153a13ea..537208f22e56 100644 --- a/arch/arm/boot/compressed/Makefile +++ b/arch/arm/boot/compressed/Makefile | |||
@@ -54,10 +54,6 @@ ifeq ($(CONFIG_ARCH_SA1100),y) | |||
54 | OBJS += head-sa1100.o | 54 | OBJS += head-sa1100.o |
55 | endif | 55 | endif |
56 | 56 | ||
57 | ifeq ($(CONFIG_ARCH_VT8500),y) | ||
58 | OBJS += head-vt8500.o | ||
59 | endif | ||
60 | |||
61 | ifeq ($(CONFIG_CPU_XSCALE),y) | 57 | ifeq ($(CONFIG_CPU_XSCALE),y) |
62 | OBJS += head-xscale.o | 58 | OBJS += head-xscale.o |
63 | endif | 59 | endif |
diff --git a/arch/arm/boot/compressed/head-vt8500.S b/arch/arm/boot/compressed/head-vt8500.S deleted file mode 100644 index 1dc1e21a3be3..000000000000 --- a/arch/arm/boot/compressed/head-vt8500.S +++ /dev/null | |||
@@ -1,46 +0,0 @@ | |||
1 | /* | ||
2 | * linux/arch/arm/boot/compressed/head-vt8500.S | ||
3 | * | ||
4 | * Copyright (C) 2010 Alexey Charkov <alchark@gmail.com> | ||
5 | * | ||
6 | * VIA VT8500 specific tweaks. This is merged into head.S by the linker. | ||
7 | * | ||
8 | */ | ||
9 | |||
10 | #include <linux/linkage.h> | ||
11 | #include <asm/mach-types.h> | ||
12 | |||
13 | .section ".start", "ax" | ||
14 | |||
15 | __VT8500_start: | ||
16 | @ Compare the SCC ID register against a list of known values | ||
17 | ldr r1, .SCCID | ||
18 | ldr r3, [r1] | ||
19 | |||
20 | @ VT8500 override | ||
21 | ldr r4, .VT8500SCC | ||
22 | cmp r3, r4 | ||
23 | ldreq r7, .ID_BV07 | ||
24 | beq .Lendvt8500 | ||
25 | |||
26 | @ WM8505 override | ||
27 | ldr r4, .WM8505SCC | ||
28 | cmp r3, r4 | ||
29 | ldreq r7, .ID_8505 | ||
30 | beq .Lendvt8500 | ||
31 | |||
32 | @ Otherwise, leave the bootloader's machine id untouched | ||
33 | |||
34 | .SCCID: | ||
35 | .word 0xd8120000 | ||
36 | .VT8500SCC: | ||
37 | .word 0x34000102 | ||
38 | .WM8505SCC: | ||
39 | .word 0x34260103 | ||
40 | |||
41 | .ID_BV07: | ||
42 | .word MACH_TYPE_BV07 | ||
43 | .ID_8505: | ||
44 | .word MACH_TYPE_WM8505_7IN_NETBOOK | ||
45 | |||
46 | .Lendvt8500: | ||
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index 262493752234..5e98094a3e1b 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile | |||
@@ -79,15 +79,17 @@ dtb-$(CONFIG_ARCH_MXS) += imx23-evk.dtb \ | |||
79 | imx28-m28evk.dtb \ | 79 | imx28-m28evk.dtb \ |
80 | imx28-tx28.dtb | 80 | imx28-tx28.dtb |
81 | dtb-$(CONFIG_ARCH_OMAP2PLUS) += omap2420-h4.dtb \ | 81 | dtb-$(CONFIG_ARCH_OMAP2PLUS) += omap2420-h4.dtb \ |
82 | omap3-beagle.dtb \ | ||
82 | omap3-beagle-xm.dtb \ | 83 | omap3-beagle-xm.dtb \ |
83 | omap3-evm.dtb \ | 84 | omap3-evm.dtb \ |
84 | omap3-tobi.dtb \ | 85 | omap3-tobi.dtb \ |
85 | omap4-panda.dtb \ | 86 | omap4-panda.dtb \ |
86 | omap4-pandaES.dtb \ | 87 | omap4-panda-es.dtb \ |
87 | omap4-var_som.dtb \ | 88 | omap4-var-som.dtb \ |
88 | omap4-sdp.dtb \ | 89 | omap4-sdp.dtb \ |
89 | omap5-evm.dtb \ | 90 | omap5-evm.dtb \ |
90 | am335x-evm.dtb \ | 91 | am335x-evm.dtb \ |
92 | am335x-evmsk.dtb \ | ||
91 | am335x-bone.dtb | 93 | am335x-bone.dtb |
92 | dtb-$(CONFIG_ARCH_PRIMA2) += prima2-evb.dtb | 94 | dtb-$(CONFIG_ARCH_PRIMA2) += prima2-evb.dtb |
93 | dtb-$(CONFIG_ARCH_U8500) += snowball.dtb | 95 | dtb-$(CONFIG_ARCH_U8500) += snowball.dtb |
diff --git a/arch/arm/boot/dts/am335x-bone.dts b/arch/arm/boot/dts/am335x-bone.dts index c634f87e230e..2c338889df1b 100644 --- a/arch/arm/boot/dts/am335x-bone.dts +++ b/arch/arm/boot/dts/am335x-bone.dts | |||
@@ -13,11 +13,31 @@ | |||
13 | model = "TI AM335x BeagleBone"; | 13 | model = "TI AM335x BeagleBone"; |
14 | compatible = "ti,am335x-bone", "ti,am33xx"; | 14 | compatible = "ti,am335x-bone", "ti,am33xx"; |
15 | 15 | ||
16 | cpus { | ||
17 | cpu@0 { | ||
18 | cpu0-supply = <&dcdc2_reg>; | ||
19 | }; | ||
20 | }; | ||
21 | |||
16 | memory { | 22 | memory { |
17 | device_type = "memory"; | 23 | device_type = "memory"; |
18 | reg = <0x80000000 0x10000000>; /* 256 MB */ | 24 | reg = <0x80000000 0x10000000>; /* 256 MB */ |
19 | }; | 25 | }; |
20 | 26 | ||
27 | am33xx_pinmux: pinmux@44e10800 { | ||
28 | pinctrl-names = "default"; | ||
29 | pinctrl-0 = <&user_leds_s0>; | ||
30 | |||
31 | user_leds_s0: user_leds_s0 { | ||
32 | pinctrl-single,pins = < | ||
33 | 0x54 0x7 /* gpmc_a5.gpio1_21, OUTPUT | MODE7 */ | ||
34 | 0x58 0x17 /* gpmc_a6.gpio1_22, OUTPUT_PULLUP | MODE7 */ | ||
35 | 0x5c 0x7 /* gpmc_a7.gpio1_23, OUTPUT | MODE7 */ | ||
36 | 0x60 0x17 /* gpmc_a8.gpio1_24, OUTPUT_PULLUP | MODE7 */ | ||
37 | >; | ||
38 | }; | ||
39 | }; | ||
40 | |||
21 | ocp { | 41 | ocp { |
22 | uart1: serial@44e09000 { | 42 | uart1: serial@44e09000 { |
23 | status = "okay"; | 43 | status = "okay"; |
@@ -33,6 +53,36 @@ | |||
33 | 53 | ||
34 | }; | 54 | }; |
35 | }; | 55 | }; |
56 | |||
57 | leds { | ||
58 | compatible = "gpio-leds"; | ||
59 | |||
60 | led@2 { | ||
61 | label = "beaglebone:green:heartbeat"; | ||
62 | gpios = <&gpio2 21 0>; | ||
63 | linux,default-trigger = "heartbeat"; | ||
64 | default-state = "off"; | ||
65 | }; | ||
66 | |||
67 | led@3 { | ||
68 | label = "beaglebone:green:mmc0"; | ||
69 | gpios = <&gpio2 22 0>; | ||
70 | linux,default-trigger = "mmc0"; | ||
71 | default-state = "off"; | ||
72 | }; | ||
73 | |||
74 | led@4 { | ||
75 | label = "beaglebone:green:usr2"; | ||
76 | gpios = <&gpio2 23 0>; | ||
77 | default-state = "off"; | ||
78 | }; | ||
79 | |||
80 | led@5 { | ||
81 | label = "beaglebone:green:usr3"; | ||
82 | gpios = <&gpio2 24 0>; | ||
83 | default-state = "off"; | ||
84 | }; | ||
85 | }; | ||
36 | }; | 86 | }; |
37 | 87 | ||
38 | /include/ "tps65217.dtsi" | 88 | /include/ "tps65217.dtsi" |
diff --git a/arch/arm/boot/dts/am335x-evm.dts b/arch/arm/boot/dts/am335x-evm.dts index 185d6325a458..9f65f17ebdf8 100644 --- a/arch/arm/boot/dts/am335x-evm.dts +++ b/arch/arm/boot/dts/am335x-evm.dts | |||
@@ -13,11 +13,39 @@ | |||
13 | model = "TI AM335x EVM"; | 13 | model = "TI AM335x EVM"; |
14 | compatible = "ti,am335x-evm", "ti,am33xx"; | 14 | compatible = "ti,am335x-evm", "ti,am33xx"; |
15 | 15 | ||
16 | cpus { | ||
17 | cpu@0 { | ||
18 | cpu0-supply = <&vdd1_reg>; | ||
19 | }; | ||
20 | }; | ||
21 | |||
16 | memory { | 22 | memory { |
17 | device_type = "memory"; | 23 | device_type = "memory"; |
18 | reg = <0x80000000 0x10000000>; /* 256 MB */ | 24 | reg = <0x80000000 0x10000000>; /* 256 MB */ |
19 | }; | 25 | }; |
20 | 26 | ||
27 | am33xx_pinmux: pinmux@44e10800 { | ||
28 | pinctrl-names = "default"; | ||
29 | pinctrl-0 = <&matrix_keypad_s0 &volume_keys_s0>; | ||
30 | |||
31 | matrix_keypad_s0: matrix_keypad_s0 { | ||
32 | pinctrl-single,pins = < | ||
33 | 0x54 0x7 /* gpmc_a5.gpio1_21, OUTPUT | MODE7 */ | ||
34 | 0x58 0x7 /* gpmc_a6.gpio1_22, OUTPUT | MODE7 */ | ||
35 | 0x64 0x27 /* gpmc_a9.gpio1_25, INPUT | MODE7 */ | ||
36 | 0x68 0x27 /* gpmc_a10.gpio1_26, INPUT | MODE7 */ | ||
37 | 0x6c 0x27 /* gpmc_a11.gpio1_27, INPUT | MODE7 */ | ||
38 | >; | ||
39 | }; | ||
40 | |||
41 | volume_keys_s0: volume_keys_s0 { | ||
42 | pinctrl-single,pins = < | ||
43 | 0x150 0x27 /* spi0_sclk.gpio0_2, INPUT | MODE7 */ | ||
44 | 0x154 0x27 /* spi0_d0.gpio0_3, INPUT | MODE7 */ | ||
45 | >; | ||
46 | }; | ||
47 | }; | ||
48 | |||
21 | ocp { | 49 | ocp { |
22 | uart1: serial@44e09000 { | 50 | uart1: serial@44e09000 { |
23 | status = "okay"; | 51 | status = "okay"; |
@@ -31,6 +59,49 @@ | |||
31 | reg = <0x2d>; | 59 | reg = <0x2d>; |
32 | }; | 60 | }; |
33 | }; | 61 | }; |
62 | |||
63 | i2c2: i2c@4802a000 { | ||
64 | status = "okay"; | ||
65 | clock-frequency = <100000>; | ||
66 | |||
67 | lis331dlh: lis331dlh@18 { | ||
68 | compatible = "st,lis331dlh", "st,lis3lv02d"; | ||
69 | reg = <0x18>; | ||
70 | Vdd-supply = <&lis3_reg>; | ||
71 | Vdd_IO-supply = <&lis3_reg>; | ||
72 | |||
73 | st,click-single-x; | ||
74 | st,click-single-y; | ||
75 | st,click-single-z; | ||
76 | st,click-thresh-x = <10>; | ||
77 | st,click-thresh-y = <10>; | ||
78 | st,click-thresh-z = <10>; | ||
79 | st,irq1-click; | ||
80 | st,irq2-click; | ||
81 | st,wakeup-x-lo; | ||
82 | st,wakeup-x-hi; | ||
83 | st,wakeup-y-lo; | ||
84 | st,wakeup-y-hi; | ||
85 | st,wakeup-z-lo; | ||
86 | st,wakeup-z-hi; | ||
87 | st,min-limit-x = <120>; | ||
88 | st,min-limit-y = <120>; | ||
89 | st,min-limit-z = <140>; | ||
90 | st,max-limit-x = <550>; | ||
91 | st,max-limit-y = <550>; | ||
92 | st,max-limit-z = <750>; | ||
93 | }; | ||
94 | |||
95 | tsl2550: tsl2550@39 { | ||
96 | compatible = "taos,tsl2550"; | ||
97 | reg = <0x39>; | ||
98 | }; | ||
99 | |||
100 | tmp275: tmp275@48 { | ||
101 | compatible = "ti,tmp275"; | ||
102 | reg = <0x48>; | ||
103 | }; | ||
104 | }; | ||
34 | }; | 105 | }; |
35 | 106 | ||
36 | vbat: fixedregulator@0 { | 107 | vbat: fixedregulator@0 { |
@@ -40,6 +111,53 @@ | |||
40 | regulator-max-microvolt = <5000000>; | 111 | regulator-max-microvolt = <5000000>; |
41 | regulator-boot-on; | 112 | regulator-boot-on; |
42 | }; | 113 | }; |
114 | |||
115 | lis3_reg: fixedregulator@1 { | ||
116 | compatible = "regulator-fixed"; | ||
117 | regulator-name = "lis3_reg"; | ||
118 | regulator-boot-on; | ||
119 | }; | ||
120 | |||
121 | matrix_keypad: matrix_keypad@0 { | ||
122 | compatible = "gpio-matrix-keypad"; | ||
123 | debounce-delay-ms = <5>; | ||
124 | col-scan-delay-us = <2>; | ||
125 | |||
126 | row-gpios = <&gpio2 25 0 /* Bank1, pin25 */ | ||
127 | &gpio2 26 0 /* Bank1, pin26 */ | ||
128 | &gpio2 27 0>; /* Bank1, pin27 */ | ||
129 | |||
130 | col-gpios = <&gpio2 21 0 /* Bank1, pin21 */ | ||
131 | &gpio2 22 0>; /* Bank1, pin22 */ | ||
132 | |||
133 | linux,keymap = <0x0000008b /* MENU */ | ||
134 | 0x0100009e /* BACK */ | ||
135 | 0x02000069 /* LEFT */ | ||
136 | 0x0001006a /* RIGHT */ | ||
137 | 0x0101001c /* ENTER */ | ||
138 | 0x0201006c>; /* DOWN */ | ||
139 | }; | ||
140 | |||
141 | gpio_keys: volume_keys@0 { | ||
142 | compatible = "gpio-keys"; | ||
143 | #address-cells = <1>; | ||
144 | #size-cells = <0>; | ||
145 | autorepeat; | ||
146 | |||
147 | switch@9 { | ||
148 | label = "volume-up"; | ||
149 | linux,code = <115>; | ||
150 | gpios = <&gpio1 2 1>; | ||
151 | gpio-key,wakeup; | ||
152 | }; | ||
153 | |||
154 | switch@10 { | ||
155 | label = "volume-down"; | ||
156 | linux,code = <114>; | ||
157 | gpios = <&gpio1 3 1>; | ||
158 | gpio-key,wakeup; | ||
159 | }; | ||
160 | }; | ||
43 | }; | 161 | }; |
44 | 162 | ||
45 | /include/ "tps65910.dtsi" | 163 | /include/ "tps65910.dtsi" |
diff --git a/arch/arm/boot/dts/am335x-evmsk.dts b/arch/arm/boot/dts/am335x-evmsk.dts new file mode 100644 index 000000000000..f5a6162a4ff2 --- /dev/null +++ b/arch/arm/boot/dts/am335x-evmsk.dts | |||
@@ -0,0 +1,250 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/ | ||
3 | * | ||
4 | * This program is free software; you can redistribute it and/or modify | ||
5 | * it under the terms of the GNU General Public License version 2 as | ||
6 | * published by the Free Software Foundation. | ||
7 | */ | ||
8 | |||
9 | /* | ||
10 | * AM335x Starter Kit | ||
11 | * http://www.ti.com/tool/tmdssk3358 | ||
12 | */ | ||
13 | |||
14 | /dts-v1/; | ||
15 | |||
16 | /include/ "am33xx.dtsi" | ||
17 | |||
18 | / { | ||
19 | model = "TI AM335x EVM-SK"; | ||
20 | compatible = "ti,am335x-evmsk", "ti,am33xx"; | ||
21 | |||
22 | cpus { | ||
23 | cpu@0 { | ||
24 | cpu0-supply = <&vdd1_reg>; | ||
25 | }; | ||
26 | }; | ||
27 | |||
28 | memory { | ||
29 | device_type = "memory"; | ||
30 | reg = <0x80000000 0x10000000>; /* 256 MB */ | ||
31 | }; | ||
32 | |||
33 | am33xx_pinmux: pinmux@44e10800 { | ||
34 | pinctrl-names = "default"; | ||
35 | pinctrl-0 = <&user_leds_s0 &gpio_keys_s0>; | ||
36 | |||
37 | user_leds_s0: user_leds_s0 { | ||
38 | pinctrl-single,pins = < | ||
39 | 0x10 0x7 /* gpmc_ad4.gpio1_4, OUTPUT | MODE7 */ | ||
40 | 0x14 0x7 /* gpmc_ad5.gpio1_5, OUTPUT | MODE7 */ | ||
41 | 0x18 0x7 /* gpmc_ad6.gpio1_6, OUTPUT | MODE7 */ | ||
42 | 0x1c 0x7 /* gpmc_ad7.gpio1_7, OUTPUT | MODE7 */ | ||
43 | >; | ||
44 | }; | ||
45 | |||
46 | gpio_keys_s0: gpio_keys_s0 { | ||
47 | pinctrl-single,pins = < | ||
48 | 0x94 0x27 /* gpmc_oen_ren.gpio2_3, INPUT | MODE7 */ | ||
49 | 0x90 0x27 /* gpmc_advn_ale.gpio2_2, INPUT | MODE7 */ | ||
50 | 0x70 0x27 /* gpmc_wait0.gpio0_30, INPUT | MODE7 */ | ||
51 | 0x9c 0x27 /* gpmc_ben0_cle.gpio2_5, INPUT | MODE7 */ | ||
52 | >; | ||
53 | }; | ||
54 | }; | ||
55 | |||
56 | ocp { | ||
57 | uart1: serial@44e09000 { | ||
58 | status = "okay"; | ||
59 | }; | ||
60 | |||
61 | i2c1: i2c@44e0b000 { | ||
62 | status = "okay"; | ||
63 | clock-frequency = <400000>; | ||
64 | |||
65 | tps: tps@2d { | ||
66 | reg = <0x2d>; | ||
67 | }; | ||
68 | |||
69 | lis331dlh: lis331dlh@18 { | ||
70 | compatible = "st,lis331dlh", "st,lis3lv02d"; | ||
71 | reg = <0x18>; | ||
72 | Vdd-supply = <&lis3_reg>; | ||
73 | Vdd_IO-supply = <&lis3_reg>; | ||
74 | |||
75 | st,click-single-x; | ||
76 | st,click-single-y; | ||
77 | st,click-single-z; | ||
78 | st,click-thresh-x = <10>; | ||
79 | st,click-thresh-y = <10>; | ||
80 | st,click-thresh-z = <10>; | ||
81 | st,irq1-click; | ||
82 | st,irq2-click; | ||
83 | st,wakeup-x-lo; | ||
84 | st,wakeup-x-hi; | ||
85 | st,wakeup-y-lo; | ||
86 | st,wakeup-y-hi; | ||
87 | st,wakeup-z-lo; | ||
88 | st,wakeup-z-hi; | ||
89 | st,min-limit-x = <120>; | ||
90 | st,min-limit-y = <120>; | ||
91 | st,min-limit-z = <140>; | ||
92 | st,max-limit-x = <550>; | ||
93 | st,max-limit-y = <550>; | ||
94 | st,max-limit-z = <750>; | ||
95 | }; | ||
96 | }; | ||
97 | }; | ||
98 | |||
99 | vbat: fixedregulator@0 { | ||
100 | compatible = "regulator-fixed"; | ||
101 | regulator-name = "vbat"; | ||
102 | regulator-min-microvolt = <5000000>; | ||
103 | regulator-max-microvolt = <5000000>; | ||
104 | regulator-boot-on; | ||
105 | }; | ||
106 | |||
107 | lis3_reg: fixedregulator@1 { | ||
108 | compatible = "regulator-fixed"; | ||
109 | regulator-name = "lis3_reg"; | ||
110 | regulator-boot-on; | ||
111 | }; | ||
112 | |||
113 | leds { | ||
114 | compatible = "gpio-leds"; | ||
115 | |||
116 | led@1 { | ||
117 | label = "evmsk:green:usr0"; | ||
118 | gpios = <&gpio2 4 0>; | ||
119 | default-state = "off"; | ||
120 | }; | ||
121 | |||
122 | led@2 { | ||
123 | label = "evmsk:green:usr1"; | ||
124 | gpios = <&gpio2 5 0>; | ||
125 | default-state = "off"; | ||
126 | }; | ||
127 | |||
128 | led@3 { | ||
129 | label = "evmsk:green:mmc0"; | ||
130 | gpios = <&gpio2 6 0>; | ||
131 | linux,default-trigger = "mmc0"; | ||
132 | default-state = "off"; | ||
133 | }; | ||
134 | |||
135 | led@4 { | ||
136 | label = "evmsk:green:heartbeat"; | ||
137 | gpios = <&gpio2 7 0>; | ||
138 | linux,default-trigger = "heartbeat"; | ||
139 | default-state = "off"; | ||
140 | }; | ||
141 | }; | ||
142 | |||
143 | gpio_buttons: gpio_buttons@0 { | ||
144 | compatible = "gpio-keys"; | ||
145 | #address-cells = <1>; | ||
146 | #size-cells = <0>; | ||
147 | |||
148 | switch@1 { | ||
149 | label = "button0"; | ||
150 | linux,code = <0x100>; | ||
151 | gpios = <&gpio3 3 0>; | ||
152 | }; | ||
153 | |||
154 | switch@2 { | ||
155 | label = "button1"; | ||
156 | linux,code = <0x101>; | ||
157 | gpios = <&gpio3 2 0>; | ||
158 | }; | ||
159 | |||
160 | switch@3 { | ||
161 | label = "button2"; | ||
162 | linux,code = <0x102>; | ||
163 | gpios = <&gpio1 30 0>; | ||
164 | gpio-key,wakeup; | ||
165 | }; | ||
166 | |||
167 | switch@4 { | ||
168 | label = "button3"; | ||
169 | linux,code = <0x103>; | ||
170 | gpios = <&gpio3 5 0>; | ||
171 | }; | ||
172 | }; | ||
173 | }; | ||
174 | |||
175 | /include/ "tps65910.dtsi" | ||
176 | |||
177 | &tps { | ||
178 | vcc1-supply = <&vbat>; | ||
179 | vcc2-supply = <&vbat>; | ||
180 | vcc3-supply = <&vbat>; | ||
181 | vcc4-supply = <&vbat>; | ||
182 | vcc5-supply = <&vbat>; | ||
183 | vcc6-supply = <&vbat>; | ||
184 | vcc7-supply = <&vbat>; | ||
185 | vccio-supply = <&vbat>; | ||
186 | |||
187 | regulators { | ||
188 | vrtc_reg: regulator@0 { | ||
189 | regulator-always-on; | ||
190 | }; | ||
191 | |||
192 | vio_reg: regulator@1 { | ||
193 | regulator-always-on; | ||
194 | }; | ||
195 | |||
196 | vdd1_reg: regulator@2 { | ||
197 | /* VDD_MPU voltage limits 0.95V - 1.26V with +/-4% tolerance */ | ||
198 | regulator-name = "vdd_mpu"; | ||
199 | regulator-min-microvolt = <912500>; | ||
200 | regulator-max-microvolt = <1312500>; | ||
201 | regulator-boot-on; | ||
202 | regulator-always-on; | ||
203 | }; | ||
204 | |||
205 | vdd2_reg: regulator@3 { | ||
206 | /* VDD_CORE voltage limits 0.95V - 1.1V with +/-4% tolerance */ | ||
207 | regulator-name = "vdd_core"; | ||
208 | regulator-min-microvolt = <912500>; | ||
209 | regulator-max-microvolt = <1150000>; | ||
210 | regulator-boot-on; | ||
211 | regulator-always-on; | ||
212 | }; | ||
213 | |||
214 | vdd3_reg: regulator@4 { | ||
215 | regulator-always-on; | ||
216 | }; | ||
217 | |||
218 | vdig1_reg: regulator@5 { | ||
219 | regulator-always-on; | ||
220 | }; | ||
221 | |||
222 | vdig2_reg: regulator@6 { | ||
223 | regulator-always-on; | ||
224 | }; | ||
225 | |||
226 | vpll_reg: regulator@7 { | ||
227 | regulator-always-on; | ||
228 | }; | ||
229 | |||
230 | vdac_reg: regulator@8 { | ||
231 | regulator-always-on; | ||
232 | }; | ||
233 | |||
234 | vaux1_reg: regulator@9 { | ||
235 | regulator-always-on; | ||
236 | }; | ||
237 | |||
238 | vaux2_reg: regulator@10 { | ||
239 | regulator-always-on; | ||
240 | }; | ||
241 | |||
242 | vaux33_reg: regulator@11 { | ||
243 | regulator-always-on; | ||
244 | }; | ||
245 | |||
246 | vmmc_reg: regulator@12 { | ||
247 | regulator-always-on; | ||
248 | }; | ||
249 | }; | ||
250 | }; | ||
diff --git a/arch/arm/boot/dts/am33xx.dtsi b/arch/arm/boot/dts/am33xx.dtsi index bb31bff01998..20a3f29a6bfe 100644 --- a/arch/arm/boot/dts/am33xx.dtsi +++ b/arch/arm/boot/dts/am33xx.dtsi | |||
@@ -12,6 +12,7 @@ | |||
12 | 12 | ||
13 | / { | 13 | / { |
14 | compatible = "ti,am33xx"; | 14 | compatible = "ti,am33xx"; |
15 | interrupt-parent = <&intc>; | ||
15 | 16 | ||
16 | aliases { | 17 | aliases { |
17 | serial0 = &uart1; | 18 | serial0 = &uart1; |
@@ -25,6 +26,21 @@ | |||
25 | cpus { | 26 | cpus { |
26 | cpu@0 { | 27 | cpu@0 { |
27 | compatible = "arm,cortex-a8"; | 28 | compatible = "arm,cortex-a8"; |
29 | |||
30 | /* | ||
31 | * To consider voltage drop between PMIC and SoC, | ||
32 | * tolerance value is reduced to 2% from 4% and | ||
33 | * voltage value is increased as a precaution. | ||
34 | */ | ||
35 | operating-points = < | ||
36 | /* kHz uV */ | ||
37 | 720000 1285000 | ||
38 | 600000 1225000 | ||
39 | 500000 1125000 | ||
40 | 275000 1125000 | ||
41 | >; | ||
42 | voltage-tolerance = <2>; /* 2 percentage */ | ||
43 | clock-latency = <300000>; /* From omap-cpufreq driver */ | ||
28 | }; | 44 | }; |
29 | }; | 45 | }; |
30 | 46 | ||
@@ -40,6 +56,15 @@ | |||
40 | }; | 56 | }; |
41 | }; | 57 | }; |
42 | 58 | ||
59 | am33xx_pinmux: pinmux@44e10800 { | ||
60 | compatible = "pinctrl-single"; | ||
61 | reg = <0x44e10800 0x0238>; | ||
62 | #address-cells = <1>; | ||
63 | #size-cells = <0>; | ||
64 | pinctrl-single,register-width = <32>; | ||
65 | pinctrl-single,function-mask = <0x7f>; | ||
66 | }; | ||
67 | |||
43 | /* | 68 | /* |
44 | * XXX: Use a flat representation of the AM33XX interconnect. | 69 | * XXX: Use a flat representation of the AM33XX interconnect. |
45 | * The real AM33XX interconnect network is quite complex.Since | 70 | * The real AM33XX interconnect network is quite complex.Since |
@@ -70,7 +95,6 @@ | |||
70 | interrupt-controller; | 95 | interrupt-controller; |
71 | #interrupt-cells = <1>; | 96 | #interrupt-cells = <1>; |
72 | reg = <0x44e07000 0x1000>; | 97 | reg = <0x44e07000 0x1000>; |
73 | interrupt-parent = <&intc>; | ||
74 | interrupts = <96>; | 98 | interrupts = <96>; |
75 | }; | 99 | }; |
76 | 100 | ||
@@ -82,7 +106,6 @@ | |||
82 | interrupt-controller; | 106 | interrupt-controller; |
83 | #interrupt-cells = <1>; | 107 | #interrupt-cells = <1>; |
84 | reg = <0x4804c000 0x1000>; | 108 | reg = <0x4804c000 0x1000>; |
85 | interrupt-parent = <&intc>; | ||
86 | interrupts = <98>; | 109 | interrupts = <98>; |
87 | }; | 110 | }; |
88 | 111 | ||
@@ -94,7 +117,6 @@ | |||
94 | interrupt-controller; | 117 | interrupt-controller; |
95 | #interrupt-cells = <1>; | 118 | #interrupt-cells = <1>; |
96 | reg = <0x481ac000 0x1000>; | 119 | reg = <0x481ac000 0x1000>; |
97 | interrupt-parent = <&intc>; | ||
98 | interrupts = <32>; | 120 | interrupts = <32>; |
99 | }; | 121 | }; |
100 | 122 | ||
@@ -106,7 +128,6 @@ | |||
106 | interrupt-controller; | 128 | interrupt-controller; |
107 | #interrupt-cells = <1>; | 129 | #interrupt-cells = <1>; |
108 | reg = <0x481ae000 0x1000>; | 130 | reg = <0x481ae000 0x1000>; |
109 | interrupt-parent = <&intc>; | ||
110 | interrupts = <62>; | 131 | interrupts = <62>; |
111 | }; | 132 | }; |
112 | 133 | ||
@@ -115,7 +136,6 @@ | |||
115 | ti,hwmods = "uart1"; | 136 | ti,hwmods = "uart1"; |
116 | clock-frequency = <48000000>; | 137 | clock-frequency = <48000000>; |
117 | reg = <0x44e09000 0x2000>; | 138 | reg = <0x44e09000 0x2000>; |
118 | interrupt-parent = <&intc>; | ||
119 | interrupts = <72>; | 139 | interrupts = <72>; |
120 | status = "disabled"; | 140 | status = "disabled"; |
121 | }; | 141 | }; |
@@ -125,7 +145,6 @@ | |||
125 | ti,hwmods = "uart2"; | 145 | ti,hwmods = "uart2"; |
126 | clock-frequency = <48000000>; | 146 | clock-frequency = <48000000>; |
127 | reg = <0x48022000 0x2000>; | 147 | reg = <0x48022000 0x2000>; |
128 | interrupt-parent = <&intc>; | ||
129 | interrupts = <73>; | 148 | interrupts = <73>; |
130 | status = "disabled"; | 149 | status = "disabled"; |
131 | }; | 150 | }; |
@@ -135,7 +154,6 @@ | |||
135 | ti,hwmods = "uart3"; | 154 | ti,hwmods = "uart3"; |
136 | clock-frequency = <48000000>; | 155 | clock-frequency = <48000000>; |
137 | reg = <0x48024000 0x2000>; | 156 | reg = <0x48024000 0x2000>; |
138 | interrupt-parent = <&intc>; | ||
139 | interrupts = <74>; | 157 | interrupts = <74>; |
140 | status = "disabled"; | 158 | status = "disabled"; |
141 | }; | 159 | }; |
@@ -145,7 +163,6 @@ | |||
145 | ti,hwmods = "uart4"; | 163 | ti,hwmods = "uart4"; |
146 | clock-frequency = <48000000>; | 164 | clock-frequency = <48000000>; |
147 | reg = <0x481a6000 0x2000>; | 165 | reg = <0x481a6000 0x2000>; |
148 | interrupt-parent = <&intc>; | ||
149 | interrupts = <44>; | 166 | interrupts = <44>; |
150 | status = "disabled"; | 167 | status = "disabled"; |
151 | }; | 168 | }; |
@@ -155,7 +172,6 @@ | |||
155 | ti,hwmods = "uart5"; | 172 | ti,hwmods = "uart5"; |
156 | clock-frequency = <48000000>; | 173 | clock-frequency = <48000000>; |
157 | reg = <0x481a8000 0x2000>; | 174 | reg = <0x481a8000 0x2000>; |
158 | interrupt-parent = <&intc>; | ||
159 | interrupts = <45>; | 175 | interrupts = <45>; |
160 | status = "disabled"; | 176 | status = "disabled"; |
161 | }; | 177 | }; |
@@ -165,7 +181,6 @@ | |||
165 | ti,hwmods = "uart6"; | 181 | ti,hwmods = "uart6"; |
166 | clock-frequency = <48000000>; | 182 | clock-frequency = <48000000>; |
167 | reg = <0x481aa000 0x2000>; | 183 | reg = <0x481aa000 0x2000>; |
168 | interrupt-parent = <&intc>; | ||
169 | interrupts = <46>; | 184 | interrupts = <46>; |
170 | status = "disabled"; | 185 | status = "disabled"; |
171 | }; | 186 | }; |
@@ -176,7 +191,6 @@ | |||
176 | #size-cells = <0>; | 191 | #size-cells = <0>; |
177 | ti,hwmods = "i2c1"; | 192 | ti,hwmods = "i2c1"; |
178 | reg = <0x44e0b000 0x1000>; | 193 | reg = <0x44e0b000 0x1000>; |
179 | interrupt-parent = <&intc>; | ||
180 | interrupts = <70>; | 194 | interrupts = <70>; |
181 | status = "disabled"; | 195 | status = "disabled"; |
182 | }; | 196 | }; |
@@ -187,7 +201,6 @@ | |||
187 | #size-cells = <0>; | 201 | #size-cells = <0>; |
188 | ti,hwmods = "i2c2"; | 202 | ti,hwmods = "i2c2"; |
189 | reg = <0x4802a000 0x1000>; | 203 | reg = <0x4802a000 0x1000>; |
190 | interrupt-parent = <&intc>; | ||
191 | interrupts = <71>; | 204 | interrupts = <71>; |
192 | status = "disabled"; | 205 | status = "disabled"; |
193 | }; | 206 | }; |
@@ -198,7 +211,6 @@ | |||
198 | #size-cells = <0>; | 211 | #size-cells = <0>; |
199 | ti,hwmods = "i2c3"; | 212 | ti,hwmods = "i2c3"; |
200 | reg = <0x4819c000 0x1000>; | 213 | reg = <0x4819c000 0x1000>; |
201 | interrupt-parent = <&intc>; | ||
202 | interrupts = <30>; | 214 | interrupts = <30>; |
203 | status = "disabled"; | 215 | status = "disabled"; |
204 | }; | 216 | }; |
@@ -207,8 +219,124 @@ | |||
207 | compatible = "ti,omap3-wdt"; | 219 | compatible = "ti,omap3-wdt"; |
208 | ti,hwmods = "wd_timer2"; | 220 | ti,hwmods = "wd_timer2"; |
209 | reg = <0x44e35000 0x1000>; | 221 | reg = <0x44e35000 0x1000>; |
210 | interrupt-parent = <&intc>; | ||
211 | interrupts = <91>; | 222 | interrupts = <91>; |
212 | }; | 223 | }; |
224 | |||
225 | dcan0: d_can@481cc000 { | ||
226 | compatible = "bosch,d_can"; | ||
227 | ti,hwmods = "d_can0"; | ||
228 | reg = <0x481cc000 0x2000>; | ||
229 | interrupts = <52>; | ||
230 | status = "disabled"; | ||
231 | }; | ||
232 | |||
233 | dcan1: d_can@481d0000 { | ||
234 | compatible = "bosch,d_can"; | ||
235 | ti,hwmods = "d_can1"; | ||
236 | reg = <0x481d0000 0x2000>; | ||
237 | interrupts = <55>; | ||
238 | status = "disabled"; | ||
239 | }; | ||
240 | |||
241 | timer1: timer@44e31000 { | ||
242 | compatible = "ti,omap2-timer"; | ||
243 | reg = <0x44e31000 0x400>; | ||
244 | interrupts = <67>; | ||
245 | ti,hwmods = "timer1"; | ||
246 | ti,timer-alwon; | ||
247 | }; | ||
248 | |||
249 | timer2: timer@48040000 { | ||
250 | compatible = "ti,omap2-timer"; | ||
251 | reg = <0x48040000 0x400>; | ||
252 | interrupts = <68>; | ||
253 | ti,hwmods = "timer2"; | ||
254 | }; | ||
255 | |||
256 | timer3: timer@48042000 { | ||
257 | compatible = "ti,omap2-timer"; | ||
258 | reg = <0x48042000 0x400>; | ||
259 | interrupts = <69>; | ||
260 | ti,hwmods = "timer3"; | ||
261 | }; | ||
262 | |||
263 | timer4: timer@48044000 { | ||
264 | compatible = "ti,omap2-timer"; | ||
265 | reg = <0x48044000 0x400>; | ||
266 | interrupts = <92>; | ||
267 | ti,hwmods = "timer4"; | ||
268 | ti,timer-pwm; | ||
269 | }; | ||
270 | |||
271 | timer5: timer@48046000 { | ||
272 | compatible = "ti,omap2-timer"; | ||
273 | reg = <0x48046000 0x400>; | ||
274 | interrupts = <93>; | ||
275 | ti,hwmods = "timer5"; | ||
276 | ti,timer-pwm; | ||
277 | }; | ||
278 | |||
279 | timer6: timer@48048000 { | ||
280 | compatible = "ti,omap2-timer"; | ||
281 | reg = <0x48048000 0x400>; | ||
282 | interrupts = <94>; | ||
283 | ti,hwmods = "timer6"; | ||
284 | ti,timer-pwm; | ||
285 | }; | ||
286 | |||
287 | timer7: timer@4804a000 { | ||
288 | compatible = "ti,omap2-timer"; | ||
289 | reg = <0x4804a000 0x400>; | ||
290 | interrupts = <95>; | ||
291 | ti,hwmods = "timer7"; | ||
292 | ti,timer-pwm; | ||
293 | }; | ||
294 | |||
295 | rtc@44e3e000 { | ||
296 | compatible = "ti,da830-rtc"; | ||
297 | reg = <0x44e3e000 0x1000>; | ||
298 | interrupts = <75 | ||
299 | 76>; | ||
300 | ti,hwmods = "rtc"; | ||
301 | }; | ||
302 | |||
303 | spi0: spi@48030000 { | ||
304 | compatible = "ti,omap4-mcspi"; | ||
305 | #address-cells = <1>; | ||
306 | #size-cells = <0>; | ||
307 | reg = <0x48030000 0x400>; | ||
308 | interrupt = <65>; | ||
309 | ti,spi-num-cs = <2>; | ||
310 | ti,hwmods = "spi0"; | ||
311 | status = "disabled"; | ||
312 | }; | ||
313 | |||
314 | spi1: spi@481a0000 { | ||
315 | compatible = "ti,omap4-mcspi"; | ||
316 | #address-cells = <1>; | ||
317 | #size-cells = <0>; | ||
318 | reg = <0x481a0000 0x400>; | ||
319 | interrupt = <125>; | ||
320 | ti,spi-num-cs = <2>; | ||
321 | ti,hwmods = "spi1"; | ||
322 | status = "disabled"; | ||
323 | }; | ||
324 | |||
325 | usb@47400000 { | ||
326 | compatible = "ti,musb-am33xx"; | ||
327 | reg = <0x47400000 0x1000 /* usbss */ | ||
328 | 0x47401000 0x800 /* musb instance 0 */ | ||
329 | 0x47401800 0x800>; /* musb instance 1 */ | ||
330 | interrupts = <17 /* usbss */ | ||
331 | 18 /* musb instance 0 */ | ||
332 | 19>; /* musb instance 1 */ | ||
333 | multipoint = <1>; | ||
334 | num-eps = <16>; | ||
335 | ram-bits = <12>; | ||
336 | port0-mode = <3>; | ||
337 | port1-mode = <3>; | ||
338 | power = <250>; | ||
339 | ti,hwmods = "usb_otg_hs"; | ||
340 | }; | ||
213 | }; | 341 | }; |
214 | }; | 342 | }; |
diff --git a/arch/arm/boot/dts/imx27.dtsi b/arch/arm/boot/dts/imx27.dtsi index 3e54f1498841..67d672792b0d 100644 --- a/arch/arm/boot/dts/imx27.dtsi +++ b/arch/arm/boot/dts/imx27.dtsi | |||
@@ -113,7 +113,7 @@ | |||
113 | i2c1: i2c@10012000 { | 113 | i2c1: i2c@10012000 { |
114 | #address-cells = <1>; | 114 | #address-cells = <1>; |
115 | #size-cells = <0>; | 115 | #size-cells = <0>; |
116 | compatible = "fsl,imx27-i2c", "fsl,imx1-i2c"; | 116 | compatible = "fsl,imx27-i2c", "fsl,imx21-i2c"; |
117 | reg = <0x10012000 0x1000>; | 117 | reg = <0x10012000 0x1000>; |
118 | interrupts = <12>; | 118 | interrupts = <12>; |
119 | status = "disabled"; | 119 | status = "disabled"; |
@@ -205,7 +205,7 @@ | |||
205 | i2c2: i2c@1001d000 { | 205 | i2c2: i2c@1001d000 { |
206 | #address-cells = <1>; | 206 | #address-cells = <1>; |
207 | #size-cells = <0>; | 207 | #size-cells = <0>; |
208 | compatible = "fsl,imx27-i2c", "fsl,imx1-i2c"; | 208 | compatible = "fsl,imx27-i2c", "fsl,imx21-i2c"; |
209 | reg = <0x1001d000 0x1000>; | 209 | reg = <0x1001d000 0x1000>; |
210 | interrupts = <1>; | 210 | interrupts = <1>; |
211 | status = "disabled"; | 211 | status = "disabled"; |
diff --git a/arch/arm/boot/dts/imx51.dtsi b/arch/arm/boot/dts/imx51.dtsi index 75d069fcf897..54aea74769a1 100644 --- a/arch/arm/boot/dts/imx51.dtsi +++ b/arch/arm/boot/dts/imx51.dtsi | |||
@@ -377,7 +377,7 @@ | |||
377 | i2c@83fc4000 { /* I2C2 */ | 377 | i2c@83fc4000 { /* I2C2 */ |
378 | #address-cells = <1>; | 378 | #address-cells = <1>; |
379 | #size-cells = <0>; | 379 | #size-cells = <0>; |
380 | compatible = "fsl,imx51-i2c", "fsl,imx1-i2c"; | 380 | compatible = "fsl,imx51-i2c", "fsl,imx21-i2c"; |
381 | reg = <0x83fc4000 0x4000>; | 381 | reg = <0x83fc4000 0x4000>; |
382 | interrupts = <63>; | 382 | interrupts = <63>; |
383 | status = "disabled"; | 383 | status = "disabled"; |
@@ -386,7 +386,7 @@ | |||
386 | i2c@83fc8000 { /* I2C1 */ | 386 | i2c@83fc8000 { /* I2C1 */ |
387 | #address-cells = <1>; | 387 | #address-cells = <1>; |
388 | #size-cells = <0>; | 388 | #size-cells = <0>; |
389 | compatible = "fsl,imx51-i2c", "fsl,imx1-i2c"; | 389 | compatible = "fsl,imx51-i2c", "fsl,imx21-i2c"; |
390 | reg = <0x83fc8000 0x4000>; | 390 | reg = <0x83fc8000 0x4000>; |
391 | interrupts = <62>; | 391 | interrupts = <62>; |
392 | status = "disabled"; | 392 | status = "disabled"; |
diff --git a/arch/arm/boot/dts/imx53.dtsi b/arch/arm/boot/dts/imx53.dtsi index 76ebb1ad2675..caf09ff73f10 100644 --- a/arch/arm/boot/dts/imx53.dtsi +++ b/arch/arm/boot/dts/imx53.dtsi | |||
@@ -432,7 +432,7 @@ | |||
432 | i2c@53fec000 { /* I2C3 */ | 432 | i2c@53fec000 { /* I2C3 */ |
433 | #address-cells = <1>; | 433 | #address-cells = <1>; |
434 | #size-cells = <0>; | 434 | #size-cells = <0>; |
435 | compatible = "fsl,imx53-i2c", "fsl,imx1-i2c"; | 435 | compatible = "fsl,imx53-i2c", "fsl,imx21-i2c"; |
436 | reg = <0x53fec000 0x4000>; | 436 | reg = <0x53fec000 0x4000>; |
437 | interrupts = <64>; | 437 | interrupts = <64>; |
438 | status = "disabled"; | 438 | status = "disabled"; |
@@ -488,7 +488,7 @@ | |||
488 | i2c@63fc4000 { /* I2C2 */ | 488 | i2c@63fc4000 { /* I2C2 */ |
489 | #address-cells = <1>; | 489 | #address-cells = <1>; |
490 | #size-cells = <0>; | 490 | #size-cells = <0>; |
491 | compatible = "fsl,imx53-i2c", "fsl,imx1-i2c"; | 491 | compatible = "fsl,imx53-i2c", "fsl,imx21-i2c"; |
492 | reg = <0x63fc4000 0x4000>; | 492 | reg = <0x63fc4000 0x4000>; |
493 | interrupts = <63>; | 493 | interrupts = <63>; |
494 | status = "disabled"; | 494 | status = "disabled"; |
@@ -497,7 +497,7 @@ | |||
497 | i2c@63fc8000 { /* I2C1 */ | 497 | i2c@63fc8000 { /* I2C1 */ |
498 | #address-cells = <1>; | 498 | #address-cells = <1>; |
499 | #size-cells = <0>; | 499 | #size-cells = <0>; |
500 | compatible = "fsl,imx53-i2c", "fsl,imx1-i2c"; | 500 | compatible = "fsl,imx53-i2c", "fsl,imx21-i2c"; |
501 | reg = <0x63fc8000 0x4000>; | 501 | reg = <0x63fc8000 0x4000>; |
502 | interrupts = <62>; | 502 | interrupts = <62>; |
503 | status = "disabled"; | 503 | status = "disabled"; |
diff --git a/arch/arm/boot/dts/imx6q.dtsi b/arch/arm/boot/dts/imx6q.dtsi index f3990b04fecf..f604a44a5c66 100644 --- a/arch/arm/boot/dts/imx6q.dtsi +++ b/arch/arm/boot/dts/imx6q.dtsi | |||
@@ -882,7 +882,7 @@ | |||
882 | i2c@021a0000 { /* I2C1 */ | 882 | i2c@021a0000 { /* I2C1 */ |
883 | #address-cells = <1>; | 883 | #address-cells = <1>; |
884 | #size-cells = <0>; | 884 | #size-cells = <0>; |
885 | compatible = "fsl,imx6q-i2c", "fsl,imx1-i2c"; | 885 | compatible = "fsl,imx6q-i2c", "fsl,imx21-i2c"; |
886 | reg = <0x021a0000 0x4000>; | 886 | reg = <0x021a0000 0x4000>; |
887 | interrupts = <0 36 0x04>; | 887 | interrupts = <0 36 0x04>; |
888 | clocks = <&clks 125>; | 888 | clocks = <&clks 125>; |
@@ -892,7 +892,7 @@ | |||
892 | i2c@021a4000 { /* I2C2 */ | 892 | i2c@021a4000 { /* I2C2 */ |
893 | #address-cells = <1>; | 893 | #address-cells = <1>; |
894 | #size-cells = <0>; | 894 | #size-cells = <0>; |
895 | compatible = "fsl,imx6q-i2c", "fsl,imx1-i2c"; | 895 | compatible = "fsl,imx6q-i2c", "fsl,imx21-i2c"; |
896 | reg = <0x021a4000 0x4000>; | 896 | reg = <0x021a4000 0x4000>; |
897 | interrupts = <0 37 0x04>; | 897 | interrupts = <0 37 0x04>; |
898 | clocks = <&clks 126>; | 898 | clocks = <&clks 126>; |
@@ -902,7 +902,7 @@ | |||
902 | i2c@021a8000 { /* I2C3 */ | 902 | i2c@021a8000 { /* I2C3 */ |
903 | #address-cells = <1>; | 903 | #address-cells = <1>; |
904 | #size-cells = <0>; | 904 | #size-cells = <0>; |
905 | compatible = "fsl,imx6q-i2c", "fsl,imx1-i2c"; | 905 | compatible = "fsl,imx6q-i2c", "fsl,imx21-i2c"; |
906 | reg = <0x021a8000 0x4000>; | 906 | reg = <0x021a8000 0x4000>; |
907 | interrupts = <0 38 0x04>; | 907 | interrupts = <0 38 0x04>; |
908 | clocks = <&clks 127>; | 908 | clocks = <&clks 127>; |
diff --git a/arch/arm/boot/dts/integratorap.dts b/arch/arm/boot/dts/integratorap.dts index 61767757b50a..c9c3fa344647 100644 --- a/arch/arm/boot/dts/integratorap.dts +++ b/arch/arm/boot/dts/integratorap.dts | |||
@@ -18,6 +18,11 @@ | |||
18 | bootargs = "root=/dev/ram0 console=ttyAM0,38400n8 earlyprintk"; | 18 | bootargs = "root=/dev/ram0 console=ttyAM0,38400n8 earlyprintk"; |
19 | }; | 19 | }; |
20 | 20 | ||
21 | syscon { | ||
22 | /* AP system controller registers */ | ||
23 | reg = <0x11000000 0x100>; | ||
24 | }; | ||
25 | |||
21 | timer0: timer@13000000 { | 26 | timer0: timer@13000000 { |
22 | compatible = "arm,integrator-timer"; | 27 | compatible = "arm,integrator-timer"; |
23 | }; | 28 | }; |
diff --git a/arch/arm/boot/dts/integratorcp.dts b/arch/arm/boot/dts/integratorcp.dts index 2dd5e4e48481..8b119399025a 100644 --- a/arch/arm/boot/dts/integratorcp.dts +++ b/arch/arm/boot/dts/integratorcp.dts | |||
@@ -18,6 +18,11 @@ | |||
18 | bootargs = "root=/dev/ram0 console=ttyAMA0,38400n8 earlyprintk"; | 18 | bootargs = "root=/dev/ram0 console=ttyAMA0,38400n8 earlyprintk"; |
19 | }; | 19 | }; |
20 | 20 | ||
21 | cpcon { | ||
22 | /* CP controller registers */ | ||
23 | reg = <0xcb000000 0x100>; | ||
24 | }; | ||
25 | |||
21 | timer0: timer@13000000 { | 26 | timer0: timer@13000000 { |
22 | compatible = "arm,sp804", "arm,primecell"; | 27 | compatible = "arm,sp804", "arm,primecell"; |
23 | }; | 28 | }; |
diff --git a/arch/arm/boot/dts/omap2.dtsi b/arch/arm/boot/dts/omap2.dtsi index 581cb081cb0f..761c4b69b25b 100644 --- a/arch/arm/boot/dts/omap2.dtsi +++ b/arch/arm/boot/dts/omap2.dtsi | |||
@@ -12,6 +12,7 @@ | |||
12 | 12 | ||
13 | / { | 13 | / { |
14 | compatible = "ti,omap2430", "ti,omap2420", "ti,omap2"; | 14 | compatible = "ti,omap2430", "ti,omap2420", "ti,omap2"; |
15 | interrupt-parent = <&intc>; | ||
15 | 16 | ||
16 | aliases { | 17 | aliases { |
17 | serial0 = &uart1; | 18 | serial0 = &uart1; |
@@ -65,5 +66,90 @@ | |||
65 | ti,hwmods = "uart3"; | 66 | ti,hwmods = "uart3"; |
66 | clock-frequency = <48000000>; | 67 | clock-frequency = <48000000>; |
67 | }; | 68 | }; |
69 | |||
70 | timer2: timer@4802a000 { | ||
71 | compatible = "ti,omap2-timer"; | ||
72 | reg = <0x4802a000 0x400>; | ||
73 | interrupts = <38>; | ||
74 | ti,hwmods = "timer2"; | ||
75 | }; | ||
76 | |||
77 | timer3: timer@48078000 { | ||
78 | compatible = "ti,omap2-timer"; | ||
79 | reg = <0x48078000 0x400>; | ||
80 | interrupts = <39>; | ||
81 | ti,hwmods = "timer3"; | ||
82 | }; | ||
83 | |||
84 | timer4: timer@4807a000 { | ||
85 | compatible = "ti,omap2-timer"; | ||
86 | reg = <0x4807a000 0x400>; | ||
87 | interrupts = <40>; | ||
88 | ti,hwmods = "timer4"; | ||
89 | }; | ||
90 | |||
91 | timer5: timer@4807c000 { | ||
92 | compatible = "ti,omap2-timer"; | ||
93 | reg = <0x4807c000 0x400>; | ||
94 | interrupts = <41>; | ||
95 | ti,hwmods = "timer5"; | ||
96 | ti,timer-dsp; | ||
97 | }; | ||
98 | |||
99 | timer6: timer@4807e000 { | ||
100 | compatible = "ti,omap2-timer"; | ||
101 | reg = <0x4807e000 0x400>; | ||
102 | interrupts = <42>; | ||
103 | ti,hwmods = "timer6"; | ||
104 | ti,timer-dsp; | ||
105 | }; | ||
106 | |||
107 | timer7: timer@48080000 { | ||
108 | compatible = "ti,omap2-timer"; | ||
109 | reg = <0x48080000 0x400>; | ||
110 | interrupts = <43>; | ||
111 | ti,hwmods = "timer7"; | ||
112 | ti,timer-dsp; | ||
113 | }; | ||
114 | |||
115 | timer8: timer@48082000 { | ||
116 | compatible = "ti,omap2-timer"; | ||
117 | reg = <0x48082000 0x400>; | ||
118 | interrupts = <44>; | ||
119 | ti,hwmods = "timer8"; | ||
120 | ti,timer-dsp; | ||
121 | }; | ||
122 | |||
123 | timer9: timer@48084000 { | ||
124 | compatible = "ti,omap2-timer"; | ||
125 | reg = <0x48084000 0x400>; | ||
126 | interrupts = <45>; | ||
127 | ti,hwmods = "timer9"; | ||
128 | ti,timer-pwm; | ||
129 | }; | ||
130 | |||
131 | timer10: timer@48086000 { | ||
132 | compatible = "ti,omap2-timer"; | ||
133 | reg = <0x48086000 0x400>; | ||
134 | interrupts = <46>; | ||
135 | ti,hwmods = "timer10"; | ||
136 | ti,timer-pwm; | ||
137 | }; | ||
138 | |||
139 | timer11: timer@48088000 { | ||
140 | compatible = "ti,omap2-timer"; | ||
141 | reg = <0x48088000 0x400>; | ||
142 | interrupts = <47>; | ||
143 | ti,hwmods = "timer11"; | ||
144 | ti,timer-pwm; | ||
145 | }; | ||
146 | |||
147 | timer12: timer@4808a000 { | ||
148 | compatible = "ti,omap2-timer"; | ||
149 | reg = <0x4808a000 0x400>; | ||
150 | interrupts = <48>; | ||
151 | ti,hwmods = "timer12"; | ||
152 | ti,timer-pwm; | ||
153 | }; | ||
68 | }; | 154 | }; |
69 | }; | 155 | }; |
diff --git a/arch/arm/boot/dts/omap2420.dtsi b/arch/arm/boot/dts/omap2420.dtsi index bfd76b4a0ddc..af6560908905 100644 --- a/arch/arm/boot/dts/omap2420.dtsi +++ b/arch/arm/boot/dts/omap2420.dtsi | |||
@@ -14,6 +14,12 @@ | |||
14 | compatible = "ti,omap2420", "ti,omap2"; | 14 | compatible = "ti,omap2420", "ti,omap2"; |
15 | 15 | ||
16 | ocp { | 16 | ocp { |
17 | counter32k: counter@48004000 { | ||
18 | compatible = "ti,omap-counter32k"; | ||
19 | reg = <0x48004000 0x20>; | ||
20 | ti,hwmods = "counter_32k"; | ||
21 | }; | ||
22 | |||
17 | omap2420_pmx: pinmux@48000030 { | 23 | omap2420_pmx: pinmux@48000030 { |
18 | compatible = "ti,omap2420-padconf", "pinctrl-single"; | 24 | compatible = "ti,omap2420-padconf", "pinctrl-single"; |
19 | reg = <0x48000030 0x0113>; | 25 | reg = <0x48000030 0x0113>; |
@@ -30,7 +36,6 @@ | |||
30 | interrupts = <59>, /* TX interrupt */ | 36 | interrupts = <59>, /* TX interrupt */ |
31 | <60>; /* RX interrupt */ | 37 | <60>; /* RX interrupt */ |
32 | interrupt-names = "tx", "rx"; | 38 | interrupt-names = "tx", "rx"; |
33 | interrupt-parent = <&intc>; | ||
34 | ti,hwmods = "mcbsp1"; | 39 | ti,hwmods = "mcbsp1"; |
35 | }; | 40 | }; |
36 | 41 | ||
@@ -41,8 +46,15 @@ | |||
41 | interrupts = <62>, /* TX interrupt */ | 46 | interrupts = <62>, /* TX interrupt */ |
42 | <63>; /* RX interrupt */ | 47 | <63>; /* RX interrupt */ |
43 | interrupt-names = "tx", "rx"; | 48 | interrupt-names = "tx", "rx"; |
44 | interrupt-parent = <&intc>; | ||
45 | ti,hwmods = "mcbsp2"; | 49 | ti,hwmods = "mcbsp2"; |
46 | }; | 50 | }; |
51 | |||
52 | timer1: timer@48028000 { | ||
53 | compatible = "ti,omap2-timer"; | ||
54 | reg = <0x48028000 0x400>; | ||
55 | interrupts = <37>; | ||
56 | ti,hwmods = "timer1"; | ||
57 | ti,timer-alwon; | ||
58 | }; | ||
47 | }; | 59 | }; |
48 | }; | 60 | }; |
diff --git a/arch/arm/boot/dts/omap2430.dtsi b/arch/arm/boot/dts/omap2430.dtsi index 4565d9750f4d..c3924457c9b6 100644 --- a/arch/arm/boot/dts/omap2430.dtsi +++ b/arch/arm/boot/dts/omap2430.dtsi | |||
@@ -14,6 +14,12 @@ | |||
14 | compatible = "ti,omap2430", "ti,omap2"; | 14 | compatible = "ti,omap2430", "ti,omap2"; |
15 | 15 | ||
16 | ocp { | 16 | ocp { |
17 | counter32k: counter@49020000 { | ||
18 | compatible = "ti,omap-counter32k"; | ||
19 | reg = <0x49020000 0x20>; | ||
20 | ti,hwmods = "counter_32k"; | ||
21 | }; | ||
22 | |||
17 | omap2430_pmx: pinmux@49002030 { | 23 | omap2430_pmx: pinmux@49002030 { |
18 | compatible = "ti,omap2430-padconf", "pinctrl-single"; | 24 | compatible = "ti,omap2430-padconf", "pinctrl-single"; |
19 | reg = <0x49002030 0x0154>; | 25 | reg = <0x49002030 0x0154>; |
@@ -32,7 +38,6 @@ | |||
32 | <60>, /* RX interrupt */ | 38 | <60>, /* RX interrupt */ |
33 | <61>; /* RX overflow interrupt */ | 39 | <61>; /* RX overflow interrupt */ |
34 | interrupt-names = "common", "tx", "rx", "rx_overflow"; | 40 | interrupt-names = "common", "tx", "rx", "rx_overflow"; |
35 | interrupt-parent = <&intc>; | ||
36 | ti,buffer-size = <128>; | 41 | ti,buffer-size = <128>; |
37 | ti,hwmods = "mcbsp1"; | 42 | ti,hwmods = "mcbsp1"; |
38 | }; | 43 | }; |
@@ -45,7 +50,6 @@ | |||
45 | <62>, /* TX interrupt */ | 50 | <62>, /* TX interrupt */ |
46 | <63>; /* RX interrupt */ | 51 | <63>; /* RX interrupt */ |
47 | interrupt-names = "common", "tx", "rx"; | 52 | interrupt-names = "common", "tx", "rx"; |
48 | interrupt-parent = <&intc>; | ||
49 | ti,buffer-size = <128>; | 53 | ti,buffer-size = <128>; |
50 | ti,hwmods = "mcbsp2"; | 54 | ti,hwmods = "mcbsp2"; |
51 | }; | 55 | }; |
@@ -58,7 +62,6 @@ | |||
58 | <89>, /* TX interrupt */ | 62 | <89>, /* TX interrupt */ |
59 | <90>; /* RX interrupt */ | 63 | <90>; /* RX interrupt */ |
60 | interrupt-names = "common", "tx", "rx"; | 64 | interrupt-names = "common", "tx", "rx"; |
61 | interrupt-parent = <&intc>; | ||
62 | ti,buffer-size = <128>; | 65 | ti,buffer-size = <128>; |
63 | ti,hwmods = "mcbsp3"; | 66 | ti,hwmods = "mcbsp3"; |
64 | }; | 67 | }; |
@@ -71,7 +74,6 @@ | |||
71 | <54>, /* TX interrupt */ | 74 | <54>, /* TX interrupt */ |
72 | <55>; /* RX interrupt */ | 75 | <55>; /* RX interrupt */ |
73 | interrupt-names = "common", "tx", "rx"; | 76 | interrupt-names = "common", "tx", "rx"; |
74 | interrupt-parent = <&intc>; | ||
75 | ti,buffer-size = <128>; | 77 | ti,buffer-size = <128>; |
76 | ti,hwmods = "mcbsp4"; | 78 | ti,hwmods = "mcbsp4"; |
77 | }; | 79 | }; |
@@ -84,9 +86,16 @@ | |||
84 | <81>, /* TX interrupt */ | 86 | <81>, /* TX interrupt */ |
85 | <82>; /* RX interrupt */ | 87 | <82>; /* RX interrupt */ |
86 | interrupt-names = "common", "tx", "rx"; | 88 | interrupt-names = "common", "tx", "rx"; |
87 | interrupt-parent = <&intc>; | ||
88 | ti,buffer-size = <128>; | 89 | ti,buffer-size = <128>; |
89 | ti,hwmods = "mcbsp5"; | 90 | ti,hwmods = "mcbsp5"; |
90 | }; | 91 | }; |
92 | |||
93 | timer1: timer@49018000 { | ||
94 | compatible = "ti,omap2-timer"; | ||
95 | reg = <0x49018000 0x400>; | ||
96 | interrupts = <37>; | ||
97 | ti,hwmods = "timer1"; | ||
98 | ti,timer-alwon; | ||
99 | }; | ||
91 | }; | 100 | }; |
92 | }; | 101 | }; |
diff --git a/arch/arm/boot/dts/omap3-beagle-xm.dts b/arch/arm/boot/dts/omap3-beagle-xm.dts index c38cf76df81f..3705a81c1fc2 100644 --- a/arch/arm/boot/dts/omap3-beagle-xm.dts +++ b/arch/arm/boot/dts/omap3-beagle-xm.dts | |||
@@ -55,12 +55,6 @@ | |||
55 | interrupts = <7>; /* SYS_NIRQ cascaded to intc */ | 55 | interrupts = <7>; /* SYS_NIRQ cascaded to intc */ |
56 | interrupt-parent = <&intc>; | 56 | interrupt-parent = <&intc>; |
57 | 57 | ||
58 | vsim: regulator-vsim { | ||
59 | compatible = "ti,twl4030-vsim"; | ||
60 | regulator-min-microvolt = <1800000>; | ||
61 | regulator-max-microvolt = <3000000>; | ||
62 | }; | ||
63 | |||
64 | twl_audio: audio { | 58 | twl_audio: audio { |
65 | compatible = "ti,twl4030-audio"; | 59 | compatible = "ti,twl4030-audio"; |
66 | codec { | 60 | codec { |
diff --git a/arch/arm/boot/dts/omap3-beagle.dts b/arch/arm/boot/dts/omap3-beagle.dts new file mode 100644 index 000000000000..f624dc85d441 --- /dev/null +++ b/arch/arm/boot/dts/omap3-beagle.dts | |||
@@ -0,0 +1,67 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/ | ||
3 | * | ||
4 | * This program is free software; you can redistribute it and/or modify | ||
5 | * it under the terms of the GNU General Public License version 2 as | ||
6 | * published by the Free Software Foundation. | ||
7 | */ | ||
8 | /dts-v1/; | ||
9 | |||
10 | /include/ "omap3.dtsi" | ||
11 | |||
12 | / { | ||
13 | model = "TI OMAP3 BeagleBoard"; | ||
14 | compatible = "ti,omap3-beagle", "ti,omap3"; | ||
15 | |||
16 | memory { | ||
17 | device_type = "memory"; | ||
18 | reg = <0x80000000 0x10000000>; /* 256 MB */ | ||
19 | }; | ||
20 | |||
21 | leds { | ||
22 | compatible = "gpio-leds"; | ||
23 | pmu_stat { | ||
24 | label = "beagleboard::pmu_stat"; | ||
25 | gpios = <&twl_gpio 19 0>; /* LEDB */ | ||
26 | }; | ||
27 | |||
28 | heartbeat { | ||
29 | label = "beagleboard::usr0"; | ||
30 | gpios = <&gpio5 22 0>; /* 150 -> D6 LED */ | ||
31 | linux,default-trigger = "heartbeat"; | ||
32 | }; | ||
33 | |||
34 | mmc { | ||
35 | label = "beagleboard::usr1"; | ||
36 | gpios = <&gpio5 21 0>; /* 149 -> D7 LED */ | ||
37 | linux,default-trigger = "mmc0"; | ||
38 | }; | ||
39 | }; | ||
40 | |||
41 | }; | ||
42 | |||
43 | &i2c1 { | ||
44 | clock-frequency = <2600000>; | ||
45 | |||
46 | twl: twl@48 { | ||
47 | reg = <0x48>; | ||
48 | interrupts = <7>; /* SYS_NIRQ cascaded to intc */ | ||
49 | interrupt-parent = <&intc>; | ||
50 | }; | ||
51 | }; | ||
52 | |||
53 | /include/ "twl4030.dtsi" | ||
54 | |||
55 | &mmc1 { | ||
56 | vmmc-supply = <&vmmc1>; | ||
57 | vmmc_aux-supply = <&vsim>; | ||
58 | bus-width = <8>; | ||
59 | }; | ||
60 | |||
61 | &mmc2 { | ||
62 | status = "disabled"; | ||
63 | }; | ||
64 | |||
65 | &mmc3 { | ||
66 | status = "disabled"; | ||
67 | }; | ||
diff --git a/arch/arm/boot/dts/omap3.dtsi b/arch/arm/boot/dts/omap3.dtsi index 696e929d0304..1acc26148ffc 100644 --- a/arch/arm/boot/dts/omap3.dtsi +++ b/arch/arm/boot/dts/omap3.dtsi | |||
@@ -12,6 +12,7 @@ | |||
12 | 12 | ||
13 | / { | 13 | / { |
14 | compatible = "ti,omap3430", "ti,omap3"; | 14 | compatible = "ti,omap3430", "ti,omap3"; |
15 | interrupt-parent = <&intc>; | ||
15 | 16 | ||
16 | aliases { | 17 | aliases { |
17 | serial0 = &uart1; | 18 | serial0 = &uart1; |
@@ -60,6 +61,12 @@ | |||
60 | ranges; | 61 | ranges; |
61 | ti,hwmods = "l3_main"; | 62 | ti,hwmods = "l3_main"; |
62 | 63 | ||
64 | counter32k: counter@48320000 { | ||
65 | compatible = "ti,omap-counter32k"; | ||
66 | reg = <0x48320000 0x20>; | ||
67 | ti,hwmods = "counter_32k"; | ||
68 | }; | ||
69 | |||
63 | intc: interrupt-controller@48200000 { | 70 | intc: interrupt-controller@48200000 { |
64 | compatible = "ti,omap2-intc"; | 71 | compatible = "ti,omap2-intc"; |
65 | interrupt-controller; | 72 | interrupt-controller; |
@@ -240,7 +247,6 @@ | |||
240 | <59>, /* TX interrupt */ | 247 | <59>, /* TX interrupt */ |
241 | <60>; /* RX interrupt */ | 248 | <60>; /* RX interrupt */ |
242 | interrupt-names = "common", "tx", "rx"; | 249 | interrupt-names = "common", "tx", "rx"; |
243 | interrupt-parent = <&intc>; | ||
244 | ti,buffer-size = <128>; | 250 | ti,buffer-size = <128>; |
245 | ti,hwmods = "mcbsp1"; | 251 | ti,hwmods = "mcbsp1"; |
246 | }; | 252 | }; |
@@ -255,7 +261,6 @@ | |||
255 | <63>, /* RX interrupt */ | 261 | <63>, /* RX interrupt */ |
256 | <4>; /* Sidetone */ | 262 | <4>; /* Sidetone */ |
257 | interrupt-names = "common", "tx", "rx", "sidetone"; | 263 | interrupt-names = "common", "tx", "rx", "sidetone"; |
258 | interrupt-parent = <&intc>; | ||
259 | ti,buffer-size = <1280>; | 264 | ti,buffer-size = <1280>; |
260 | ti,hwmods = "mcbsp2", "mcbsp2_sidetone"; | 265 | ti,hwmods = "mcbsp2", "mcbsp2_sidetone"; |
261 | }; | 266 | }; |
@@ -270,7 +275,6 @@ | |||
270 | <90>, /* RX interrupt */ | 275 | <90>, /* RX interrupt */ |
271 | <5>; /* Sidetone */ | 276 | <5>; /* Sidetone */ |
272 | interrupt-names = "common", "tx", "rx", "sidetone"; | 277 | interrupt-names = "common", "tx", "rx", "sidetone"; |
273 | interrupt-parent = <&intc>; | ||
274 | ti,buffer-size = <128>; | 278 | ti,buffer-size = <128>; |
275 | ti,hwmods = "mcbsp3", "mcbsp3_sidetone"; | 279 | ti,hwmods = "mcbsp3", "mcbsp3_sidetone"; |
276 | }; | 280 | }; |
@@ -283,7 +287,6 @@ | |||
283 | <54>, /* TX interrupt */ | 287 | <54>, /* TX interrupt */ |
284 | <55>; /* RX interrupt */ | 288 | <55>; /* RX interrupt */ |
285 | interrupt-names = "common", "tx", "rx"; | 289 | interrupt-names = "common", "tx", "rx"; |
286 | interrupt-parent = <&intc>; | ||
287 | ti,buffer-size = <128>; | 290 | ti,buffer-size = <128>; |
288 | ti,hwmods = "mcbsp4"; | 291 | ti,hwmods = "mcbsp4"; |
289 | }; | 292 | }; |
@@ -296,9 +299,103 @@ | |||
296 | <81>, /* TX interrupt */ | 299 | <81>, /* TX interrupt */ |
297 | <82>; /* RX interrupt */ | 300 | <82>; /* RX interrupt */ |
298 | interrupt-names = "common", "tx", "rx"; | 301 | interrupt-names = "common", "tx", "rx"; |
299 | interrupt-parent = <&intc>; | ||
300 | ti,buffer-size = <128>; | 302 | ti,buffer-size = <128>; |
301 | ti,hwmods = "mcbsp5"; | 303 | ti,hwmods = "mcbsp5"; |
302 | }; | 304 | }; |
305 | |||
306 | timer1: timer@48318000 { | ||
307 | compatible = "ti,omap2-timer"; | ||
308 | reg = <0x48318000 0x400>; | ||
309 | interrupts = <37>; | ||
310 | ti,hwmods = "timer1"; | ||
311 | ti,timer-alwon; | ||
312 | }; | ||
313 | |||
314 | timer2: timer@49032000 { | ||
315 | compatible = "ti,omap2-timer"; | ||
316 | reg = <0x49032000 0x400>; | ||
317 | interrupts = <38>; | ||
318 | ti,hwmods = "timer2"; | ||
319 | }; | ||
320 | |||
321 | timer3: timer@49034000 { | ||
322 | compatible = "ti,omap2-timer"; | ||
323 | reg = <0x49034000 0x400>; | ||
324 | interrupts = <39>; | ||
325 | ti,hwmods = "timer3"; | ||
326 | }; | ||
327 | |||
328 | timer4: timer@49036000 { | ||
329 | compatible = "ti,omap2-timer"; | ||
330 | reg = <0x49036000 0x400>; | ||
331 | interrupts = <40>; | ||
332 | ti,hwmods = "timer4"; | ||
333 | }; | ||
334 | |||
335 | timer5: timer@49038000 { | ||
336 | compatible = "ti,omap2-timer"; | ||
337 | reg = <0x49038000 0x400>; | ||
338 | interrupts = <41>; | ||
339 | ti,hwmods = "timer5"; | ||
340 | ti,timer-dsp; | ||
341 | }; | ||
342 | |||
343 | timer6: timer@4903a000 { | ||
344 | compatible = "ti,omap2-timer"; | ||
345 | reg = <0x4903a000 0x400>; | ||
346 | interrupts = <42>; | ||
347 | ti,hwmods = "timer6"; | ||
348 | ti,timer-dsp; | ||
349 | }; | ||
350 | |||
351 | timer7: timer@4903c000 { | ||
352 | compatible = "ti,omap2-timer"; | ||
353 | reg = <0x4903c000 0x400>; | ||
354 | interrupts = <43>; | ||
355 | ti,hwmods = "timer7"; | ||
356 | ti,timer-dsp; | ||
357 | }; | ||
358 | |||
359 | timer8: timer@4903e000 { | ||
360 | compatible = "ti,omap2-timer"; | ||
361 | reg = <0x4903e000 0x400>; | ||
362 | interrupts = <44>; | ||
363 | ti,hwmods = "timer8"; | ||
364 | ti,timer-pwm; | ||
365 | ti,timer-dsp; | ||
366 | }; | ||
367 | |||
368 | timer9: timer@49040000 { | ||
369 | compatible = "ti,omap2-timer"; | ||
370 | reg = <0x49040000 0x400>; | ||
371 | interrupts = <45>; | ||
372 | ti,hwmods = "timer9"; | ||
373 | ti,timer-pwm; | ||
374 | }; | ||
375 | |||
376 | timer10: timer@48086000 { | ||
377 | compatible = "ti,omap2-timer"; | ||
378 | reg = <0x48086000 0x400>; | ||
379 | interrupts = <46>; | ||
380 | ti,hwmods = "timer10"; | ||
381 | ti,timer-pwm; | ||
382 | }; | ||
383 | |||
384 | timer11: timer@48088000 { | ||
385 | compatible = "ti,omap2-timer"; | ||
386 | reg = <0x48088000 0x400>; | ||
387 | interrupts = <47>; | ||
388 | ti,hwmods = "timer11"; | ||
389 | ti,timer-pwm; | ||
390 | }; | ||
391 | |||
392 | timer12: timer@48304000 { | ||
393 | compatible = "ti,omap2-timer"; | ||
394 | reg = <0x48304000 0x400>; | ||
395 | interrupts = <95>; | ||
396 | ti,hwmods = "timer12"; | ||
397 | ti,timer-alwon; | ||
398 | ti,timer-secure; | ||
399 | }; | ||
303 | }; | 400 | }; |
304 | }; | 401 | }; |
diff --git a/arch/arm/boot/dts/omap4-panda-a4.dts b/arch/arm/boot/dts/omap4-panda-a4.dts new file mode 100644 index 000000000000..75466d2abfb5 --- /dev/null +++ b/arch/arm/boot/dts/omap4-panda-a4.dts | |||
@@ -0,0 +1,17 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/ | ||
3 | * | ||
4 | * This program is free software; you can redistribute it and/or modify | ||
5 | * it under the terms of the GNU General Public License version 2 as | ||
6 | * published by the Free Software Foundation. | ||
7 | */ | ||
8 | /include/ "omap4-panda.dts" | ||
9 | |||
10 | /* Pandaboard Rev A4+ have external pullups on SCL & SDA */ | ||
11 | &dss_hdmi_pins { | ||
12 | pinctrl-single,pins = < | ||
13 | 0x5a 0x118 /* hdmi_cec.hdmi_cec INPUT PULLUP | MODE 0 */ | ||
14 | 0x5c 0x100 /* hdmi_scl.hdmi_scl INPUT | MODE 0 */ | ||
15 | 0x5e 0x100 /* hdmi_sda.hdmi_sda INPUT | MODE 0 */ | ||
16 | >; | ||
17 | }; | ||
diff --git a/arch/arm/boot/dts/omap4-pandaES.dts b/arch/arm/boot/dts/omap4-panda-es.dts index d4ba43a48d9b..73bc1a67e444 100644 --- a/arch/arm/boot/dts/omap4-pandaES.dts +++ b/arch/arm/boot/dts/omap4-panda-es.dts | |||
@@ -22,3 +22,12 @@ | |||
22 | "AFML", "Line In", | 22 | "AFML", "Line In", |
23 | "AFMR", "Line In"; | 23 | "AFMR", "Line In"; |
24 | }; | 24 | }; |
25 | |||
26 | /* PandaboardES has external pullups on SCL & SDA */ | ||
27 | &dss_hdmi_pins { | ||
28 | pinctrl-single,pins = < | ||
29 | 0x5a 0x118 /* hdmi_cec.hdmi_cec INPUT PULLUP | MODE 0 */ | ||
30 | 0x5c 0x100 /* hdmi_scl.hdmi_scl INPUT | MODE 0 */ | ||
31 | 0x5e 0x100 /* hdmi_sda.hdmi_sda INPUT | MODE 0 */ | ||
32 | >; | ||
33 | }; | ||
diff --git a/arch/arm/boot/dts/omap4-panda.dts b/arch/arm/boot/dts/omap4-panda.dts index e8f927cbb376..4122efe31cfd 100644 --- a/arch/arm/boot/dts/omap4-panda.dts +++ b/arch/arm/boot/dts/omap4-panda.dts | |||
@@ -65,6 +65,8 @@ | |||
65 | &twl6040_pins | 65 | &twl6040_pins |
66 | &mcpdm_pins | 66 | &mcpdm_pins |
67 | &mcbsp1_pins | 67 | &mcbsp1_pins |
68 | &dss_hdmi_pins | ||
69 | &tpd12s015_pins | ||
68 | >; | 70 | >; |
69 | 71 | ||
70 | twl6040_pins: pinmux_twl6040_pins { | 72 | twl6040_pins: pinmux_twl6040_pins { |
@@ -92,6 +94,22 @@ | |||
92 | 0xc4 0x100 /* abe_mcbsp1_fsx.abe_mcbsp1_fsx INPUT | MODE0 */ | 94 | 0xc4 0x100 /* abe_mcbsp1_fsx.abe_mcbsp1_fsx INPUT | MODE0 */ |
93 | >; | 95 | >; |
94 | }; | 96 | }; |
97 | |||
98 | dss_hdmi_pins: pinmux_dss_hdmi_pins { | ||
99 | pinctrl-single,pins = < | ||
100 | 0x5a 0x118 /* hdmi_cec.hdmi_cec INPUT PULLUP | MODE 0 */ | ||
101 | 0x5c 0x118 /* hdmi_scl.hdmi_scl INPUT PULLUP | MODE 0 */ | ||
102 | 0x5e 0x118 /* hdmi_sda.hdmi_sda INPUT PULLUP | MODE 0 */ | ||
103 | >; | ||
104 | }; | ||
105 | |||
106 | tpd12s015_pins: pinmux_tpd12s015_pins { | ||
107 | pinctrl-single,pins = < | ||
108 | 0x22 0x3 /* gpmc_a17.gpio_41 OUTPUT | MODE3 */ | ||
109 | 0x48 0x3 /* gpmc_nbe1.gpio_60 OUTPUT | MODE3 */ | ||
110 | 0x58 0x10b /* hdmi_hpd.gpio_63 INPUT PULLDOWN | MODE3 */ | ||
111 | >; | ||
112 | }; | ||
95 | }; | 113 | }; |
96 | 114 | ||
97 | &i2c1 { | 115 | &i2c1 { |
@@ -184,3 +202,7 @@ | |||
184 | &dmic { | 202 | &dmic { |
185 | status = "disabled"; | 203 | status = "disabled"; |
186 | }; | 204 | }; |
205 | |||
206 | &twl_usb_comparator { | ||
207 | usb-supply = <&vusb>; | ||
208 | }; | ||
diff --git a/arch/arm/boot/dts/omap4-sdp-es23plus.dts b/arch/arm/boot/dts/omap4-sdp-es23plus.dts new file mode 100644 index 000000000000..b4a40ffbce31 --- /dev/null +++ b/arch/arm/boot/dts/omap4-sdp-es23plus.dts | |||
@@ -0,0 +1,17 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/ | ||
3 | * | ||
4 | * This program is free software; you can redistribute it and/or modify | ||
5 | * it under the terms of the GNU General Public License version 2 as | ||
6 | * published by the Free Software Foundation. | ||
7 | */ | ||
8 | /include/ "omap4-sdp.dts" | ||
9 | |||
10 | /* SDP boards with 4430 ES2.3+ or 4460 have external pullups on SCL & SDA */ | ||
11 | &dss_hdmi_pins { | ||
12 | pinctrl-single,pins = < | ||
13 | 0x5a 0x118 /* hdmi_cec.hdmi_cec INPUT PULLUP | MODE 0 */ | ||
14 | 0x5c 0x100 /* hdmi_scl.hdmi_scl INPUT | MODE 0 */ | ||
15 | 0x5e 0x100 /* hdmi_sda.hdmi_sda INPUT | MODE 0 */ | ||
16 | >; | ||
17 | }; | ||
diff --git a/arch/arm/boot/dts/omap4-sdp.dts b/arch/arm/boot/dts/omap4-sdp.dts index 5b7e04fbff50..43e5258a9372 100644 --- a/arch/arm/boot/dts/omap4-sdp.dts +++ b/arch/arm/boot/dts/omap4-sdp.dts | |||
@@ -124,6 +124,8 @@ | |||
124 | &dmic_pins | 124 | &dmic_pins |
125 | &mcbsp1_pins | 125 | &mcbsp1_pins |
126 | &mcbsp2_pins | 126 | &mcbsp2_pins |
127 | &dss_hdmi_pins | ||
128 | &tpd12s015_pins | ||
127 | >; | 129 | >; |
128 | 130 | ||
129 | uart2_pins: pinmux_uart2_pins { | 131 | uart2_pins: pinmux_uart2_pins { |
@@ -194,6 +196,22 @@ | |||
194 | 0xbc 0x100 /* abe_mcbsp2_fsx.abe_mcbsp2_fsx INPUT | MODE0 */ | 196 | 0xbc 0x100 /* abe_mcbsp2_fsx.abe_mcbsp2_fsx INPUT | MODE0 */ |
195 | >; | 197 | >; |
196 | }; | 198 | }; |
199 | |||
200 | dss_hdmi_pins: pinmux_dss_hdmi_pins { | ||
201 | pinctrl-single,pins = < | ||
202 | 0x5a 0x118 /* hdmi_cec.hdmi_cec INPUT PULLUP | MODE 0 */ | ||
203 | 0x5c 0x118 /* hdmi_scl.hdmi_scl INPUT PULLUP | MODE 0 */ | ||
204 | 0x5e 0x118 /* hdmi_sda.hdmi_sda INPUT PULLUP | MODE 0 */ | ||
205 | >; | ||
206 | }; | ||
207 | |||
208 | tpd12s015_pins: pinmux_tpd12s015_pins { | ||
209 | pinctrl-single,pins = < | ||
210 | 0x22 0x3 /* gpmc_a17.gpio_41 OUTPUT | MODE3 */ | ||
211 | 0x48 0x3 /* gpmc_nbe1.gpio_60 OUTPUT | MODE3 */ | ||
212 | 0x58 0x10b /* hdmi_hpd.gpio_63 INPUT PULLDOWN | MODE3 */ | ||
213 | >; | ||
214 | }; | ||
197 | }; | 215 | }; |
198 | 216 | ||
199 | &i2c1 { | 217 | &i2c1 { |
@@ -406,3 +424,7 @@ | |||
406 | &mcbsp3 { | 424 | &mcbsp3 { |
407 | status = "disabled"; | 425 | status = "disabled"; |
408 | }; | 426 | }; |
427 | |||
428 | &twl_usb_comparator { | ||
429 | usb-supply = <&vusb>; | ||
430 | }; | ||
diff --git a/arch/arm/boot/dts/omap4-var_som.dts b/arch/arm/boot/dts/omap4-var-som.dts index 6601e6af6092..6601e6af6092 100644 --- a/arch/arm/boot/dts/omap4-var_som.dts +++ b/arch/arm/boot/dts/omap4-var-som.dts | |||
diff --git a/arch/arm/boot/dts/omap4.dtsi b/arch/arm/boot/dts/omap4.dtsi index 3883f94fdbd0..739bb79e410e 100644 --- a/arch/arm/boot/dts/omap4.dtsi +++ b/arch/arm/boot/dts/omap4.dtsi | |||
@@ -95,6 +95,12 @@ | |||
95 | ranges; | 95 | ranges; |
96 | ti,hwmods = "l3_main_1", "l3_main_2", "l3_main_3"; | 96 | ti,hwmods = "l3_main_1", "l3_main_2", "l3_main_3"; |
97 | 97 | ||
98 | counter32k: counter@4a304000 { | ||
99 | compatible = "ti,omap-counter32k"; | ||
100 | reg = <0x4a304000 0x20>; | ||
101 | ti,hwmods = "counter_32k"; | ||
102 | }; | ||
103 | |||
98 | omap4_pmx_core: pinmux@4a100040 { | 104 | omap4_pmx_core: pinmux@4a100040 { |
99 | compatible = "ti,omap4-padconf", "pinctrl-single"; | 105 | compatible = "ti,omap4-padconf", "pinctrl-single"; |
100 | reg = <0x4a100040 0x0196>; | 106 | reg = <0x4a100040 0x0196>; |
@@ -340,7 +346,6 @@ | |||
340 | <0x49032000 0x7f>; /* L3 Interconnect */ | 346 | <0x49032000 0x7f>; /* L3 Interconnect */ |
341 | reg-names = "mpu", "dma"; | 347 | reg-names = "mpu", "dma"; |
342 | interrupts = <0 112 0x4>; | 348 | interrupts = <0 112 0x4>; |
343 | interrupt-parent = <&gic>; | ||
344 | ti,hwmods = "mcpdm"; | 349 | ti,hwmods = "mcpdm"; |
345 | }; | 350 | }; |
346 | 351 | ||
@@ -350,7 +355,6 @@ | |||
350 | <0x4902e000 0x7f>; /* L3 Interconnect */ | 355 | <0x4902e000 0x7f>; /* L3 Interconnect */ |
351 | reg-names = "mpu", "dma"; | 356 | reg-names = "mpu", "dma"; |
352 | interrupts = <0 114 0x4>; | 357 | interrupts = <0 114 0x4>; |
353 | interrupt-parent = <&gic>; | ||
354 | ti,hwmods = "dmic"; | 358 | ti,hwmods = "dmic"; |
355 | }; | 359 | }; |
356 | 360 | ||
@@ -361,7 +365,6 @@ | |||
361 | reg-names = "mpu", "dma"; | 365 | reg-names = "mpu", "dma"; |
362 | interrupts = <0 17 0x4>; | 366 | interrupts = <0 17 0x4>; |
363 | interrupt-names = "common"; | 367 | interrupt-names = "common"; |
364 | interrupt-parent = <&gic>; | ||
365 | ti,buffer-size = <128>; | 368 | ti,buffer-size = <128>; |
366 | ti,hwmods = "mcbsp1"; | 369 | ti,hwmods = "mcbsp1"; |
367 | }; | 370 | }; |
@@ -373,7 +376,6 @@ | |||
373 | reg-names = "mpu", "dma"; | 376 | reg-names = "mpu", "dma"; |
374 | interrupts = <0 22 0x4>; | 377 | interrupts = <0 22 0x4>; |
375 | interrupt-names = "common"; | 378 | interrupt-names = "common"; |
376 | interrupt-parent = <&gic>; | ||
377 | ti,buffer-size = <128>; | 379 | ti,buffer-size = <128>; |
378 | ti,hwmods = "mcbsp2"; | 380 | ti,hwmods = "mcbsp2"; |
379 | }; | 381 | }; |
@@ -385,7 +387,6 @@ | |||
385 | reg-names = "mpu", "dma"; | 387 | reg-names = "mpu", "dma"; |
386 | interrupts = <0 23 0x4>; | 388 | interrupts = <0 23 0x4>; |
387 | interrupt-names = "common"; | 389 | interrupt-names = "common"; |
388 | interrupt-parent = <&gic>; | ||
389 | ti,buffer-size = <128>; | 390 | ti,buffer-size = <128>; |
390 | ti,hwmods = "mcbsp3"; | 391 | ti,hwmods = "mcbsp3"; |
391 | }; | 392 | }; |
@@ -396,7 +397,6 @@ | |||
396 | reg-names = "mpu"; | 397 | reg-names = "mpu"; |
397 | interrupts = <0 16 0x4>; | 398 | interrupts = <0 16 0x4>; |
398 | interrupt-names = "common"; | 399 | interrupt-names = "common"; |
399 | interrupt-parent = <&gic>; | ||
400 | ti,buffer-size = <128>; | 400 | ti,buffer-size = <128>; |
401 | ti,hwmods = "mcbsp4"; | 401 | ti,hwmods = "mcbsp4"; |
402 | }; | 402 | }; |
@@ -431,12 +431,103 @@ | |||
431 | hw-caps-temp-alert; | 431 | hw-caps-temp-alert; |
432 | }; | 432 | }; |
433 | 433 | ||
434 | ocp2scp { | 434 | ocp2scp@4a0ad000 { |
435 | compatible = "ti,omap-ocp2scp"; | 435 | compatible = "ti,omap-ocp2scp"; |
436 | reg = <0x4a0ad000 0x1f>; | ||
436 | #address-cells = <1>; | 437 | #address-cells = <1>; |
437 | #size-cells = <1>; | 438 | #size-cells = <1>; |
438 | ranges; | 439 | ranges; |
439 | ti,hwmods = "ocp2scp_usb_phy"; | 440 | ti,hwmods = "ocp2scp_usb_phy"; |
440 | }; | 441 | }; |
442 | |||
443 | timer1: timer@4a318000 { | ||
444 | compatible = "ti,omap2-timer"; | ||
445 | reg = <0x4a318000 0x80>; | ||
446 | interrupts = <0 37 0x4>; | ||
447 | ti,hwmods = "timer1"; | ||
448 | ti,timer-alwon; | ||
449 | }; | ||
450 | |||
451 | timer2: timer@48032000 { | ||
452 | compatible = "ti,omap2-timer"; | ||
453 | reg = <0x48032000 0x80>; | ||
454 | interrupts = <0 38 0x4>; | ||
455 | ti,hwmods = "timer2"; | ||
456 | }; | ||
457 | |||
458 | timer3: timer@48034000 { | ||
459 | compatible = "ti,omap2-timer"; | ||
460 | reg = <0x48034000 0x80>; | ||
461 | interrupts = <0 39 0x4>; | ||
462 | ti,hwmods = "timer3"; | ||
463 | }; | ||
464 | |||
465 | timer4: timer@48036000 { | ||
466 | compatible = "ti,omap2-timer"; | ||
467 | reg = <0x48036000 0x80>; | ||
468 | interrupts = <0 40 0x4>; | ||
469 | ti,hwmods = "timer4"; | ||
470 | }; | ||
471 | |||
472 | timer5: timer@40138000 { | ||
473 | compatible = "ti,omap2-timer"; | ||
474 | reg = <0x40138000 0x80>, | ||
475 | <0x49038000 0x80>; | ||
476 | interrupts = <0 41 0x4>; | ||
477 | ti,hwmods = "timer5"; | ||
478 | ti,timer-dsp; | ||
479 | }; | ||
480 | |||
481 | timer6: timer@4013a000 { | ||
482 | compatible = "ti,omap2-timer"; | ||
483 | reg = <0x4013a000 0x80>, | ||
484 | <0x4903a000 0x80>; | ||
485 | interrupts = <0 42 0x4>; | ||
486 | ti,hwmods = "timer6"; | ||
487 | ti,timer-dsp; | ||
488 | }; | ||
489 | |||
490 | timer7: timer@4013c000 { | ||
491 | compatible = "ti,omap2-timer"; | ||
492 | reg = <0x4013c000 0x80>, | ||
493 | <0x4903c000 0x80>; | ||
494 | interrupts = <0 43 0x4>; | ||
495 | ti,hwmods = "timer7"; | ||
496 | ti,timer-dsp; | ||
497 | }; | ||
498 | |||
499 | timer8: timer@4013e000 { | ||
500 | compatible = "ti,omap2-timer"; | ||
501 | reg = <0x4013e000 0x80>, | ||
502 | <0x4903e000 0x80>; | ||
503 | interrupts = <0 44 0x4>; | ||
504 | ti,hwmods = "timer8"; | ||
505 | ti,timer-pwm; | ||
506 | ti,timer-dsp; | ||
507 | }; | ||
508 | |||
509 | timer9: timer@4803e000 { | ||
510 | compatible = "ti,omap2-timer"; | ||
511 | reg = <0x4803e000 0x80>; | ||
512 | interrupts = <0 45 0x4>; | ||
513 | ti,hwmods = "timer9"; | ||
514 | ti,timer-pwm; | ||
515 | }; | ||
516 | |||
517 | timer10: timer@48086000 { | ||
518 | compatible = "ti,omap2-timer"; | ||
519 | reg = <0x48086000 0x80>; | ||
520 | interrupts = <0 46 0x4>; | ||
521 | ti,hwmods = "timer10"; | ||
522 | ti,timer-pwm; | ||
523 | }; | ||
524 | |||
525 | timer11: timer@48088000 { | ||
526 | compatible = "ti,omap2-timer"; | ||
527 | reg = <0x48088000 0x80>; | ||
528 | interrupts = <0 47 0x4>; | ||
529 | ti,hwmods = "timer11"; | ||
530 | ti,timer-pwm; | ||
531 | }; | ||
441 | }; | 532 | }; |
442 | }; | 533 | }; |
diff --git a/arch/arm/boot/dts/omap5-evm.dts b/arch/arm/boot/dts/omap5-evm.dts index c663eba73168..8722c15bbba2 100644 --- a/arch/arm/boot/dts/omap5-evm.dts +++ b/arch/arm/boot/dts/omap5-evm.dts | |||
@@ -8,6 +8,7 @@ | |||
8 | /dts-v1/; | 8 | /dts-v1/; |
9 | 9 | ||
10 | /include/ "omap5.dtsi" | 10 | /include/ "omap5.dtsi" |
11 | /include/ "samsung_k3pe0e000b.dtsi" | ||
11 | 12 | ||
12 | / { | 13 | / { |
13 | model = "TI OMAP5 EVM board"; | 14 | model = "TI OMAP5 EVM board"; |
@@ -15,7 +16,7 @@ | |||
15 | 16 | ||
16 | memory { | 17 | memory { |
17 | device_type = "memory"; | 18 | device_type = "memory"; |
18 | reg = <0x80000000 0x40000000>; /* 1 GB */ | 19 | reg = <0x80000000 0x80000000>; /* 2 GB */ |
19 | }; | 20 | }; |
20 | 21 | ||
21 | vmmcsd_fixed: fixedregulator-mmcsd { | 22 | vmmcsd_fixed: fixedregulator-mmcsd { |
@@ -140,3 +141,13 @@ | |||
140 | &mcbsp3 { | 141 | &mcbsp3 { |
141 | status = "disabled"; | 142 | status = "disabled"; |
142 | }; | 143 | }; |
144 | |||
145 | &emif1 { | ||
146 | cs1-used; | ||
147 | device-handle = <&samsung_K3PE0E000B>; | ||
148 | }; | ||
149 | |||
150 | &emif2 { | ||
151 | cs1-used; | ||
152 | device-handle = <&samsung_K3PE0E000B>; | ||
153 | }; | ||
diff --git a/arch/arm/boot/dts/omap5.dtsi b/arch/arm/boot/dts/omap5.dtsi index 42c78beb4fdc..790bb2a4b343 100644 --- a/arch/arm/boot/dts/omap5.dtsi +++ b/arch/arm/boot/dts/omap5.dtsi | |||
@@ -77,6 +77,12 @@ | |||
77 | ranges; | 77 | ranges; |
78 | ti,hwmods = "l3_main_1", "l3_main_2", "l3_main_3"; | 78 | ti,hwmods = "l3_main_1", "l3_main_2", "l3_main_3"; |
79 | 79 | ||
80 | counter32k: counter@4ae04000 { | ||
81 | compatible = "ti,omap-counter32k"; | ||
82 | reg = <0x4ae04000 0x40>; | ||
83 | ti,hwmods = "counter_32k"; | ||
84 | }; | ||
85 | |||
80 | omap5_pmx_core: pinmux@4a002840 { | 86 | omap5_pmx_core: pinmux@4a002840 { |
81 | compatible = "ti,omap4-padconf", "pinctrl-single"; | 87 | compatible = "ti,omap4-padconf", "pinctrl-single"; |
82 | reg = <0x4a002840 0x01b6>; | 88 | reg = <0x4a002840 0x01b6>; |
@@ -104,6 +110,8 @@ | |||
104 | 110 | ||
105 | gpio1: gpio@4ae10000 { | 111 | gpio1: gpio@4ae10000 { |
106 | compatible = "ti,omap4-gpio"; | 112 | compatible = "ti,omap4-gpio"; |
113 | reg = <0x4ae10000 0x200>; | ||
114 | interrupts = <0 29 0x4>; | ||
107 | ti,hwmods = "gpio1"; | 115 | ti,hwmods = "gpio1"; |
108 | gpio-controller; | 116 | gpio-controller; |
109 | #gpio-cells = <2>; | 117 | #gpio-cells = <2>; |
@@ -113,6 +121,8 @@ | |||
113 | 121 | ||
114 | gpio2: gpio@48055000 { | 122 | gpio2: gpio@48055000 { |
115 | compatible = "ti,omap4-gpio"; | 123 | compatible = "ti,omap4-gpio"; |
124 | reg = <0x48055000 0x200>; | ||
125 | interrupts = <0 30 0x4>; | ||
116 | ti,hwmods = "gpio2"; | 126 | ti,hwmods = "gpio2"; |
117 | gpio-controller; | 127 | gpio-controller; |
118 | #gpio-cells = <2>; | 128 | #gpio-cells = <2>; |
@@ -122,6 +132,8 @@ | |||
122 | 132 | ||
123 | gpio3: gpio@48057000 { | 133 | gpio3: gpio@48057000 { |
124 | compatible = "ti,omap4-gpio"; | 134 | compatible = "ti,omap4-gpio"; |
135 | reg = <0x48057000 0x200>; | ||
136 | interrupts = <0 31 0x4>; | ||
125 | ti,hwmods = "gpio3"; | 137 | ti,hwmods = "gpio3"; |
126 | gpio-controller; | 138 | gpio-controller; |
127 | #gpio-cells = <2>; | 139 | #gpio-cells = <2>; |
@@ -131,6 +143,8 @@ | |||
131 | 143 | ||
132 | gpio4: gpio@48059000 { | 144 | gpio4: gpio@48059000 { |
133 | compatible = "ti,omap4-gpio"; | 145 | compatible = "ti,omap4-gpio"; |
146 | reg = <0x48059000 0x200>; | ||
147 | interrupts = <0 32 0x4>; | ||
134 | ti,hwmods = "gpio4"; | 148 | ti,hwmods = "gpio4"; |
135 | gpio-controller; | 149 | gpio-controller; |
136 | #gpio-cells = <2>; | 150 | #gpio-cells = <2>; |
@@ -140,6 +154,8 @@ | |||
140 | 154 | ||
141 | gpio5: gpio@4805b000 { | 155 | gpio5: gpio@4805b000 { |
142 | compatible = "ti,omap4-gpio"; | 156 | compatible = "ti,omap4-gpio"; |
157 | reg = <0x4805b000 0x200>; | ||
158 | interrupts = <0 33 0x4>; | ||
143 | ti,hwmods = "gpio5"; | 159 | ti,hwmods = "gpio5"; |
144 | gpio-controller; | 160 | gpio-controller; |
145 | #gpio-cells = <2>; | 161 | #gpio-cells = <2>; |
@@ -149,6 +165,8 @@ | |||
149 | 165 | ||
150 | gpio6: gpio@4805d000 { | 166 | gpio6: gpio@4805d000 { |
151 | compatible = "ti,omap4-gpio"; | 167 | compatible = "ti,omap4-gpio"; |
168 | reg = <0x4805d000 0x200>; | ||
169 | interrupts = <0 34 0x4>; | ||
152 | ti,hwmods = "gpio6"; | 170 | ti,hwmods = "gpio6"; |
153 | gpio-controller; | 171 | gpio-controller; |
154 | #gpio-cells = <2>; | 172 | #gpio-cells = <2>; |
@@ -158,6 +176,8 @@ | |||
158 | 176 | ||
159 | gpio7: gpio@48051000 { | 177 | gpio7: gpio@48051000 { |
160 | compatible = "ti,omap4-gpio"; | 178 | compatible = "ti,omap4-gpio"; |
179 | reg = <0x48051000 0x200>; | ||
180 | interrupts = <0 35 0x4>; | ||
161 | ti,hwmods = "gpio7"; | 181 | ti,hwmods = "gpio7"; |
162 | gpio-controller; | 182 | gpio-controller; |
163 | #gpio-cells = <2>; | 183 | #gpio-cells = <2>; |
@@ -167,6 +187,8 @@ | |||
167 | 187 | ||
168 | gpio8: gpio@48053000 { | 188 | gpio8: gpio@48053000 { |
169 | compatible = "ti,omap4-gpio"; | 189 | compatible = "ti,omap4-gpio"; |
190 | reg = <0x48053000 0x200>; | ||
191 | interrupts = <0 121 0x4>; | ||
170 | ti,hwmods = "gpio8"; | 192 | ti,hwmods = "gpio8"; |
171 | gpio-controller; | 193 | gpio-controller; |
172 | #gpio-cells = <2>; | 194 | #gpio-cells = <2>; |
@@ -176,6 +198,8 @@ | |||
176 | 198 | ||
177 | i2c1: i2c@48070000 { | 199 | i2c1: i2c@48070000 { |
178 | compatible = "ti,omap4-i2c"; | 200 | compatible = "ti,omap4-i2c"; |
201 | reg = <0x48070000 0x100>; | ||
202 | interrupts = <0 56 0x4>; | ||
179 | #address-cells = <1>; | 203 | #address-cells = <1>; |
180 | #size-cells = <0>; | 204 | #size-cells = <0>; |
181 | ti,hwmods = "i2c1"; | 205 | ti,hwmods = "i2c1"; |
@@ -183,6 +207,8 @@ | |||
183 | 207 | ||
184 | i2c2: i2c@48072000 { | 208 | i2c2: i2c@48072000 { |
185 | compatible = "ti,omap4-i2c"; | 209 | compatible = "ti,omap4-i2c"; |
210 | reg = <0x48072000 0x100>; | ||
211 | interrupts = <0 57 0x4>; | ||
186 | #address-cells = <1>; | 212 | #address-cells = <1>; |
187 | #size-cells = <0>; | 213 | #size-cells = <0>; |
188 | ti,hwmods = "i2c2"; | 214 | ti,hwmods = "i2c2"; |
@@ -190,20 +216,26 @@ | |||
190 | 216 | ||
191 | i2c3: i2c@48060000 { | 217 | i2c3: i2c@48060000 { |
192 | compatible = "ti,omap4-i2c"; | 218 | compatible = "ti,omap4-i2c"; |
219 | reg = <0x48060000 0x100>; | ||
220 | interrupts = <0 61 0x4>; | ||
193 | #address-cells = <1>; | 221 | #address-cells = <1>; |
194 | #size-cells = <0>; | 222 | #size-cells = <0>; |
195 | ti,hwmods = "i2c3"; | 223 | ti,hwmods = "i2c3"; |
196 | }; | 224 | }; |
197 | 225 | ||
198 | i2c4: i2c@4807A000 { | 226 | i2c4: i2c@4807a000 { |
199 | compatible = "ti,omap4-i2c"; | 227 | compatible = "ti,omap4-i2c"; |
228 | reg = <0x4807a000 0x100>; | ||
229 | interrupts = <0 62 0x4>; | ||
200 | #address-cells = <1>; | 230 | #address-cells = <1>; |
201 | #size-cells = <0>; | 231 | #size-cells = <0>; |
202 | ti,hwmods = "i2c4"; | 232 | ti,hwmods = "i2c4"; |
203 | }; | 233 | }; |
204 | 234 | ||
205 | i2c5: i2c@4807C000 { | 235 | i2c5: i2c@4807c000 { |
206 | compatible = "ti,omap4-i2c"; | 236 | compatible = "ti,omap4-i2c"; |
237 | reg = <0x4807c000 0x100>; | ||
238 | interrupts = <0 60 0x4>; | ||
207 | #address-cells = <1>; | 239 | #address-cells = <1>; |
208 | #size-cells = <0>; | 240 | #size-cells = <0>; |
209 | ti,hwmods = "i2c5"; | 241 | ti,hwmods = "i2c5"; |
@@ -211,42 +243,56 @@ | |||
211 | 243 | ||
212 | uart1: serial@4806a000 { | 244 | uart1: serial@4806a000 { |
213 | compatible = "ti,omap4-uart"; | 245 | compatible = "ti,omap4-uart"; |
246 | reg = <0x4806a000 0x100>; | ||
247 | interrupts = <0 72 0x4>; | ||
214 | ti,hwmods = "uart1"; | 248 | ti,hwmods = "uart1"; |
215 | clock-frequency = <48000000>; | 249 | clock-frequency = <48000000>; |
216 | }; | 250 | }; |
217 | 251 | ||
218 | uart2: serial@4806c000 { | 252 | uart2: serial@4806c000 { |
219 | compatible = "ti,omap4-uart"; | 253 | compatible = "ti,omap4-uart"; |
254 | reg = <0x4806c000 0x100>; | ||
255 | interrupts = <0 73 0x4>; | ||
220 | ti,hwmods = "uart2"; | 256 | ti,hwmods = "uart2"; |
221 | clock-frequency = <48000000>; | 257 | clock-frequency = <48000000>; |
222 | }; | 258 | }; |
223 | 259 | ||
224 | uart3: serial@48020000 { | 260 | uart3: serial@48020000 { |
225 | compatible = "ti,omap4-uart"; | 261 | compatible = "ti,omap4-uart"; |
262 | reg = <0x48020000 0x100>; | ||
263 | interrupts = <0 74 0x4>; | ||
226 | ti,hwmods = "uart3"; | 264 | ti,hwmods = "uart3"; |
227 | clock-frequency = <48000000>; | 265 | clock-frequency = <48000000>; |
228 | }; | 266 | }; |
229 | 267 | ||
230 | uart4: serial@4806e000 { | 268 | uart4: serial@4806e000 { |
231 | compatible = "ti,omap4-uart"; | 269 | compatible = "ti,omap4-uart"; |
270 | reg = <0x4806e000 0x100>; | ||
271 | interrupts = <0 70 0x4>; | ||
232 | ti,hwmods = "uart4"; | 272 | ti,hwmods = "uart4"; |
233 | clock-frequency = <48000000>; | 273 | clock-frequency = <48000000>; |
234 | }; | 274 | }; |
235 | 275 | ||
236 | uart5: serial@48066000 { | 276 | uart5: serial@48066000 { |
237 | compatible = "ti,omap5-uart"; | 277 | compatible = "ti,omap4-uart"; |
278 | reg = <0x48066000 0x100>; | ||
279 | interrupts = <0 105 0x4>; | ||
238 | ti,hwmods = "uart5"; | 280 | ti,hwmods = "uart5"; |
239 | clock-frequency = <48000000>; | 281 | clock-frequency = <48000000>; |
240 | }; | 282 | }; |
241 | 283 | ||
242 | uart6: serial@48068000 { | 284 | uart6: serial@48068000 { |
243 | compatible = "ti,omap6-uart"; | 285 | compatible = "ti,omap4-uart"; |
286 | reg = <0x48068000 0x100>; | ||
287 | interrupts = <0 106 0x4>; | ||
244 | ti,hwmods = "uart6"; | 288 | ti,hwmods = "uart6"; |
245 | clock-frequency = <48000000>; | 289 | clock-frequency = <48000000>; |
246 | }; | 290 | }; |
247 | 291 | ||
248 | mmc1: mmc@4809c000 { | 292 | mmc1: mmc@4809c000 { |
249 | compatible = "ti,omap4-hsmmc"; | 293 | compatible = "ti,omap4-hsmmc"; |
294 | reg = <0x4809c000 0x400>; | ||
295 | interrupts = <0 83 0x4>; | ||
250 | ti,hwmods = "mmc1"; | 296 | ti,hwmods = "mmc1"; |
251 | ti,dual-volt; | 297 | ti,dual-volt; |
252 | ti,needs-special-reset; | 298 | ti,needs-special-reset; |
@@ -254,24 +300,32 @@ | |||
254 | 300 | ||
255 | mmc2: mmc@480b4000 { | 301 | mmc2: mmc@480b4000 { |
256 | compatible = "ti,omap4-hsmmc"; | 302 | compatible = "ti,omap4-hsmmc"; |
303 | reg = <0x480b4000 0x400>; | ||
304 | interrupts = <0 86 0x4>; | ||
257 | ti,hwmods = "mmc2"; | 305 | ti,hwmods = "mmc2"; |
258 | ti,needs-special-reset; | 306 | ti,needs-special-reset; |
259 | }; | 307 | }; |
260 | 308 | ||
261 | mmc3: mmc@480ad000 { | 309 | mmc3: mmc@480ad000 { |
262 | compatible = "ti,omap4-hsmmc"; | 310 | compatible = "ti,omap4-hsmmc"; |
311 | reg = <0x480ad000 0x400>; | ||
312 | interrupts = <0 94 0x4>; | ||
263 | ti,hwmods = "mmc3"; | 313 | ti,hwmods = "mmc3"; |
264 | ti,needs-special-reset; | 314 | ti,needs-special-reset; |
265 | }; | 315 | }; |
266 | 316 | ||
267 | mmc4: mmc@480d1000 { | 317 | mmc4: mmc@480d1000 { |
268 | compatible = "ti,omap4-hsmmc"; | 318 | compatible = "ti,omap4-hsmmc"; |
319 | reg = <0x480d1000 0x400>; | ||
320 | interrupts = <0 96 0x4>; | ||
269 | ti,hwmods = "mmc4"; | 321 | ti,hwmods = "mmc4"; |
270 | ti,needs-special-reset; | 322 | ti,needs-special-reset; |
271 | }; | 323 | }; |
272 | 324 | ||
273 | mmc5: mmc@480d5000 { | 325 | mmc5: mmc@480d5000 { |
274 | compatible = "ti,omap4-hsmmc"; | 326 | compatible = "ti,omap4-hsmmc"; |
327 | reg = <0x480d5000 0x400>; | ||
328 | interrupts = <0 59 0x4>; | ||
275 | ti,hwmods = "mmc5"; | 329 | ti,hwmods = "mmc5"; |
276 | ti,needs-special-reset; | 330 | ti,needs-special-reset; |
277 | }; | 331 | }; |
@@ -287,7 +341,6 @@ | |||
287 | <0x49032000 0x7f>; /* L3 Interconnect */ | 341 | <0x49032000 0x7f>; /* L3 Interconnect */ |
288 | reg-names = "mpu", "dma"; | 342 | reg-names = "mpu", "dma"; |
289 | interrupts = <0 112 0x4>; | 343 | interrupts = <0 112 0x4>; |
290 | interrupt-parent = <&gic>; | ||
291 | ti,hwmods = "mcpdm"; | 344 | ti,hwmods = "mcpdm"; |
292 | }; | 345 | }; |
293 | 346 | ||
@@ -297,7 +350,6 @@ | |||
297 | <0x4902e000 0x7f>; /* L3 Interconnect */ | 350 | <0x4902e000 0x7f>; /* L3 Interconnect */ |
298 | reg-names = "mpu", "dma"; | 351 | reg-names = "mpu", "dma"; |
299 | interrupts = <0 114 0x4>; | 352 | interrupts = <0 114 0x4>; |
300 | interrupt-parent = <&gic>; | ||
301 | ti,hwmods = "dmic"; | 353 | ti,hwmods = "dmic"; |
302 | }; | 354 | }; |
303 | 355 | ||
@@ -308,7 +360,6 @@ | |||
308 | reg-names = "mpu", "dma"; | 360 | reg-names = "mpu", "dma"; |
309 | interrupts = <0 17 0x4>; | 361 | interrupts = <0 17 0x4>; |
310 | interrupt-names = "common"; | 362 | interrupt-names = "common"; |
311 | interrupt-parent = <&gic>; | ||
312 | ti,buffer-size = <128>; | 363 | ti,buffer-size = <128>; |
313 | ti,hwmods = "mcbsp1"; | 364 | ti,hwmods = "mcbsp1"; |
314 | }; | 365 | }; |
@@ -320,7 +371,6 @@ | |||
320 | reg-names = "mpu", "dma"; | 371 | reg-names = "mpu", "dma"; |
321 | interrupts = <0 22 0x4>; | 372 | interrupts = <0 22 0x4>; |
322 | interrupt-names = "common"; | 373 | interrupt-names = "common"; |
323 | interrupt-parent = <&gic>; | ||
324 | ti,buffer-size = <128>; | 374 | ti,buffer-size = <128>; |
325 | ti,hwmods = "mcbsp2"; | 375 | ti,hwmods = "mcbsp2"; |
326 | }; | 376 | }; |
@@ -332,9 +382,119 @@ | |||
332 | reg-names = "mpu", "dma"; | 382 | reg-names = "mpu", "dma"; |
333 | interrupts = <0 23 0x4>; | 383 | interrupts = <0 23 0x4>; |
334 | interrupt-names = "common"; | 384 | interrupt-names = "common"; |
335 | interrupt-parent = <&gic>; | ||
336 | ti,buffer-size = <128>; | 385 | ti,buffer-size = <128>; |
337 | ti,hwmods = "mcbsp3"; | 386 | ti,hwmods = "mcbsp3"; |
338 | }; | 387 | }; |
388 | |||
389 | timer1: timer@4ae18000 { | ||
390 | compatible = "ti,omap2-timer"; | ||
391 | reg = <0x4ae18000 0x80>; | ||
392 | interrupts = <0 37 0x4>; | ||
393 | ti,hwmods = "timer1"; | ||
394 | ti,timer-alwon; | ||
395 | }; | ||
396 | |||
397 | timer2: timer@48032000 { | ||
398 | compatible = "ti,omap2-timer"; | ||
399 | reg = <0x48032000 0x80>; | ||
400 | interrupts = <0 38 0x4>; | ||
401 | ti,hwmods = "timer2"; | ||
402 | }; | ||
403 | |||
404 | timer3: timer@48034000 { | ||
405 | compatible = "ti,omap2-timer"; | ||
406 | reg = <0x48034000 0x80>; | ||
407 | interrupts = <0 39 0x4>; | ||
408 | ti,hwmods = "timer3"; | ||
409 | }; | ||
410 | |||
411 | timer4: timer@48036000 { | ||
412 | compatible = "ti,omap2-timer"; | ||
413 | reg = <0x48036000 0x80>; | ||
414 | interrupts = <0 40 0x4>; | ||
415 | ti,hwmods = "timer4"; | ||
416 | }; | ||
417 | |||
418 | timer5: timer@40138000 { | ||
419 | compatible = "ti,omap2-timer"; | ||
420 | reg = <0x40138000 0x80>, | ||
421 | <0x49038000 0x80>; | ||
422 | interrupts = <0 41 0x4>; | ||
423 | ti,hwmods = "timer5"; | ||
424 | ti,timer-dsp; | ||
425 | }; | ||
426 | |||
427 | timer6: timer@4013a000 { | ||
428 | compatible = "ti,omap2-timer"; | ||
429 | reg = <0x4013a000 0x80>, | ||
430 | <0x4903a000 0x80>; | ||
431 | interrupts = <0 42 0x4>; | ||
432 | ti,hwmods = "timer6"; | ||
433 | ti,timer-dsp; | ||
434 | ti,timer-pwm; | ||
435 | }; | ||
436 | |||
437 | timer7: timer@4013c000 { | ||
438 | compatible = "ti,omap2-timer"; | ||
439 | reg = <0x4013c000 0x80>, | ||
440 | <0x4903c000 0x80>; | ||
441 | interrupts = <0 43 0x4>; | ||
442 | ti,hwmods = "timer7"; | ||
443 | ti,timer-dsp; | ||
444 | }; | ||
445 | |||
446 | timer8: timer@4013e000 { | ||
447 | compatible = "ti,omap2-timer"; | ||
448 | reg = <0x4013e000 0x80>, | ||
449 | <0x4903e000 0x80>; | ||
450 | interrupts = <0 44 0x4>; | ||
451 | ti,hwmods = "timer8"; | ||
452 | ti,timer-dsp; | ||
453 | ti,timer-pwm; | ||
454 | }; | ||
455 | |||
456 | timer9: timer@4803e000 { | ||
457 | compatible = "ti,omap2-timer"; | ||
458 | reg = <0x4803e000 0x80>; | ||
459 | interrupts = <0 45 0x4>; | ||
460 | ti,hwmods = "timer9"; | ||
461 | }; | ||
462 | |||
463 | timer10: timer@48086000 { | ||
464 | compatible = "ti,omap2-timer"; | ||
465 | reg = <0x48086000 0x80>; | ||
466 | interrupts = <0 46 0x4>; | ||
467 | ti,hwmods = "timer10"; | ||
468 | }; | ||
469 | |||
470 | timer11: timer@48088000 { | ||
471 | compatible = "ti,omap2-timer"; | ||
472 | reg = <0x48088000 0x80>; | ||
473 | interrupts = <0 47 0x4>; | ||
474 | ti,hwmods = "timer11"; | ||
475 | ti,timer-pwm; | ||
476 | }; | ||
477 | |||
478 | emif1: emif@0x4c000000 { | ||
479 | compatible = "ti,emif-4d5"; | ||
480 | ti,hwmods = "emif1"; | ||
481 | phy-type = <2>; /* DDR PHY type: Intelli PHY */ | ||
482 | reg = <0x4c000000 0x400>; | ||
483 | interrupts = <0 110 0x4>; | ||
484 | hw-caps-read-idle-ctrl; | ||
485 | hw-caps-ll-interface; | ||
486 | hw-caps-temp-alert; | ||
487 | }; | ||
488 | |||
489 | emif2: emif@0x4d000000 { | ||
490 | compatible = "ti,emif-4d5"; | ||
491 | ti,hwmods = "emif2"; | ||
492 | phy-type = <2>; /* DDR PHY type: Intelli PHY */ | ||
493 | reg = <0x4d000000 0x400>; | ||
494 | interrupts = <0 111 0x4>; | ||
495 | hw-caps-read-idle-ctrl; | ||
496 | hw-caps-ll-interface; | ||
497 | hw-caps-temp-alert; | ||
498 | }; | ||
339 | }; | 499 | }; |
340 | }; | 500 | }; |
diff --git a/arch/arm/boot/dts/samsung_k3pe0e000b.dtsi b/arch/arm/boot/dts/samsung_k3pe0e000b.dtsi new file mode 100644 index 000000000000..9657a5cbc3ad --- /dev/null +++ b/arch/arm/boot/dts/samsung_k3pe0e000b.dtsi | |||
@@ -0,0 +1,67 @@ | |||
1 | /* | ||
2 | * Timings and Geometry for Samsung K3PE0E000B memory part | ||
3 | */ | ||
4 | |||
5 | / { | ||
6 | samsung_K3PE0E000B: lpddr2 { | ||
7 | compatible = "Samsung,K3PE0E000B","jedec,lpddr2-s4"; | ||
8 | density = <4096>; | ||
9 | io-width = <32>; | ||
10 | |||
11 | tRPab-min-tck = <3>; | ||
12 | tRCD-min-tck = <3>; | ||
13 | tWR-min-tck = <3>; | ||
14 | tRASmin-min-tck = <3>; | ||
15 | tRRD-min-tck = <2>; | ||
16 | tWTR-min-tck = <2>; | ||
17 | tXP-min-tck = <2>; | ||
18 | tRTP-min-tck = <2>; | ||
19 | tCKE-min-tck = <3>; | ||
20 | tCKESR-min-tck = <3>; | ||
21 | tFAW-min-tck = <8>; | ||
22 | |||
23 | timings_samsung_K3PE0E000B_533MHz: lpddr2-timings@0 { | ||
24 | compatible = "jedec,lpddr2-timings"; | ||
25 | min-freq = <10000000>; | ||
26 | max-freq = <533333333>; | ||
27 | tRPab = <21000>; | ||
28 | tRCD = <18000>; | ||
29 | tWR = <15000>; | ||
30 | tRAS-min = <42000>; | ||
31 | tRRD = <10000>; | ||
32 | tWTR = <7500>; | ||
33 | tXP = <7500>; | ||
34 | tRTP = <7500>; | ||
35 | tCKESR = <15000>; | ||
36 | tDQSCK-max = <5500>; | ||
37 | tFAW = <50000>; | ||
38 | tZQCS = <90000>; | ||
39 | tZQCL = <360000>; | ||
40 | tZQinit = <1000000>; | ||
41 | tRAS-max-ns = <70000>; | ||
42 | tDQSCK-max-derated = <6000>; | ||
43 | }; | ||
44 | |||
45 | timings_samsung_K3PE0E000B_266MHz: lpddr2-timings@1 { | ||
46 | compatible = "jedec,lpddr2-timings"; | ||
47 | min-freq = <10000000>; | ||
48 | max-freq = <266666666>; | ||
49 | tRPab = <21000>; | ||
50 | tRCD = <18000>; | ||
51 | tWR = <15000>; | ||
52 | tRAS-min = <42000>; | ||
53 | tRRD = <10000>; | ||
54 | tWTR = <7500>; | ||
55 | tXP = <7500>; | ||
56 | tRTP = <7500>; | ||
57 | tCKESR = <15000>; | ||
58 | tDQSCK-max = <5500>; | ||
59 | tFAW = <50000>; | ||
60 | tZQCS = <90000>; | ||
61 | tZQCL = <360000>; | ||
62 | tZQinit = <1000000>; | ||
63 | tRAS-max-ns = <70000>; | ||
64 | tDQSCK-max-derated = <6000>; | ||
65 | }; | ||
66 | }; | ||
67 | }; | ||
diff --git a/arch/arm/boot/dts/tegra20-harmony.dts b/arch/arm/boot/dts/tegra20-harmony.dts index c3ef1ad26b6a..74b8a47adf91 100644 --- a/arch/arm/boot/dts/tegra20-harmony.dts +++ b/arch/arm/boot/dts/tegra20-harmony.dts | |||
@@ -297,131 +297,98 @@ | |||
297 | vinldo9-supply = <&sm2_reg>; | 297 | vinldo9-supply = <&sm2_reg>; |
298 | 298 | ||
299 | regulators { | 299 | regulators { |
300 | #address-cells = <1>; | 300 | sys_reg: sys { |
301 | #size-cells = <0>; | ||
302 | |||
303 | sys_reg: regulator@0 { | ||
304 | reg = <0>; | ||
305 | regulator-compatible = "sys"; | ||
306 | regulator-name = "vdd_sys"; | 301 | regulator-name = "vdd_sys"; |
307 | regulator-always-on; | 302 | regulator-always-on; |
308 | }; | 303 | }; |
309 | 304 | ||
310 | regulator@1 { | 305 | sm0 { |
311 | reg = <1>; | ||
312 | regulator-compatible = "sm0"; | ||
313 | regulator-name = "vdd_sm0,vdd_core"; | 306 | regulator-name = "vdd_sm0,vdd_core"; |
314 | regulator-min-microvolt = <1200000>; | 307 | regulator-min-microvolt = <1200000>; |
315 | regulator-max-microvolt = <1200000>; | 308 | regulator-max-microvolt = <1200000>; |
316 | regulator-always-on; | 309 | regulator-always-on; |
317 | }; | 310 | }; |
318 | 311 | ||
319 | regulator@2 { | 312 | sm1 { |
320 | reg = <2>; | ||
321 | regulator-compatible = "sm1"; | ||
322 | regulator-name = "vdd_sm1,vdd_cpu"; | 313 | regulator-name = "vdd_sm1,vdd_cpu"; |
323 | regulator-min-microvolt = <1000000>; | 314 | regulator-min-microvolt = <1000000>; |
324 | regulator-max-microvolt = <1000000>; | 315 | regulator-max-microvolt = <1000000>; |
325 | regulator-always-on; | 316 | regulator-always-on; |
326 | }; | 317 | }; |
327 | 318 | ||
328 | sm2_reg: regulator@3 { | 319 | sm2_reg: sm2 { |
329 | reg = <3>; | ||
330 | regulator-compatible = "sm2"; | ||
331 | regulator-name = "vdd_sm2,vin_ldo*"; | 320 | regulator-name = "vdd_sm2,vin_ldo*"; |
332 | regulator-min-microvolt = <3700000>; | 321 | regulator-min-microvolt = <3700000>; |
333 | regulator-max-microvolt = <3700000>; | 322 | regulator-max-microvolt = <3700000>; |
334 | regulator-always-on; | 323 | regulator-always-on; |
335 | }; | 324 | }; |
336 | 325 | ||
337 | regulator@4 { | 326 | ldo0 { |
338 | reg = <4>; | ||
339 | regulator-compatible = "ldo0"; | ||
340 | regulator-name = "vdd_ldo0,vddio_pex_clk"; | 327 | regulator-name = "vdd_ldo0,vddio_pex_clk"; |
341 | regulator-min-microvolt = <3300000>; | 328 | regulator-min-microvolt = <3300000>; |
342 | regulator-max-microvolt = <3300000>; | 329 | regulator-max-microvolt = <3300000>; |
343 | }; | 330 | }; |
344 | 331 | ||
345 | regulator@5 { | 332 | ldo1 { |
346 | reg = <5>; | ||
347 | regulator-compatible = "ldo1"; | ||
348 | regulator-name = "vdd_ldo1,avdd_pll*"; | 333 | regulator-name = "vdd_ldo1,avdd_pll*"; |
349 | regulator-min-microvolt = <1100000>; | 334 | regulator-min-microvolt = <1100000>; |
350 | regulator-max-microvolt = <1100000>; | 335 | regulator-max-microvolt = <1100000>; |
351 | regulator-always-on; | 336 | regulator-always-on; |
352 | }; | 337 | }; |
353 | 338 | ||
354 | regulator@6 { | 339 | ldo2 { |
355 | reg = <6>; | ||
356 | regulator-compatible = "ldo2"; | ||
357 | regulator-name = "vdd_ldo2,vdd_rtc"; | 340 | regulator-name = "vdd_ldo2,vdd_rtc"; |
358 | regulator-min-microvolt = <1200000>; | 341 | regulator-min-microvolt = <1200000>; |
359 | regulator-max-microvolt = <1200000>; | 342 | regulator-max-microvolt = <1200000>; |
360 | }; | 343 | }; |
361 | 344 | ||
362 | regulator@7 { | 345 | ldo3 { |
363 | reg = <7>; | ||
364 | regulator-compatible = "ldo3"; | ||
365 | regulator-name = "vdd_ldo3,avdd_usb*"; | 346 | regulator-name = "vdd_ldo3,avdd_usb*"; |
366 | regulator-min-microvolt = <3300000>; | 347 | regulator-min-microvolt = <3300000>; |
367 | regulator-max-microvolt = <3300000>; | 348 | regulator-max-microvolt = <3300000>; |
368 | regulator-always-on; | 349 | regulator-always-on; |
369 | }; | 350 | }; |
370 | 351 | ||
371 | regulator@8 { | 352 | ldo4 { |
372 | reg = <8>; | ||
373 | regulator-compatible = "ldo4"; | ||
374 | regulator-name = "vdd_ldo4,avdd_osc,vddio_sys"; | 353 | regulator-name = "vdd_ldo4,avdd_osc,vddio_sys"; |
375 | regulator-min-microvolt = <1800000>; | 354 | regulator-min-microvolt = <1800000>; |
376 | regulator-max-microvolt = <1800000>; | 355 | regulator-max-microvolt = <1800000>; |
377 | regulator-always-on; | 356 | regulator-always-on; |
378 | }; | 357 | }; |
379 | 358 | ||
380 | regulator@9 { | 359 | ldo5 { |
381 | reg = <9>; | ||
382 | regulator-compatible = "ldo5"; | ||
383 | regulator-name = "vdd_ldo5,vcore_mmc"; | 360 | regulator-name = "vdd_ldo5,vcore_mmc"; |
384 | regulator-min-microvolt = <2850000>; | 361 | regulator-min-microvolt = <2850000>; |
385 | regulator-max-microvolt = <2850000>; | 362 | regulator-max-microvolt = <2850000>; |
386 | regulator-always-on; | 363 | regulator-always-on; |
387 | }; | 364 | }; |
388 | 365 | ||
389 | regulator@10 { | 366 | ldo6 { |
390 | reg = <10>; | ||
391 | regulator-compatible = "ldo6"; | ||
392 | regulator-name = "vdd_ldo6,avdd_vdac"; | 367 | regulator-name = "vdd_ldo6,avdd_vdac"; |
393 | regulator-min-microvolt = <1800000>; | 368 | regulator-min-microvolt = <1800000>; |
394 | regulator-max-microvolt = <1800000>; | 369 | regulator-max-microvolt = <1800000>; |
395 | }; | 370 | }; |
396 | 371 | ||
397 | regulator@11 { | 372 | ldo7 { |
398 | reg = <11>; | ||
399 | regulator-compatible = "ldo7"; | ||
400 | regulator-name = "vdd_ldo7,avdd_hdmi"; | 373 | regulator-name = "vdd_ldo7,avdd_hdmi"; |
401 | regulator-min-microvolt = <3300000>; | 374 | regulator-min-microvolt = <3300000>; |
402 | regulator-max-microvolt = <3300000>; | 375 | regulator-max-microvolt = <3300000>; |
403 | }; | 376 | }; |
404 | 377 | ||
405 | regulator@12 { | 378 | ldo8 { |
406 | reg = <12>; | ||
407 | regulator-compatible = "ldo8"; | ||
408 | regulator-name = "vdd_ldo8,avdd_hdmi_pll"; | 379 | regulator-name = "vdd_ldo8,avdd_hdmi_pll"; |
409 | regulator-min-microvolt = <1800000>; | 380 | regulator-min-microvolt = <1800000>; |
410 | regulator-max-microvolt = <1800000>; | 381 | regulator-max-microvolt = <1800000>; |
411 | }; | 382 | }; |
412 | 383 | ||
413 | regulator@13 { | 384 | ldo9 { |
414 | reg = <13>; | ||
415 | regulator-compatible = "ldo9"; | ||
416 | regulator-name = "vdd_ldo9,avdd_2v85,vdd_ddr_rx"; | 385 | regulator-name = "vdd_ldo9,avdd_2v85,vdd_ddr_rx"; |
417 | regulator-min-microvolt = <2850000>; | 386 | regulator-min-microvolt = <2850000>; |
418 | regulator-max-microvolt = <2850000>; | 387 | regulator-max-microvolt = <2850000>; |
419 | regulator-always-on; | 388 | regulator-always-on; |
420 | }; | 389 | }; |
421 | 390 | ||
422 | regulator@14 { | 391 | ldo_rtc { |
423 | reg = <14>; | ||
424 | regulator-compatible = "ldo_rtc"; | ||
425 | regulator-name = "vdd_rtc_out,vdd_cell"; | 392 | regulator-name = "vdd_rtc_out,vdd_cell"; |
426 | regulator-min-microvolt = <3300000>; | 393 | regulator-min-microvolt = <3300000>; |
427 | regulator-max-microvolt = <3300000>; | 394 | regulator-max-microvolt = <3300000>; |
diff --git a/arch/arm/boot/dts/tegra20-paz00.dts b/arch/arm/boot/dts/tegra20-paz00.dts index ddf287f52d49..6a93d1404c76 100644 --- a/arch/arm/boot/dts/tegra20-paz00.dts +++ b/arch/arm/boot/dts/tegra20-paz00.dts | |||
@@ -291,37 +291,26 @@ | |||
291 | vinldo9-supply = <&sm2_reg>; | 291 | vinldo9-supply = <&sm2_reg>; |
292 | 292 | ||
293 | regulators { | 293 | regulators { |
294 | #address-cells = <1>; | 294 | sys_reg: sys { |
295 | #size-cells = <0>; | ||
296 | |||
297 | sys_reg: regulator@0 { | ||
298 | reg = <0>; | ||
299 | regulator-compatible = "sys"; | ||
300 | regulator-name = "vdd_sys"; | 295 | regulator-name = "vdd_sys"; |
301 | regulator-always-on; | 296 | regulator-always-on; |
302 | }; | 297 | }; |
303 | 298 | ||
304 | regulator@1 { | 299 | sm0 { |
305 | reg = <1>; | ||
306 | regulator-compatible = "sm0"; | ||
307 | regulator-name = "+1.2vs_sm0,vdd_core"; | 300 | regulator-name = "+1.2vs_sm0,vdd_core"; |
308 | regulator-min-microvolt = <1200000>; | 301 | regulator-min-microvolt = <1200000>; |
309 | regulator-max-microvolt = <1200000>; | 302 | regulator-max-microvolt = <1200000>; |
310 | regulator-always-on; | 303 | regulator-always-on; |
311 | }; | 304 | }; |
312 | 305 | ||
313 | regulator@2 { | 306 | sm1 { |
314 | reg = <2>; | ||
315 | regulator-compatible = "sm1"; | ||
316 | regulator-name = "+1.0vs_sm1,vdd_cpu"; | 307 | regulator-name = "+1.0vs_sm1,vdd_cpu"; |
317 | regulator-min-microvolt = <1000000>; | 308 | regulator-min-microvolt = <1000000>; |
318 | regulator-max-microvolt = <1000000>; | 309 | regulator-max-microvolt = <1000000>; |
319 | regulator-always-on; | 310 | regulator-always-on; |
320 | }; | 311 | }; |
321 | 312 | ||
322 | sm2_reg: regulator@3 { | 313 | sm2_reg: sm2 { |
323 | reg = <3>; | ||
324 | regulator-compatible = "sm2"; | ||
325 | regulator-name = "+3.7vs_sm2,vin_ldo*"; | 314 | regulator-name = "+3.7vs_sm2,vin_ldo*"; |
326 | regulator-min-microvolt = <3700000>; | 315 | regulator-min-microvolt = <3700000>; |
327 | regulator-max-microvolt = <3700000>; | 316 | regulator-max-microvolt = <3700000>; |
@@ -330,53 +319,41 @@ | |||
330 | 319 | ||
331 | /* LDO0 is not connected to anything */ | 320 | /* LDO0 is not connected to anything */ |
332 | 321 | ||
333 | regulator@5 { | 322 | ldo1 { |
334 | reg = <5>; | ||
335 | regulator-compatible = "ldo1"; | ||
336 | regulator-name = "+1.1vs_ldo1,avdd_pll*"; | 323 | regulator-name = "+1.1vs_ldo1,avdd_pll*"; |
337 | regulator-min-microvolt = <1100000>; | 324 | regulator-min-microvolt = <1100000>; |
338 | regulator-max-microvolt = <1100000>; | 325 | regulator-max-microvolt = <1100000>; |
339 | regulator-always-on; | 326 | regulator-always-on; |
340 | }; | 327 | }; |
341 | 328 | ||
342 | regulator@6 { | 329 | ldo2 { |
343 | reg = <6>; | ||
344 | regulator-compatible = "ldo2"; | ||
345 | regulator-name = "+1.2vs_ldo2,vdd_rtc"; | 330 | regulator-name = "+1.2vs_ldo2,vdd_rtc"; |
346 | regulator-min-microvolt = <1200000>; | 331 | regulator-min-microvolt = <1200000>; |
347 | regulator-max-microvolt = <1200000>; | 332 | regulator-max-microvolt = <1200000>; |
348 | }; | 333 | }; |
349 | 334 | ||
350 | regulator@7 { | 335 | ldo3 { |
351 | reg = <7>; | ||
352 | regulator-compatible = "ldo3"; | ||
353 | regulator-name = "+3.3vs_ldo3,avdd_usb*"; | 336 | regulator-name = "+3.3vs_ldo3,avdd_usb*"; |
354 | regulator-min-microvolt = <3300000>; | 337 | regulator-min-microvolt = <3300000>; |
355 | regulator-max-microvolt = <3300000>; | 338 | regulator-max-microvolt = <3300000>; |
356 | regulator-always-on; | 339 | regulator-always-on; |
357 | }; | 340 | }; |
358 | 341 | ||
359 | regulator@8 { | 342 | ldo4 { |
360 | reg = <8>; | ||
361 | regulator-compatible = "ldo4"; | ||
362 | regulator-name = "+1.8vs_ldo4,avdd_osc,vddio_sys"; | 343 | regulator-name = "+1.8vs_ldo4,avdd_osc,vddio_sys"; |
363 | regulator-min-microvolt = <1800000>; | 344 | regulator-min-microvolt = <1800000>; |
364 | regulator-max-microvolt = <1800000>; | 345 | regulator-max-microvolt = <1800000>; |
365 | regulator-always-on; | 346 | regulator-always-on; |
366 | }; | 347 | }; |
367 | 348 | ||
368 | regulator@9 { | 349 | ldo5 { |
369 | reg = <9>; | ||
370 | regulator-compatible = "ldo5"; | ||
371 | regulator-name = "+2.85vs_ldo5,vcore_mmc"; | 350 | regulator-name = "+2.85vs_ldo5,vcore_mmc"; |
372 | regulator-min-microvolt = <2850000>; | 351 | regulator-min-microvolt = <2850000>; |
373 | regulator-max-microvolt = <2850000>; | 352 | regulator-max-microvolt = <2850000>; |
374 | regulator-always-on; | 353 | regulator-always-on; |
375 | }; | 354 | }; |
376 | 355 | ||
377 | regulator@10 { | 356 | ldo6 { |
378 | reg = <10>; | ||
379 | regulator-compatible = "ldo6"; | ||
380 | /* | 357 | /* |
381 | * Research indicates this should be | 358 | * Research indicates this should be |
382 | * 1.8v; other boards that use this | 359 | * 1.8v; other boards that use this |
@@ -390,34 +367,26 @@ | |||
390 | regulator-max-microvolt = <1800000>; | 367 | regulator-max-microvolt = <1800000>; |
391 | }; | 368 | }; |
392 | 369 | ||
393 | regulator@11 { | 370 | ldo7 { |
394 | reg = <11>; | ||
395 | regulator-compatible = "ldo7"; | ||
396 | regulator-name = "+3.3vs_ldo7,avdd_hdmi"; | 371 | regulator-name = "+3.3vs_ldo7,avdd_hdmi"; |
397 | regulator-min-microvolt = <3300000>; | 372 | regulator-min-microvolt = <3300000>; |
398 | regulator-max-microvolt = <3300000>; | 373 | regulator-max-microvolt = <3300000>; |
399 | }; | 374 | }; |
400 | 375 | ||
401 | regulator@12 { | 376 | ldo8 { |
402 | reg = <12>; | ||
403 | regulator-compatible = "ldo8"; | ||
404 | regulator-name = "+1.8vs_ldo8,avdd_hdmi_pll"; | 377 | regulator-name = "+1.8vs_ldo8,avdd_hdmi_pll"; |
405 | regulator-min-microvolt = <1800000>; | 378 | regulator-min-microvolt = <1800000>; |
406 | regulator-max-microvolt = <1800000>; | 379 | regulator-max-microvolt = <1800000>; |
407 | }; | 380 | }; |
408 | 381 | ||
409 | regulator@13 { | 382 | ldo9 { |
410 | reg = <13>; | ||
411 | regulator-compatible = "ldo9"; | ||
412 | regulator-name = "+2.85vs_ldo9,vdd_ddr_rx"; | 383 | regulator-name = "+2.85vs_ldo9,vdd_ddr_rx"; |
413 | regulator-min-microvolt = <2850000>; | 384 | regulator-min-microvolt = <2850000>; |
414 | regulator-max-microvolt = <2850000>; | 385 | regulator-max-microvolt = <2850000>; |
415 | regulator-always-on; | 386 | regulator-always-on; |
416 | }; | 387 | }; |
417 | 388 | ||
418 | regulator@14 { | 389 | ldo_rtc { |
419 | reg = <14>; | ||
420 | regulator-compatible = "ldo_rtc"; | ||
421 | regulator-name = "+3.3vs_rtc"; | 390 | regulator-name = "+3.3vs_rtc"; |
422 | regulator-min-microvolt = <3300000>; | 391 | regulator-min-microvolt = <3300000>; |
423 | regulator-max-microvolt = <3300000>; | 392 | regulator-max-microvolt = <3300000>; |
diff --git a/arch/arm/boot/dts/tegra20-seaboard.dts b/arch/arm/boot/dts/tegra20-seaboard.dts index a20d4ff3fb3c..e58a0e60f711 100644 --- a/arch/arm/boot/dts/tegra20-seaboard.dts +++ b/arch/arm/boot/dts/tegra20-seaboard.dts | |||
@@ -395,37 +395,26 @@ | |||
395 | vinldo9-supply = <&sm2_reg>; | 395 | vinldo9-supply = <&sm2_reg>; |
396 | 396 | ||
397 | regulators { | 397 | regulators { |
398 | #address-cells = <1>; | 398 | sys_reg: sys { |
399 | #size-cells = <0>; | ||
400 | |||
401 | sys_reg: regulator@0 { | ||
402 | reg = <0>; | ||
403 | regulator-compatible = "sys"; | ||
404 | regulator-name = "vdd_sys"; | 399 | regulator-name = "vdd_sys"; |
405 | regulator-always-on; | 400 | regulator-always-on; |
406 | }; | 401 | }; |
407 | 402 | ||
408 | regulator@1 { | 403 | sm0 { |
409 | reg = <1>; | ||
410 | regulator-compatible = "sm0"; | ||
411 | regulator-name = "vdd_sm0,vdd_core"; | 404 | regulator-name = "vdd_sm0,vdd_core"; |
412 | regulator-min-microvolt = <1300000>; | 405 | regulator-min-microvolt = <1300000>; |
413 | regulator-max-microvolt = <1300000>; | 406 | regulator-max-microvolt = <1300000>; |
414 | regulator-always-on; | 407 | regulator-always-on; |
415 | }; | 408 | }; |
416 | 409 | ||
417 | regulator@2 { | 410 | sm1 { |
418 | reg = <2>; | ||
419 | regulator-compatible = "sm1"; | ||
420 | regulator-name = "vdd_sm1,vdd_cpu"; | 411 | regulator-name = "vdd_sm1,vdd_cpu"; |
421 | regulator-min-microvolt = <1125000>; | 412 | regulator-min-microvolt = <1125000>; |
422 | regulator-max-microvolt = <1125000>; | 413 | regulator-max-microvolt = <1125000>; |
423 | regulator-always-on; | 414 | regulator-always-on; |
424 | }; | 415 | }; |
425 | 416 | ||
426 | sm2_reg: regulator@3 { | 417 | sm2_reg: sm2 { |
427 | reg = <3>; | ||
428 | regulator-compatible = "sm2"; | ||
429 | regulator-name = "vdd_sm2,vin_ldo*"; | 418 | regulator-name = "vdd_sm2,vin_ldo*"; |
430 | regulator-min-microvolt = <3700000>; | 419 | regulator-min-microvolt = <3700000>; |
431 | regulator-max-microvolt = <3700000>; | 420 | regulator-max-microvolt = <3700000>; |
@@ -434,86 +423,66 @@ | |||
434 | 423 | ||
435 | /* LDO0 is not connected to anything */ | 424 | /* LDO0 is not connected to anything */ |
436 | 425 | ||
437 | regulator@5 { | 426 | ldo1 { |
438 | reg = <5>; | ||
439 | regulator-compatible = "ldo1"; | ||
440 | regulator-name = "vdd_ldo1,avdd_pll*"; | 427 | regulator-name = "vdd_ldo1,avdd_pll*"; |
441 | regulator-min-microvolt = <1100000>; | 428 | regulator-min-microvolt = <1100000>; |
442 | regulator-max-microvolt = <1100000>; | 429 | regulator-max-microvolt = <1100000>; |
443 | regulator-always-on; | 430 | regulator-always-on; |
444 | }; | 431 | }; |
445 | 432 | ||
446 | regulator@6 { | 433 | ldo2 { |
447 | reg = <6>; | ||
448 | regulator-compatible = "ldo2"; | ||
449 | regulator-name = "vdd_ldo2,vdd_rtc"; | 434 | regulator-name = "vdd_ldo2,vdd_rtc"; |
450 | regulator-min-microvolt = <1200000>; | 435 | regulator-min-microvolt = <1200000>; |
451 | regulator-max-microvolt = <1200000>; | 436 | regulator-max-microvolt = <1200000>; |
452 | }; | 437 | }; |
453 | 438 | ||
454 | regulator@7 { | 439 | ldo3 { |
455 | reg = <7>; | ||
456 | regulator-compatible = "ldo3"; | ||
457 | regulator-name = "vdd_ldo3,avdd_usb*"; | 440 | regulator-name = "vdd_ldo3,avdd_usb*"; |
458 | regulator-min-microvolt = <3300000>; | 441 | regulator-min-microvolt = <3300000>; |
459 | regulator-max-microvolt = <3300000>; | 442 | regulator-max-microvolt = <3300000>; |
460 | regulator-always-on; | 443 | regulator-always-on; |
461 | }; | 444 | }; |
462 | 445 | ||
463 | regulator@8 { | 446 | ldo4 { |
464 | reg = <8>; | ||
465 | regulator-compatible = "ldo4"; | ||
466 | regulator-name = "vdd_ldo4,avdd_osc,vddio_sys"; | 447 | regulator-name = "vdd_ldo4,avdd_osc,vddio_sys"; |
467 | regulator-min-microvolt = <1800000>; | 448 | regulator-min-microvolt = <1800000>; |
468 | regulator-max-microvolt = <1800000>; | 449 | regulator-max-microvolt = <1800000>; |
469 | regulator-always-on; | 450 | regulator-always-on; |
470 | }; | 451 | }; |
471 | 452 | ||
472 | regulator@9 { | 453 | ldo5 { |
473 | reg = <9>; | ||
474 | regulator-compatible = "ldo5"; | ||
475 | regulator-name = "vdd_ldo5,vcore_mmc"; | 454 | regulator-name = "vdd_ldo5,vcore_mmc"; |
476 | regulator-min-microvolt = <2850000>; | 455 | regulator-min-microvolt = <2850000>; |
477 | regulator-max-microvolt = <2850000>; | 456 | regulator-max-microvolt = <2850000>; |
478 | regulator-always-on; | 457 | regulator-always-on; |
479 | }; | 458 | }; |
480 | 459 | ||
481 | regulator@10 { | 460 | ldo6 { |
482 | reg = <10>; | ||
483 | regulator-compatible = "ldo6"; | ||
484 | regulator-name = "vdd_ldo6,avdd_vdac,vddio_vi,vddio_cam"; | 461 | regulator-name = "vdd_ldo6,avdd_vdac,vddio_vi,vddio_cam"; |
485 | regulator-min-microvolt = <1800000>; | 462 | regulator-min-microvolt = <1800000>; |
486 | regulator-max-microvolt = <1800000>; | 463 | regulator-max-microvolt = <1800000>; |
487 | }; | 464 | }; |
488 | 465 | ||
489 | regulator@11 { | 466 | ldo7 { |
490 | reg = <11>; | ||
491 | regulator-compatible = "ldo7"; | ||
492 | regulator-name = "vdd_ldo7,avdd_hdmi,vdd_fuse"; | 467 | regulator-name = "vdd_ldo7,avdd_hdmi,vdd_fuse"; |
493 | regulator-min-microvolt = <3300000>; | 468 | regulator-min-microvolt = <3300000>; |
494 | regulator-max-microvolt = <3300000>; | 469 | regulator-max-microvolt = <3300000>; |
495 | }; | 470 | }; |
496 | 471 | ||
497 | regulator@12 { | 472 | ldo8 { |
498 | reg = <12>; | ||
499 | regulator-compatible = "ldo8"; | ||
500 | regulator-name = "vdd_ldo8,avdd_hdmi_pll"; | 473 | regulator-name = "vdd_ldo8,avdd_hdmi_pll"; |
501 | regulator-min-microvolt = <1800000>; | 474 | regulator-min-microvolt = <1800000>; |
502 | regulator-max-microvolt = <1800000>; | 475 | regulator-max-microvolt = <1800000>; |
503 | }; | 476 | }; |
504 | 477 | ||
505 | regulator@13 { | 478 | ldo9 { |
506 | reg = <13>; | ||
507 | regulator-compatible = "ldo9"; | ||
508 | regulator-name = "vdd_ldo9,avdd_2v85,vdd_ddr_rx"; | 479 | regulator-name = "vdd_ldo9,avdd_2v85,vdd_ddr_rx"; |
509 | regulator-min-microvolt = <2850000>; | 480 | regulator-min-microvolt = <2850000>; |
510 | regulator-max-microvolt = <2850000>; | 481 | regulator-max-microvolt = <2850000>; |
511 | regulator-always-on; | 482 | regulator-always-on; |
512 | }; | 483 | }; |
513 | 484 | ||
514 | regulator@14 { | 485 | ldo_rtc { |
515 | reg = <14>; | ||
516 | regulator-compatible = "ldo_rtc"; | ||
517 | regulator-name = "vdd_rtc_out,vdd_cell"; | 486 | regulator-name = "vdd_rtc_out,vdd_cell"; |
518 | regulator-min-microvolt = <3300000>; | 487 | regulator-min-microvolt = <3300000>; |
519 | regulator-max-microvolt = <3300000>; | 488 | regulator-max-microvolt = <3300000>; |
diff --git a/arch/arm/boot/dts/tegra20-tamonten.dtsi b/arch/arm/boot/dts/tegra20-tamonten.dtsi index f18cec9f6a77..5b3d8b157b33 100644 --- a/arch/arm/boot/dts/tegra20-tamonten.dtsi +++ b/arch/arm/boot/dts/tegra20-tamonten.dtsi | |||
@@ -271,97 +271,72 @@ | |||
271 | vinldo9-supply = <&sm2_reg>; | 271 | vinldo9-supply = <&sm2_reg>; |
272 | 272 | ||
273 | regulators { | 273 | regulators { |
274 | #address-cells = <1>; | 274 | sys_reg: sys { |
275 | #size-cells = <0>; | ||
276 | |||
277 | sys_reg: regulator@0 { | ||
278 | reg = <0>; | ||
279 | regulator-compatible = "sys"; | ||
280 | regulator-name = "vdd_sys"; | 275 | regulator-name = "vdd_sys"; |
281 | regulator-always-on; | 276 | regulator-always-on; |
282 | }; | 277 | }; |
283 | 278 | ||
284 | regulator@1 { | 279 | sm0 { |
285 | reg = <1>; | ||
286 | regulator-compatible = "sm0"; | ||
287 | regulator-name = "vdd_sys_sm0,vdd_core"; | 280 | regulator-name = "vdd_sys_sm0,vdd_core"; |
288 | regulator-min-microvolt = <1200000>; | 281 | regulator-min-microvolt = <1200000>; |
289 | regulator-max-microvolt = <1200000>; | 282 | regulator-max-microvolt = <1200000>; |
290 | regulator-always-on; | 283 | regulator-always-on; |
291 | }; | 284 | }; |
292 | 285 | ||
293 | regulator@2 { | 286 | sm1 { |
294 | reg = <2>; | ||
295 | regulator-compatible = "sm1"; | ||
296 | regulator-name = "vdd_sys_sm1,vdd_cpu"; | 287 | regulator-name = "vdd_sys_sm1,vdd_cpu"; |
297 | regulator-min-microvolt = <1000000>; | 288 | regulator-min-microvolt = <1000000>; |
298 | regulator-max-microvolt = <1000000>; | 289 | regulator-max-microvolt = <1000000>; |
299 | regulator-always-on; | 290 | regulator-always-on; |
300 | }; | 291 | }; |
301 | 292 | ||
302 | sm2_reg: regulator@3 { | 293 | sm2_reg: sm2 { |
303 | reg = <3>; | ||
304 | regulator-compatible = "sm2"; | ||
305 | regulator-name = "vdd_sys_sm2,vin_ldo*"; | 294 | regulator-name = "vdd_sys_sm2,vin_ldo*"; |
306 | regulator-min-microvolt = <3700000>; | 295 | regulator-min-microvolt = <3700000>; |
307 | regulator-max-microvolt = <3700000>; | 296 | regulator-max-microvolt = <3700000>; |
308 | regulator-always-on; | 297 | regulator-always-on; |
309 | }; | 298 | }; |
310 | 299 | ||
311 | regulator@4 { | 300 | ldo0 { |
312 | reg = <4>; | ||
313 | regulator-compatible = "ldo0"; | ||
314 | regulator-name = "vdd_ldo0,vddio_pex_clk"; | 301 | regulator-name = "vdd_ldo0,vddio_pex_clk"; |
315 | regulator-min-microvolt = <3300000>; | 302 | regulator-min-microvolt = <3300000>; |
316 | regulator-max-microvolt = <3300000>; | 303 | regulator-max-microvolt = <3300000>; |
317 | }; | 304 | }; |
318 | 305 | ||
319 | regulator@5 { | 306 | ldo1 { |
320 | reg = <5>; | ||
321 | regulator-compatible = "ldo1"; | ||
322 | regulator-name = "vdd_ldo1,avdd_pll*"; | 307 | regulator-name = "vdd_ldo1,avdd_pll*"; |
323 | regulator-min-microvolt = <1100000>; | 308 | regulator-min-microvolt = <1100000>; |
324 | regulator-max-microvolt = <1100000>; | 309 | regulator-max-microvolt = <1100000>; |
325 | regulator-always-on; | 310 | regulator-always-on; |
326 | }; | 311 | }; |
327 | 312 | ||
328 | regulator@6 { | 313 | ldo2 { |
329 | reg = <6>; | ||
330 | regulator-compatible = "ldo2"; | ||
331 | regulator-name = "vdd_ldo2,vdd_rtc"; | 314 | regulator-name = "vdd_ldo2,vdd_rtc"; |
332 | regulator-min-microvolt = <1200000>; | 315 | regulator-min-microvolt = <1200000>; |
333 | regulator-max-microvolt = <1200000>; | 316 | regulator-max-microvolt = <1200000>; |
334 | }; | 317 | }; |
335 | 318 | ||
336 | regulator@7 { | 319 | ldo3 { |
337 | reg = <7>; | ||
338 | regulator-compatible = "ldo3"; | ||
339 | regulator-name = "vdd_ldo3,avdd_usb*"; | 320 | regulator-name = "vdd_ldo3,avdd_usb*"; |
340 | regulator-min-microvolt = <3300000>; | 321 | regulator-min-microvolt = <3300000>; |
341 | regulator-max-microvolt = <3300000>; | 322 | regulator-max-microvolt = <3300000>; |
342 | regulator-always-on; | 323 | regulator-always-on; |
343 | }; | 324 | }; |
344 | 325 | ||
345 | regulator@8 { | 326 | ldo4 { |
346 | reg = <8>; | ||
347 | regulator-compatible = "ldo4"; | ||
348 | regulator-name = "vdd_ldo4,avdd_osc,vddio_sys"; | 327 | regulator-name = "vdd_ldo4,avdd_osc,vddio_sys"; |
349 | regulator-min-microvolt = <1800000>; | 328 | regulator-min-microvolt = <1800000>; |
350 | regulator-max-microvolt = <1800000>; | 329 | regulator-max-microvolt = <1800000>; |
351 | regulator-always-on; | 330 | regulator-always-on; |
352 | }; | 331 | }; |
353 | 332 | ||
354 | regulator@9 { | 333 | ldo5 { |
355 | reg = <9>; | ||
356 | regulator-compatible = "ldo5"; | ||
357 | regulator-name = "vdd_ldo5,vcore_mmc"; | 334 | regulator-name = "vdd_ldo5,vcore_mmc"; |
358 | regulator-min-microvolt = <2850000>; | 335 | regulator-min-microvolt = <2850000>; |
359 | regulator-max-microvolt = <2850000>; | 336 | regulator-max-microvolt = <2850000>; |
360 | }; | 337 | }; |
361 | 338 | ||
362 | regulator@10 { | 339 | ldo6 { |
363 | reg = <10>; | ||
364 | regulator-compatible = "ldo6"; | ||
365 | regulator-name = "vdd_ldo6,avdd_vdac"; | 340 | regulator-name = "vdd_ldo6,avdd_vdac"; |
366 | /* | 341 | /* |
367 | * According to the Tegra 2 Automotive | 342 | * According to the Tegra 2 Automotive |
@@ -373,25 +348,19 @@ | |||
373 | regulator-max-microvolt = <2850000>; | 348 | regulator-max-microvolt = <2850000>; |
374 | }; | 349 | }; |
375 | 350 | ||
376 | regulator@11 { | 351 | ldo7 { |
377 | reg = <11>; | ||
378 | regulator-compatible = "ldo7"; | ||
379 | regulator-name = "vdd_ldo7,avdd_hdmi"; | 352 | regulator-name = "vdd_ldo7,avdd_hdmi"; |
380 | regulator-min-microvolt = <3300000>; | 353 | regulator-min-microvolt = <3300000>; |
381 | regulator-max-microvolt = <3300000>; | 354 | regulator-max-microvolt = <3300000>; |
382 | }; | 355 | }; |
383 | 356 | ||
384 | regulator@12 { | 357 | ldo8 { |
385 | reg = <12>; | ||
386 | regulator-compatible = "ldo8"; | ||
387 | regulator-name = "vdd_ldo8,avdd_hdmi_pll"; | 358 | regulator-name = "vdd_ldo8,avdd_hdmi_pll"; |
388 | regulator-min-microvolt = <1800000>; | 359 | regulator-min-microvolt = <1800000>; |
389 | regulator-max-microvolt = <1800000>; | 360 | regulator-max-microvolt = <1800000>; |
390 | }; | 361 | }; |
391 | 362 | ||
392 | regulator@13 { | 363 | ldo9 { |
393 | reg = <13>; | ||
394 | regulator-compatible = "ldo9"; | ||
395 | regulator-name = "vdd_ldo9,vdd_ddr_rx,avdd_cam"; | 364 | regulator-name = "vdd_ldo9,vdd_ddr_rx,avdd_cam"; |
396 | /* | 365 | /* |
397 | * According to the Tegra 2 Automotive | 366 | * According to the Tegra 2 Automotive |
@@ -404,9 +373,7 @@ | |||
404 | regulator-always-on; | 373 | regulator-always-on; |
405 | }; | 374 | }; |
406 | 375 | ||
407 | regulator@14 { | 376 | ldo_rtc { |
408 | reg = <14>; | ||
409 | regulator-compatible = "ldo_rtc"; | ||
410 | regulator-name = "vdd_rtc_out"; | 377 | regulator-name = "vdd_rtc_out"; |
411 | regulator-min-microvolt = <3300000>; | 378 | regulator-min-microvolt = <3300000>; |
412 | regulator-max-microvolt = <3300000>; | 379 | regulator-max-microvolt = <3300000>; |
diff --git a/arch/arm/boot/dts/tegra20-ventana.dts b/arch/arm/boot/dts/tegra20-ventana.dts index 3e5952fcfbc5..86854f1abd58 100644 --- a/arch/arm/boot/dts/tegra20-ventana.dts +++ b/arch/arm/boot/dts/tegra20-ventana.dts | |||
@@ -311,37 +311,26 @@ | |||
311 | vinldo9-supply = <&sm2_reg>; | 311 | vinldo9-supply = <&sm2_reg>; |
312 | 312 | ||
313 | regulators { | 313 | regulators { |
314 | #address-cells = <1>; | 314 | sys_reg: sys { |
315 | #size-cells = <0>; | ||
316 | |||
317 | sys_reg: regulator@0 { | ||
318 | reg = <0>; | ||
319 | regulator-compatible = "sys"; | ||
320 | regulator-name = "vdd_sys"; | 315 | regulator-name = "vdd_sys"; |
321 | regulator-always-on; | 316 | regulator-always-on; |
322 | }; | 317 | }; |
323 | 318 | ||
324 | regulator@1 { | 319 | sm0 { |
325 | reg = <1>; | ||
326 | regulator-compatible = "sm0"; | ||
327 | regulator-name = "vdd_sm0,vdd_core"; | 320 | regulator-name = "vdd_sm0,vdd_core"; |
328 | regulator-min-microvolt = <1200000>; | 321 | regulator-min-microvolt = <1200000>; |
329 | regulator-max-microvolt = <1200000>; | 322 | regulator-max-microvolt = <1200000>; |
330 | regulator-always-on; | 323 | regulator-always-on; |
331 | }; | 324 | }; |
332 | 325 | ||
333 | regulator@2 { | 326 | sm1 { |
334 | reg = <2>; | ||
335 | regulator-compatible = "sm1"; | ||
336 | regulator-name = "vdd_sm1,vdd_cpu"; | 327 | regulator-name = "vdd_sm1,vdd_cpu"; |
337 | regulator-min-microvolt = <1000000>; | 328 | regulator-min-microvolt = <1000000>; |
338 | regulator-max-microvolt = <1000000>; | 329 | regulator-max-microvolt = <1000000>; |
339 | regulator-always-on; | 330 | regulator-always-on; |
340 | }; | 331 | }; |
341 | 332 | ||
342 | sm2_reg: regulator@3 { | 333 | sm2_reg: sm2 { |
343 | reg = <3>; | ||
344 | regulator-compatible = "sm2"; | ||
345 | regulator-name = "vdd_sm2,vin_ldo*"; | 334 | regulator-name = "vdd_sm2,vin_ldo*"; |
346 | regulator-min-microvolt = <3700000>; | 335 | regulator-min-microvolt = <3700000>; |
347 | regulator-max-microvolt = <3700000>; | 336 | regulator-max-microvolt = <3700000>; |
@@ -350,86 +339,66 @@ | |||
350 | 339 | ||
351 | /* LDO0 is not connected to anything */ | 340 | /* LDO0 is not connected to anything */ |
352 | 341 | ||
353 | regulator@5 { | 342 | ldo1 { |
354 | reg = <5>; | ||
355 | regulator-compatible = "ldo1"; | ||
356 | regulator-name = "vdd_ldo1,avdd_pll*"; | 343 | regulator-name = "vdd_ldo1,avdd_pll*"; |
357 | regulator-min-microvolt = <1100000>; | 344 | regulator-min-microvolt = <1100000>; |
358 | regulator-max-microvolt = <1100000>; | 345 | regulator-max-microvolt = <1100000>; |
359 | regulator-always-on; | 346 | regulator-always-on; |
360 | }; | 347 | }; |
361 | 348 | ||
362 | regulator@6 { | 349 | ldo2 { |
363 | reg = <6>; | ||
364 | regulator-compatible = "ldo2"; | ||
365 | regulator-name = "vdd_ldo2,vdd_rtc"; | 350 | regulator-name = "vdd_ldo2,vdd_rtc"; |
366 | regulator-min-microvolt = <1200000>; | 351 | regulator-min-microvolt = <1200000>; |
367 | regulator-max-microvolt = <1200000>; | 352 | regulator-max-microvolt = <1200000>; |
368 | }; | 353 | }; |
369 | 354 | ||
370 | regulator@7 { | 355 | ldo3 { |
371 | reg = <7>; | ||
372 | regulator-compatible = "ldo3"; | ||
373 | regulator-name = "vdd_ldo3,avdd_usb*"; | 356 | regulator-name = "vdd_ldo3,avdd_usb*"; |
374 | regulator-min-microvolt = <3300000>; | 357 | regulator-min-microvolt = <3300000>; |
375 | regulator-max-microvolt = <3300000>; | 358 | regulator-max-microvolt = <3300000>; |
376 | regulator-always-on; | 359 | regulator-always-on; |
377 | }; | 360 | }; |
378 | 361 | ||
379 | regulator@8 { | 362 | ldo4 { |
380 | reg = <8>; | ||
381 | regulator-compatible = "ldo4"; | ||
382 | regulator-name = "vdd_ldo4,avdd_osc,vddio_sys"; | 363 | regulator-name = "vdd_ldo4,avdd_osc,vddio_sys"; |
383 | regulator-min-microvolt = <1800000>; | 364 | regulator-min-microvolt = <1800000>; |
384 | regulator-max-microvolt = <1800000>; | 365 | regulator-max-microvolt = <1800000>; |
385 | regulator-always-on; | 366 | regulator-always-on; |
386 | }; | 367 | }; |
387 | 368 | ||
388 | regulator@9 { | 369 | ldo5 { |
389 | reg = <9>; | ||
390 | regulator-compatible = "ldo5"; | ||
391 | regulator-name = "vdd_ldo5,vcore_mmc"; | 370 | regulator-name = "vdd_ldo5,vcore_mmc"; |
392 | regulator-min-microvolt = <2850000>; | 371 | regulator-min-microvolt = <2850000>; |
393 | regulator-max-microvolt = <2850000>; | 372 | regulator-max-microvolt = <2850000>; |
394 | regulator-always-on; | 373 | regulator-always-on; |
395 | }; | 374 | }; |
396 | 375 | ||
397 | regulator@10 { | 376 | ldo6 { |
398 | reg = <10>; | ||
399 | regulator-compatible = "ldo6"; | ||
400 | regulator-name = "vdd_ldo6,avdd_vdac"; | 377 | regulator-name = "vdd_ldo6,avdd_vdac"; |
401 | regulator-min-microvolt = <1800000>; | 378 | regulator-min-microvolt = <1800000>; |
402 | regulator-max-microvolt = <1800000>; | 379 | regulator-max-microvolt = <1800000>; |
403 | }; | 380 | }; |
404 | 381 | ||
405 | regulator@11 { | 382 | ldo7 { |
406 | reg = <11>; | ||
407 | regulator-compatible = "ldo7"; | ||
408 | regulator-name = "vdd_ldo7,avdd_hdmi,vdd_fuse"; | 383 | regulator-name = "vdd_ldo7,avdd_hdmi,vdd_fuse"; |
409 | regulator-min-microvolt = <3300000>; | 384 | regulator-min-microvolt = <3300000>; |
410 | regulator-max-microvolt = <3300000>; | 385 | regulator-max-microvolt = <3300000>; |
411 | }; | 386 | }; |
412 | 387 | ||
413 | regulator@12 { | 388 | ldo8 { |
414 | reg = <12>; | ||
415 | regulator-compatible = "ldo8"; | ||
416 | regulator-name = "vdd_ldo8,avdd_hdmi_pll"; | 389 | regulator-name = "vdd_ldo8,avdd_hdmi_pll"; |
417 | regulator-min-microvolt = <1800000>; | 390 | regulator-min-microvolt = <1800000>; |
418 | regulator-max-microvolt = <1800000>; | 391 | regulator-max-microvolt = <1800000>; |
419 | }; | 392 | }; |
420 | 393 | ||
421 | regulator@13 { | 394 | ldo9 { |
422 | reg = <13>; | ||
423 | regulator-compatible = "ldo9"; | ||
424 | regulator-name = "vdd_ldo9,avdd_2v85,vdd_ddr_rx"; | 395 | regulator-name = "vdd_ldo9,avdd_2v85,vdd_ddr_rx"; |
425 | regulator-min-microvolt = <2850000>; | 396 | regulator-min-microvolt = <2850000>; |
426 | regulator-max-microvolt = <2850000>; | 397 | regulator-max-microvolt = <2850000>; |
427 | regulator-always-on; | 398 | regulator-always-on; |
428 | }; | 399 | }; |
429 | 400 | ||
430 | regulator@14 { | 401 | ldo_rtc { |
431 | reg = <14>; | ||
432 | regulator-compatible = "ldo_rtc"; | ||
433 | regulator-name = "vdd_rtc_out,vdd_cell"; | 402 | regulator-name = "vdd_rtc_out,vdd_cell"; |
434 | regulator-min-microvolt = <3300000>; | 403 | regulator-min-microvolt = <3300000>; |
435 | regulator-max-microvolt = <3300000>; | 404 | regulator-max-microvolt = <3300000>; |
diff --git a/arch/arm/boot/dts/tegra20-whistler.dts b/arch/arm/boot/dts/tegra20-whistler.dts index c636d002d6d8..94a71c91beb5 100644 --- a/arch/arm/boot/dts/tegra20-whistler.dts +++ b/arch/arm/boot/dts/tegra20-whistler.dts | |||
@@ -295,243 +295,182 @@ | |||
295 | in20-supply = <&mbatt_reg>; | 295 | in20-supply = <&mbatt_reg>; |
296 | 296 | ||
297 | regulators { | 297 | regulators { |
298 | #address-cells = <1>; | 298 | mbatt_reg: mbatt { |
299 | #size-cells = <0>; | ||
300 | |||
301 | mbatt_reg: regulator@0 { | ||
302 | reg = <0>; | ||
303 | regulator-compatible = "mbatt"; | ||
304 | regulator-name = "vbat_pmu"; | 299 | regulator-name = "vbat_pmu"; |
305 | regulator-always-on; | 300 | regulator-always-on; |
306 | }; | 301 | }; |
307 | 302 | ||
308 | regulator@1 { | 303 | sd1 { |
309 | reg = <1>; | ||
310 | regulator-compatible = "sd1"; | ||
311 | regulator-name = "nvvdd_sv1,vdd_cpu_pmu"; | 304 | regulator-name = "nvvdd_sv1,vdd_cpu_pmu"; |
312 | regulator-min-microvolt = <1000000>; | 305 | regulator-min-microvolt = <1000000>; |
313 | regulator-max-microvolt = <1000000>; | 306 | regulator-max-microvolt = <1000000>; |
314 | regulator-always-on; | 307 | regulator-always-on; |
315 | }; | 308 | }; |
316 | 309 | ||
317 | regulator@2 { | 310 | sd2 { |
318 | reg = <2>; | ||
319 | regulator-compatible = "sd2"; | ||
320 | regulator-name = "nvvdd_sv2,vdd_core"; | 311 | regulator-name = "nvvdd_sv2,vdd_core"; |
321 | regulator-min-microvolt = <1200000>; | 312 | regulator-min-microvolt = <1200000>; |
322 | regulator-max-microvolt = <1200000>; | 313 | regulator-max-microvolt = <1200000>; |
323 | regulator-always-on; | 314 | regulator-always-on; |
324 | }; | 315 | }; |
325 | 316 | ||
326 | nvvdd_sv3_reg: regulator@3 { | 317 | nvvdd_sv3_reg: sd3 { |
327 | reg = <3>; | ||
328 | regulator-compatible = "sd3"; | ||
329 | regulator-name = "nvvdd_sv3"; | 318 | regulator-name = "nvvdd_sv3"; |
330 | regulator-min-microvolt = <1800000>; | 319 | regulator-min-microvolt = <1800000>; |
331 | regulator-max-microvolt = <1800000>; | 320 | regulator-max-microvolt = <1800000>; |
332 | regulator-always-on; | 321 | regulator-always-on; |
333 | }; | 322 | }; |
334 | 323 | ||
335 | regulator@4 { | 324 | ldo1 { |
336 | reg = <4>; | ||
337 | regulator-compatible = "ldo1"; | ||
338 | regulator-name = "nvvdd_ldo1,vddio_rx_ddr,vcore_acc"; | 325 | regulator-name = "nvvdd_ldo1,vddio_rx_ddr,vcore_acc"; |
339 | regulator-min-microvolt = <3300000>; | 326 | regulator-min-microvolt = <3300000>; |
340 | regulator-max-microvolt = <3300000>; | 327 | regulator-max-microvolt = <3300000>; |
341 | regulator-always-on; | 328 | regulator-always-on; |
342 | }; | 329 | }; |
343 | 330 | ||
344 | regulator@5 { | 331 | ldo2 { |
345 | reg = <5>; | ||
346 | regulator-compatible = "ldo2"; | ||
347 | regulator-name = "nvvdd_ldo2,avdd_pll*"; | 332 | regulator-name = "nvvdd_ldo2,avdd_pll*"; |
348 | regulator-min-microvolt = <1100000>; | 333 | regulator-min-microvolt = <1100000>; |
349 | regulator-max-microvolt = <1100000>; | 334 | regulator-max-microvolt = <1100000>; |
350 | regulator-always-on; | 335 | regulator-always-on; |
351 | }; | 336 | }; |
352 | 337 | ||
353 | regulator@6 { | 338 | ldo3 { |
354 | reg = <6>; | ||
355 | regulator-compatible = "ldo3"; | ||
356 | regulator-name = "nvvdd_ldo3,vcom_1v8b"; | 339 | regulator-name = "nvvdd_ldo3,vcom_1v8b"; |
357 | regulator-min-microvolt = <1800000>; | 340 | regulator-min-microvolt = <1800000>; |
358 | regulator-max-microvolt = <1800000>; | 341 | regulator-max-microvolt = <1800000>; |
359 | regulator-always-on; | 342 | regulator-always-on; |
360 | }; | 343 | }; |
361 | 344 | ||
362 | regulator@7 { | 345 | ldo4 { |
363 | reg = <7>; | ||
364 | regulator-compatible = "ldo4"; | ||
365 | regulator-name = "nvvdd_ldo4,avdd_usb*"; | 346 | regulator-name = "nvvdd_ldo4,avdd_usb*"; |
366 | regulator-min-microvolt = <3300000>; | 347 | regulator-min-microvolt = <3300000>; |
367 | regulator-max-microvolt = <3300000>; | 348 | regulator-max-microvolt = <3300000>; |
368 | regulator-always-on; | 349 | regulator-always-on; |
369 | }; | 350 | }; |
370 | 351 | ||
371 | regulator@8 { | 352 | ldo5 { |
372 | reg = <8>; | ||
373 | regulator-compatible = "ldo5"; | ||
374 | regulator-name = "nvvdd_ldo5,vcore_mmc,avdd_lcd1,vddio_1wire"; | 353 | regulator-name = "nvvdd_ldo5,vcore_mmc,avdd_lcd1,vddio_1wire"; |
375 | regulator-min-microvolt = <2800000>; | 354 | regulator-min-microvolt = <2800000>; |
376 | regulator-max-microvolt = <2800000>; | 355 | regulator-max-microvolt = <2800000>; |
377 | regulator-always-on; | 356 | regulator-always-on; |
378 | }; | 357 | }; |
379 | 358 | ||
380 | regulator@9 { | 359 | ldo6 { |
381 | reg = <9>; | ||
382 | regulator-compatible = "ldo6"; | ||
383 | regulator-name = "nvvdd_ldo6,avdd_hdmi_pll"; | 360 | regulator-name = "nvvdd_ldo6,avdd_hdmi_pll"; |
384 | regulator-min-microvolt = <1800000>; | 361 | regulator-min-microvolt = <1800000>; |
385 | regulator-max-microvolt = <1800000>; | 362 | regulator-max-microvolt = <1800000>; |
386 | }; | 363 | }; |
387 | 364 | ||
388 | regulator@10 { | 365 | ldo7 { |
389 | reg = <10>; | ||
390 | regulator-compatible = "ldo7"; | ||
391 | regulator-name = "nvvdd_ldo7,avddio_audio"; | 366 | regulator-name = "nvvdd_ldo7,avddio_audio"; |
392 | regulator-min-microvolt = <2800000>; | 367 | regulator-min-microvolt = <2800000>; |
393 | regulator-max-microvolt = <2800000>; | 368 | regulator-max-microvolt = <2800000>; |
394 | regulator-always-on; | 369 | regulator-always-on; |
395 | }; | 370 | }; |
396 | 371 | ||
397 | regulator@11 { | 372 | ldo8 { |
398 | reg = <11>; | ||
399 | regulator-compatible = "ldo8"; | ||
400 | regulator-name = "nvvdd_ldo8,vcom_3v0,vcore_cmps"; | 373 | regulator-name = "nvvdd_ldo8,vcom_3v0,vcore_cmps"; |
401 | regulator-min-microvolt = <3000000>; | 374 | regulator-min-microvolt = <3000000>; |
402 | regulator-max-microvolt = <3000000>; | 375 | regulator-max-microvolt = <3000000>; |
403 | }; | 376 | }; |
404 | 377 | ||
405 | regulator@12 { | 378 | ldo9 { |
406 | reg = <12>; | ||
407 | regulator-compatible = "ldo9"; | ||
408 | regulator-name = "nvvdd_ldo9,avdd_cam*"; | 379 | regulator-name = "nvvdd_ldo9,avdd_cam*"; |
409 | regulator-min-microvolt = <2800000>; | 380 | regulator-min-microvolt = <2800000>; |
410 | regulator-max-microvolt = <2800000>; | 381 | regulator-max-microvolt = <2800000>; |
411 | }; | 382 | }; |
412 | 383 | ||
413 | regulator@13 { | 384 | ldo10 { |
414 | reg = <13>; | ||
415 | regulator-compatible = "ldo10"; | ||
416 | regulator-name = "nvvdd_ldo10,avdd_usb_ic_3v0"; | 385 | regulator-name = "nvvdd_ldo10,avdd_usb_ic_3v0"; |
417 | regulator-min-microvolt = <3000000>; | 386 | regulator-min-microvolt = <3000000>; |
418 | regulator-max-microvolt = <3000000>; | 387 | regulator-max-microvolt = <3000000>; |
419 | regulator-always-on; | 388 | regulator-always-on; |
420 | }; | 389 | }; |
421 | 390 | ||
422 | regulator@14 { | 391 | ldo11 { |
423 | reg = <14>; | ||
424 | regulator-compatible = "ldo11"; | ||
425 | regulator-name = "nvvdd_ldo11,vddio_pex_clk,vcom_33,avdd_hdmi"; | 392 | regulator-name = "nvvdd_ldo11,vddio_pex_clk,vcom_33,avdd_hdmi"; |
426 | regulator-min-microvolt = <3300000>; | 393 | regulator-min-microvolt = <3300000>; |
427 | regulator-max-microvolt = <3300000>; | 394 | regulator-max-microvolt = <3300000>; |
428 | }; | 395 | }; |
429 | 396 | ||
430 | regulator@15 { | 397 | ldo12 { |
431 | reg = <15>; | ||
432 | regulator-compatible = "ldo12"; | ||
433 | regulator-name = "nvvdd_ldo12,vddio_sdio"; | 398 | regulator-name = "nvvdd_ldo12,vddio_sdio"; |
434 | regulator-min-microvolt = <2800000>; | 399 | regulator-min-microvolt = <2800000>; |
435 | regulator-max-microvolt = <2800000>; | 400 | regulator-max-microvolt = <2800000>; |
436 | regulator-always-on; | 401 | regulator-always-on; |
437 | }; | 402 | }; |
438 | 403 | ||
439 | regulator@16 { | 404 | ldo13 { |
440 | reg = <16>; | ||
441 | regulator-compatible = "ldo13"; | ||
442 | regulator-name = "nvvdd_ldo13,vcore_phtn,vdd_af"; | 405 | regulator-name = "nvvdd_ldo13,vcore_phtn,vdd_af"; |
443 | regulator-min-microvolt = <2800000>; | 406 | regulator-min-microvolt = <2800000>; |
444 | regulator-max-microvolt = <2800000>; | 407 | regulator-max-microvolt = <2800000>; |
445 | }; | 408 | }; |
446 | 409 | ||
447 | regulator@17 { | 410 | ldo14 { |
448 | reg = <17>; | ||
449 | regulator-compatible = "ldo14"; | ||
450 | regulator-name = "nvvdd_ldo14,avdd_vdac"; | 411 | regulator-name = "nvvdd_ldo14,avdd_vdac"; |
451 | regulator-min-microvolt = <2800000>; | 412 | regulator-min-microvolt = <2800000>; |
452 | regulator-max-microvolt = <2800000>; | 413 | regulator-max-microvolt = <2800000>; |
453 | }; | 414 | }; |
454 | 415 | ||
455 | regulator@18 { | 416 | ldo15 { |
456 | reg = <18>; | ||
457 | regulator-compatible = "ldo15"; | ||
458 | regulator-name = "nvvdd_ldo15,vcore_temp,vddio_hdcp"; | 417 | regulator-name = "nvvdd_ldo15,vcore_temp,vddio_hdcp"; |
459 | regulator-min-microvolt = <3300000>; | 418 | regulator-min-microvolt = <3300000>; |
460 | regulator-max-microvolt = <3300000>; | 419 | regulator-max-microvolt = <3300000>; |
461 | }; | 420 | }; |
462 | 421 | ||
463 | regulator@19 { | 422 | ldo16 { |
464 | reg = <19>; | ||
465 | regulator-compatible = "ldo16"; | ||
466 | regulator-name = "nvvdd_ldo16,vdd_dbrtr"; | 423 | regulator-name = "nvvdd_ldo16,vdd_dbrtr"; |
467 | regulator-min-microvolt = <1300000>; | 424 | regulator-min-microvolt = <1300000>; |
468 | regulator-max-microvolt = <1300000>; | 425 | regulator-max-microvolt = <1300000>; |
469 | }; | 426 | }; |
470 | 427 | ||
471 | regulator@20 { | 428 | ldo17 { |
472 | reg = <20>; | ||
473 | regulator-compatible = "ldo17"; | ||
474 | regulator-name = "nvvdd_ldo17,vddio_mipi"; | 429 | regulator-name = "nvvdd_ldo17,vddio_mipi"; |
475 | regulator-min-microvolt = <1200000>; | 430 | regulator-min-microvolt = <1200000>; |
476 | regulator-max-microvolt = <1200000>; | 431 | regulator-max-microvolt = <1200000>; |
477 | }; | 432 | }; |
478 | 433 | ||
479 | regulator@21 { | 434 | ldo18 { |
480 | reg = <21>; | ||
481 | regulator-compatible = "ldo18"; | ||
482 | regulator-name = "nvvdd_ldo18,vddio_vi,vcore_cam*"; | 435 | regulator-name = "nvvdd_ldo18,vddio_vi,vcore_cam*"; |
483 | regulator-min-microvolt = <1800000>; | 436 | regulator-min-microvolt = <1800000>; |
484 | regulator-max-microvolt = <1800000>; | 437 | regulator-max-microvolt = <1800000>; |
485 | }; | 438 | }; |
486 | 439 | ||
487 | regulator@22 { | 440 | ldo19 { |
488 | reg = <22>; | ||
489 | regulator-compatible = "ldo19"; | ||
490 | regulator-name = "nvvdd_ldo19,avdd_lcd2,vddio_lx"; | 441 | regulator-name = "nvvdd_ldo19,avdd_lcd2,vddio_lx"; |
491 | regulator-min-microvolt = <2800000>; | 442 | regulator-min-microvolt = <2800000>; |
492 | regulator-max-microvolt = <2800000>; | 443 | regulator-max-microvolt = <2800000>; |
493 | }; | 444 | }; |
494 | 445 | ||
495 | regulator@23 { | 446 | ldo20 { |
496 | reg = <23>; | ||
497 | regulator-compatible = "ldo20"; | ||
498 | regulator-name = "nvvdd_ldo20,vddio_ddr_1v2,vddio_hsic,vcom_1v2"; | 447 | regulator-name = "nvvdd_ldo20,vddio_ddr_1v2,vddio_hsic,vcom_1v2"; |
499 | regulator-min-microvolt = <1200000>; | 448 | regulator-min-microvolt = <1200000>; |
500 | regulator-max-microvolt = <1200000>; | 449 | regulator-max-microvolt = <1200000>; |
501 | regulator-always-on; | 450 | regulator-always-on; |
502 | }; | 451 | }; |
503 | 452 | ||
504 | regulator@24 { | 453 | out5v { |
505 | reg = <24>; | ||
506 | regulator-compatible = "out5v"; | ||
507 | regulator-name = "usb0_vbus_reg"; | 454 | regulator-name = "usb0_vbus_reg"; |
508 | }; | 455 | }; |
509 | 456 | ||
510 | regulator@25 { | 457 | out33v { |
511 | reg = <25>; | ||
512 | regulator-compatible = "out33v"; | ||
513 | regulator-name = "pmu_out3v3"; | 458 | regulator-name = "pmu_out3v3"; |
514 | }; | 459 | }; |
515 | 460 | ||
516 | regulator@26 { | 461 | bbat { |
517 | reg = <26>; | ||
518 | regulator-compatible = "bbat"; | ||
519 | regulator-name = "pmu_bbat"; | 462 | regulator-name = "pmu_bbat"; |
520 | regulator-min-microvolt = <2400000>; | 463 | regulator-min-microvolt = <2400000>; |
521 | regulator-max-microvolt = <2400000>; | 464 | regulator-max-microvolt = <2400000>; |
522 | regulator-always-on; | 465 | regulator-always-on; |
523 | }; | 466 | }; |
524 | 467 | ||
525 | regulator@27 { | 468 | sdby { |
526 | reg = <27>; | ||
527 | regulator-compatible = "sdby"; | ||
528 | regulator-name = "vdd_aon"; | 469 | regulator-name = "vdd_aon"; |
529 | regulator-always-on; | 470 | regulator-always-on; |
530 | }; | 471 | }; |
531 | 472 | ||
532 | regulator@28 { | 473 | vrtc { |
533 | reg = <28>; | ||
534 | regulator-compatible = "vrtc"; | ||
535 | regulator-name = "vrtc,pmu_vccadc"; | 474 | regulator-name = "vrtc,pmu_vccadc"; |
536 | regulator-always-on; | 475 | regulator-always-on; |
537 | }; | 476 | }; |
diff --git a/arch/arm/boot/dts/tegra30-cardhu.dtsi b/arch/arm/boot/dts/tegra30-cardhu.dtsi index d10c9c5a3606..b1271a894327 100644 --- a/arch/arm/boot/dts/tegra30-cardhu.dtsi +++ b/arch/arm/boot/dts/tegra30-cardhu.dtsi | |||
@@ -171,56 +171,41 @@ | |||
171 | vccio-supply = <&vdd_ac_bat_reg>; | 171 | vccio-supply = <&vdd_ac_bat_reg>; |
172 | 172 | ||
173 | regulators { | 173 | regulators { |
174 | #address-cells = <1>; | 174 | vdd1_reg: vdd1 { |
175 | #size-cells = <0>; | ||
176 | |||
177 | vdd1_reg: regulator@0 { | ||
178 | reg = <0>; | ||
179 | regulator-compatible = "vdd1"; | ||
180 | regulator-name = "vddio_ddr_1v2"; | 175 | regulator-name = "vddio_ddr_1v2"; |
181 | regulator-min-microvolt = <1200000>; | 176 | regulator-min-microvolt = <1200000>; |
182 | regulator-max-microvolt = <1200000>; | 177 | regulator-max-microvolt = <1200000>; |
183 | regulator-always-on; | 178 | regulator-always-on; |
184 | }; | 179 | }; |
185 | 180 | ||
186 | vdd2_reg: regulator@1 { | 181 | vdd2_reg: vdd2 { |
187 | reg = <1>; | ||
188 | regulator-compatible = "vdd2"; | ||
189 | regulator-name = "vdd_1v5_gen"; | 182 | regulator-name = "vdd_1v5_gen"; |
190 | regulator-min-microvolt = <1500000>; | 183 | regulator-min-microvolt = <1500000>; |
191 | regulator-max-microvolt = <1500000>; | 184 | regulator-max-microvolt = <1500000>; |
192 | regulator-always-on; | 185 | regulator-always-on; |
193 | }; | 186 | }; |
194 | 187 | ||
195 | vddctrl_reg: regulator@2 { | 188 | vddctrl_reg: vddctrl { |
196 | reg = <2>; | ||
197 | regulator-compatible = "vddctrl"; | ||
198 | regulator-name = "vdd_cpu,vdd_sys"; | 189 | regulator-name = "vdd_cpu,vdd_sys"; |
199 | regulator-min-microvolt = <1000000>; | 190 | regulator-min-microvolt = <1000000>; |
200 | regulator-max-microvolt = <1000000>; | 191 | regulator-max-microvolt = <1000000>; |
201 | regulator-always-on; | 192 | regulator-always-on; |
202 | }; | 193 | }; |
203 | 194 | ||
204 | vio_reg: regulator@3 { | 195 | vio_reg: vio { |
205 | reg = <3>; | ||
206 | regulator-compatible = "vio"; | ||
207 | regulator-name = "vdd_1v8_gen"; | 196 | regulator-name = "vdd_1v8_gen"; |
208 | regulator-min-microvolt = <1800000>; | 197 | regulator-min-microvolt = <1800000>; |
209 | regulator-max-microvolt = <1800000>; | 198 | regulator-max-microvolt = <1800000>; |
210 | regulator-always-on; | 199 | regulator-always-on; |
211 | }; | 200 | }; |
212 | 201 | ||
213 | ldo1_reg: regulator@4 { | 202 | ldo1_reg: ldo1 { |
214 | reg = <4>; | ||
215 | regulator-compatible = "ldo1"; | ||
216 | regulator-name = "vdd_pexa,vdd_pexb"; | 203 | regulator-name = "vdd_pexa,vdd_pexb"; |
217 | regulator-min-microvolt = <1050000>; | 204 | regulator-min-microvolt = <1050000>; |
218 | regulator-max-microvolt = <1050000>; | 205 | regulator-max-microvolt = <1050000>; |
219 | }; | 206 | }; |
220 | 207 | ||
221 | ldo2_reg: regulator@5 { | 208 | ldo2_reg: ldo2 { |
222 | reg = <5>; | ||
223 | regulator-compatible = "ldo2"; | ||
224 | regulator-name = "vdd_sata,avdd_plle"; | 209 | regulator-name = "vdd_sata,avdd_plle"; |
225 | regulator-min-microvolt = <1050000>; | 210 | regulator-min-microvolt = <1050000>; |
226 | regulator-max-microvolt = <1050000>; | 211 | regulator-max-microvolt = <1050000>; |
@@ -228,44 +213,34 @@ | |||
228 | 213 | ||
229 | /* LDO3 is not connected to anything */ | 214 | /* LDO3 is not connected to anything */ |
230 | 215 | ||
231 | ldo4_reg: regulator@7 { | 216 | ldo4_reg: ldo4 { |
232 | reg = <7>; | ||
233 | regulator-compatible = "ldo4"; | ||
234 | regulator-name = "vdd_rtc"; | 217 | regulator-name = "vdd_rtc"; |
235 | regulator-min-microvolt = <1200000>; | 218 | regulator-min-microvolt = <1200000>; |
236 | regulator-max-microvolt = <1200000>; | 219 | regulator-max-microvolt = <1200000>; |
237 | regulator-always-on; | 220 | regulator-always-on; |
238 | }; | 221 | }; |
239 | 222 | ||
240 | ldo5_reg: regulator@8 { | 223 | ldo5_reg: ldo5 { |
241 | reg = <8>; | ||
242 | regulator-compatible = "ldo5"; | ||
243 | regulator-name = "vddio_sdmmc,avdd_vdac"; | 224 | regulator-name = "vddio_sdmmc,avdd_vdac"; |
244 | regulator-min-microvolt = <3300000>; | 225 | regulator-min-microvolt = <3300000>; |
245 | regulator-max-microvolt = <3300000>; | 226 | regulator-max-microvolt = <3300000>; |
246 | regulator-always-on; | 227 | regulator-always-on; |
247 | }; | 228 | }; |
248 | 229 | ||
249 | ldo6_reg: regulator@9 { | 230 | ldo6_reg: ldo6 { |
250 | reg = <9>; | ||
251 | regulator-compatible = "ldo6"; | ||
252 | regulator-name = "avdd_dsi_csi,pwrdet_mipi"; | 231 | regulator-name = "avdd_dsi_csi,pwrdet_mipi"; |
253 | regulator-min-microvolt = <1200000>; | 232 | regulator-min-microvolt = <1200000>; |
254 | regulator-max-microvolt = <1200000>; | 233 | regulator-max-microvolt = <1200000>; |
255 | }; | 234 | }; |
256 | 235 | ||
257 | ldo7_reg: regulator@10 { | 236 | ldo7_reg: ldo7 { |
258 | reg = <10>; | ||
259 | regulator-compatible = "ldo7"; | ||
260 | regulator-name = "vdd_pllm,x,u,a_p_c_s"; | 237 | regulator-name = "vdd_pllm,x,u,a_p_c_s"; |
261 | regulator-min-microvolt = <1200000>; | 238 | regulator-min-microvolt = <1200000>; |
262 | regulator-max-microvolt = <1200000>; | 239 | regulator-max-microvolt = <1200000>; |
263 | regulator-always-on; | 240 | regulator-always-on; |
264 | }; | 241 | }; |
265 | 242 | ||
266 | ldo8_reg: regulator@11 { | 243 | ldo8_reg: ldo8 { |
267 | reg = <11>; | ||
268 | regulator-compatible = "ldo8"; | ||
269 | regulator-name = "vdd_ddr_hs"; | 244 | regulator-name = "vdd_ddr_hs"; |
270 | regulator-min-microvolt = <1000000>; | 245 | regulator-min-microvolt = <1000000>; |
271 | regulator-max-microvolt = <1000000>; | 246 | regulator-max-microvolt = <1000000>; |
diff --git a/arch/arm/boot/dts/twl4030.dtsi b/arch/arm/boot/dts/twl4030.dtsi index ff000172c93c..63411b036932 100644 --- a/arch/arm/boot/dts/twl4030.dtsi +++ b/arch/arm/boot/dts/twl4030.dtsi | |||
@@ -37,6 +37,24 @@ | |||
37 | regulator-max-microvolt = <3150000>; | 37 | regulator-max-microvolt = <3150000>; |
38 | }; | 38 | }; |
39 | 39 | ||
40 | vusb1v5: regulator-vusb1v5 { | ||
41 | compatible = "ti,twl4030-vusb1v5"; | ||
42 | }; | ||
43 | |||
44 | vusb1v8: regulator-vusb1v8 { | ||
45 | compatible = "ti,twl4030-vusb1v8"; | ||
46 | }; | ||
47 | |||
48 | vusb3v1: regulator-vusb3v1 { | ||
49 | compatible = "ti,twl4030-vusb3v1"; | ||
50 | }; | ||
51 | |||
52 | vsim: regulator-vsim { | ||
53 | compatible = "ti,twl4030-vsim"; | ||
54 | regulator-min-microvolt = <1800000>; | ||
55 | regulator-max-microvolt = <3000000>; | ||
56 | }; | ||
57 | |||
40 | twl_gpio: gpio { | 58 | twl_gpio: gpio { |
41 | compatible = "ti,twl4030-gpio"; | 59 | compatible = "ti,twl4030-gpio"; |
42 | gpio-controller; | 60 | gpio-controller; |
@@ -44,4 +62,13 @@ | |||
44 | interrupt-controller; | 62 | interrupt-controller; |
45 | #interrupt-cells = <1>; | 63 | #interrupt-cells = <1>; |
46 | }; | 64 | }; |
65 | |||
66 | twl4030-usb { | ||
67 | compatible = "ti,twl4030-usb"; | ||
68 | interrupts = <10>, <4>; | ||
69 | usb1v5-supply = <&vusb1v5>; | ||
70 | usb1v8-supply = <&vusb1v8>; | ||
71 | usb3v1-supply = <&vusb3v1>; | ||
72 | usb_mode = <1>; | ||
73 | }; | ||
47 | }; | 74 | }; |
diff --git a/arch/arm/boot/dts/twl6030.dtsi b/arch/arm/boot/dts/twl6030.dtsi index 123e2c40218a..9996cfc5ee80 100644 --- a/arch/arm/boot/dts/twl6030.dtsi +++ b/arch/arm/boot/dts/twl6030.dtsi | |||
@@ -86,4 +86,9 @@ | |||
86 | clk32kg: regulator-clk32kg { | 86 | clk32kg: regulator-clk32kg { |
87 | compatible = "ti,twl6030-clk32kg"; | 87 | compatible = "ti,twl6030-clk32kg"; |
88 | }; | 88 | }; |
89 | |||
90 | twl_usb_comparator: usb-comparator { | ||
91 | compatible = "ti,twl6030-usb"; | ||
92 | interrupts = <4>, <10>; | ||
93 | }; | ||
89 | }; | 94 | }; |
diff --git a/arch/arm/boot/dts/zynq-ep107.dts b/arch/arm/boot/dts/zynq-ep107.dts index 37ca192fb193..574bc044f572 100644 --- a/arch/arm/boot/dts/zynq-ep107.dts +++ b/arch/arm/boot/dts/zynq-ep107.dts | |||
@@ -36,16 +36,27 @@ | |||
36 | ranges; | 36 | ranges; |
37 | 37 | ||
38 | intc: interrupt-controller@f8f01000 { | 38 | intc: interrupt-controller@f8f01000 { |
39 | compatible = "arm,cortex-a9-gic"; | ||
40 | #interrupt-cells = <3>; | ||
41 | #address-cells = <1>; | ||
39 | interrupt-controller; | 42 | interrupt-controller; |
40 | compatible = "arm,gic"; | 43 | reg = <0xF8F01000 0x1000>, |
41 | reg = <0xF8F01000 0x1000>; | 44 | <0xF8F00100 0x100>; |
42 | #interrupt-cells = <2>; | 45 | }; |
46 | |||
47 | L2: cache-controller { | ||
48 | compatible = "arm,pl310-cache"; | ||
49 | reg = <0xF8F02000 0x1000>; | ||
50 | arm,data-latency = <2 3 2>; | ||
51 | arm,tag-latency = <2 3 2>; | ||
52 | cache-unified; | ||
53 | cache-level = <2>; | ||
43 | }; | 54 | }; |
44 | 55 | ||
45 | uart0: uart@e0000000 { | 56 | uart0: uart@e0000000 { |
46 | compatible = "xlnx,xuartps"; | 57 | compatible = "xlnx,xuartps"; |
47 | reg = <0xE0000000 0x1000>; | 58 | reg = <0xE0000000 0x1000>; |
48 | interrupts = <59 0>; | 59 | interrupts = <0 27 4>; |
49 | clock = <50000000>; | 60 | clock = <50000000>; |
50 | }; | 61 | }; |
51 | }; | 62 | }; |