diff options
author | Linus Torvalds <torvalds@linux-foundation.org> | 2012-01-09 17:39:59 -0500 |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2012-01-09 17:39:59 -0500 |
commit | b3c37522928b5452588fc202eaa0f11f6e339256 (patch) | |
tree | 37bfe21d9977b15271903d1a4b304289a232e364 /arch/arm/boot | |
parent | 2ac9d7aaccbd598b5bd19ac40761b723bb675442 (diff) | |
parent | 6d0a5636fba5a3f82ec80ab124dd4748344549c3 (diff) |
Merge tag 'pm' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
power management changes for omap and imx
A significant part of the changes for these two platforms went into
power management, so they are split out into a separate branch.
* tag 'pm' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (65 commits)
ARM: imx6: remove __CPUINIT annotation from v7_invalidate_l1
ARM: imx6: fix v7_invalidate_l1 by adding I-Cache invalidation
ARM: imx6q: resume PL310 only when CACHE_L2X0 defined
ARM: imx6q: build pm code only when CONFIG_PM selected
ARM: mx5: use generic irq chip pm interface for pm functions on
ARM: omap: pass minimal SoC/board data for UART from dt
arm/dts: Add minimal device tree support for omap2420 and omap2430
omap-serial: Add minimal device tree support
omap-serial: Use default clock speed (48Mhz) if not specified
omap-serial: Get rid of all pdev->id usage
ARM: OMAP2+: hwmod: Add a new flag to handle hwmods left enabled at init
ARM: OMAP4: PRM: use PRCM interrupt handler
ARM: OMAP3: pm: use prcm chain handler
ARM: OMAP: hwmod: add support for selecting mpu_irq for each wakeup pad
ARM: OMAP2+: mux: add support for PAD wakeup interrupts
ARM: OMAP: PRCM: add suspend prepare / finish support
ARM: OMAP: PRCM: add support for chain interrupt handler
ARM: OMAP3/4: PRM: add functions to read pending IRQs, PRM barrier
ARM: OMAP2+: hwmod: Add API to enable IO ring wakeup
ARM: OMAP2+: mux: add wakeup-capable hwmod mux entries to dynamic list
...
Diffstat (limited to 'arch/arm/boot')
-rw-r--r-- | arch/arm/boot/dts/omap2.dtsi | 67 | ||||
-rw-r--r-- | arch/arm/boot/dts/omap3.dtsi | 31 | ||||
-rw-r--r-- | arch/arm/boot/dts/omap4.dtsi | 28 |
3 files changed, 126 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/omap2.dtsi b/arch/arm/boot/dts/omap2.dtsi new file mode 100644 index 000000000000..f2ab4ea7cc0e --- /dev/null +++ b/arch/arm/boot/dts/omap2.dtsi | |||
@@ -0,0 +1,67 @@ | |||
1 | /* | ||
2 | * Device Tree Source for OMAP2 SoC | ||
3 | * | ||
4 | * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/ | ||
5 | * | ||
6 | * This file is licensed under the terms of the GNU General Public License | ||
7 | * version 2. This program is licensed "as is" without any warranty of any | ||
8 | * kind, whether express or implied. | ||
9 | */ | ||
10 | |||
11 | /include/ "skeleton.dtsi" | ||
12 | |||
13 | / { | ||
14 | compatible = "ti,omap2430", "ti,omap2420", "ti,omap2"; | ||
15 | |||
16 | aliases { | ||
17 | serial0 = &uart1; | ||
18 | serial1 = &uart2; | ||
19 | serial2 = &uart3; | ||
20 | }; | ||
21 | |||
22 | cpus { | ||
23 | cpu@0 { | ||
24 | compatible = "arm,arm1136jf-s"; | ||
25 | }; | ||
26 | }; | ||
27 | |||
28 | soc { | ||
29 | compatible = "ti,omap-infra"; | ||
30 | mpu { | ||
31 | compatible = "ti,omap2-mpu"; | ||
32 | ti,hwmods = "mpu"; | ||
33 | }; | ||
34 | }; | ||
35 | |||
36 | ocp { | ||
37 | compatible = "simple-bus"; | ||
38 | #address-cells = <1>; | ||
39 | #size-cells = <1>; | ||
40 | ranges; | ||
41 | ti,hwmods = "l3_main"; | ||
42 | |||
43 | intc: interrupt-controller@1 { | ||
44 | compatible = "ti,omap2-intc"; | ||
45 | interrupt-controller; | ||
46 | #interrupt-cells = <1>; | ||
47 | }; | ||
48 | |||
49 | uart1: serial@4806a000 { | ||
50 | compatible = "ti,omap2-uart"; | ||
51 | ti,hwmods = "uart1"; | ||
52 | clock-frequency = <48000000>; | ||
53 | }; | ||
54 | |||
55 | uart2: serial@4806c000 { | ||
56 | compatible = "ti,omap2-uart"; | ||
57 | ti,hwmods = "uart2"; | ||
58 | clock-frequency = <48000000>; | ||
59 | }; | ||
60 | |||
61 | uart3: serial@4806e000 { | ||
62 | compatible = "ti,omap2-uart"; | ||
63 | ti,hwmods = "uart3"; | ||
64 | clock-frequency = <48000000>; | ||
65 | }; | ||
66 | }; | ||
67 | }; | ||
diff --git a/arch/arm/boot/dts/omap3.dtsi b/arch/arm/boot/dts/omap3.dtsi index d202bb5ec7ef..216c3317461d 100644 --- a/arch/arm/boot/dts/omap3.dtsi +++ b/arch/arm/boot/dts/omap3.dtsi | |||
@@ -13,6 +13,13 @@ | |||
13 | / { | 13 | / { |
14 | compatible = "ti,omap3430", "ti,omap3"; | 14 | compatible = "ti,omap3430", "ti,omap3"; |
15 | 15 | ||
16 | aliases { | ||
17 | serial0 = &uart1; | ||
18 | serial1 = &uart2; | ||
19 | serial2 = &uart3; | ||
20 | serial3 = &uart4; | ||
21 | }; | ||
22 | |||
16 | cpus { | 23 | cpus { |
17 | cpu@0 { | 24 | cpu@0 { |
18 | compatible = "arm,cortex-a8"; | 25 | compatible = "arm,cortex-a8"; |
@@ -59,5 +66,29 @@ | |||
59 | interrupt-controller; | 66 | interrupt-controller; |
60 | #interrupt-cells = <1>; | 67 | #interrupt-cells = <1>; |
61 | }; | 68 | }; |
69 | |||
70 | uart1: serial@0x4806a000 { | ||
71 | compatible = "ti,omap3-uart"; | ||
72 | ti,hwmods = "uart1"; | ||
73 | clock-frequency = <48000000>; | ||
74 | }; | ||
75 | |||
76 | uart2: serial@0x4806c000 { | ||
77 | compatible = "ti,omap3-uart"; | ||
78 | ti,hwmods = "uart2"; | ||
79 | clock-frequency = <48000000>; | ||
80 | }; | ||
81 | |||
82 | uart3: serial@0x49020000 { | ||
83 | compatible = "ti,omap3-uart"; | ||
84 | ti,hwmods = "uart3"; | ||
85 | clock-frequency = <48000000>; | ||
86 | }; | ||
87 | |||
88 | uart4: serial@0x49042000 { | ||
89 | compatible = "ti,omap3-uart"; | ||
90 | ti,hwmods = "uart4"; | ||
91 | clock-frequency = <48000000>; | ||
92 | }; | ||
62 | }; | 93 | }; |
63 | }; | 94 | }; |
diff --git a/arch/arm/boot/dts/omap4.dtsi b/arch/arm/boot/dts/omap4.dtsi index 4c61c829043a..e8fe75fac7c5 100644 --- a/arch/arm/boot/dts/omap4.dtsi +++ b/arch/arm/boot/dts/omap4.dtsi | |||
@@ -21,6 +21,10 @@ | |||
21 | interrupt-parent = <&gic>; | 21 | interrupt-parent = <&gic>; |
22 | 22 | ||
23 | aliases { | 23 | aliases { |
24 | serial0 = &uart1; | ||
25 | serial1 = &uart2; | ||
26 | serial2 = &uart3; | ||
27 | serial3 = &uart4; | ||
24 | }; | 28 | }; |
25 | 29 | ||
26 | cpus { | 30 | cpus { |
@@ -99,5 +103,29 @@ | |||
99 | reg = <0x48241000 0x1000>, | 103 | reg = <0x48241000 0x1000>, |
100 | <0x48240100 0x0100>; | 104 | <0x48240100 0x0100>; |
101 | }; | 105 | }; |
106 | |||
107 | uart1: serial@0x4806a000 { | ||
108 | compatible = "ti,omap4-uart"; | ||
109 | ti,hwmods = "uart1"; | ||
110 | clock-frequency = <48000000>; | ||
111 | }; | ||
112 | |||
113 | uart2: serial@0x4806c000 { | ||
114 | compatible = "ti,omap4-uart"; | ||
115 | ti,hwmods = "uart2"; | ||
116 | clock-frequency = <48000000>; | ||
117 | }; | ||
118 | |||
119 | uart3: serial@0x48020000 { | ||
120 | compatible = "ti,omap4-uart"; | ||
121 | ti,hwmods = "uart3"; | ||
122 | clock-frequency = <48000000>; | ||
123 | }; | ||
124 | |||
125 | uart4: serial@0x4806e000 { | ||
126 | compatible = "ti,omap4-uart"; | ||
127 | ti,hwmods = "uart4"; | ||
128 | clock-frequency = <48000000>; | ||
129 | }; | ||
102 | }; | 130 | }; |
103 | }; | 131 | }; |