aboutsummaryrefslogtreecommitdiffstats
path: root/arch/arm/boot
diff options
context:
space:
mode:
authorMateusz Krawczuk <m.krawczuk@partner.samsung.com>2013-09-28 12:25:29 -0400
committerKukjin Kim <kgene.kim@samsung.com>2014-07-18 15:31:20 -0400
commit94ad0f6d9278a4137d863391131a7c7826630297 (patch)
tree3b147745e6df4af5bee382b0371751e4c3501951 /arch/arm/boot
parentadbd1ad139789ec8a5f8c7ab397d6636d6a3d277 (diff)
ARM: dts: Add Device tree for s5pv210 SoC
Add generic device tree for s5pv210 and s5pv210-pinctrl Signed-off-by: Mateusz Krawczuk <m.krawczuk@partner.samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Tomasz Figa <t.figa@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Diffstat (limited to 'arch/arm/boot')
-rw-r--r--arch/arm/boot/dts/s5pv210-pinctrl.dtsi839
-rw-r--r--arch/arm/boot/dts/s5pv210.dtsi633
2 files changed, 1472 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/s5pv210-pinctrl.dtsi b/arch/arm/boot/dts/s5pv210-pinctrl.dtsi
new file mode 100644
index 000000000000..8c714088e3c6
--- /dev/null
+++ b/arch/arm/boot/dts/s5pv210-pinctrl.dtsi
@@ -0,0 +1,839 @@
1/*
2 * Samsung's S5PV210 SoC device tree source
3 *
4 * Copyright (c) 2013-2014 Samsung Electronics, Co. Ltd.
5 *
6 * Mateusz Krawczuk <m.krawczuk@partner.samsung.com>
7 * Tomasz Figa <t.figa@samsung.com>
8 *
9 * Samsung's S5PV210 SoC device nodes are listed in this file. S5PV210
10 * based board files can include this file and provide values for board specfic
11 * bindings.
12 *
13 * Note: This file does not include device nodes for all the controllers in
14 * S5PV210 SoC. As device tree coverage for S5PV210 increases, additional
15 * nodes can be added to this file.
16 *
17 * This program is free software; you can redistribute it and/or modify
18 * it under the terms of the GNU General Public License version 2 as
19 * published by the Free Software Foundation.
20 */
21
22&pinctrl0 {
23 gpa0: gpa0 {
24 gpio-controller;
25 #gpio-cells = <2>;
26
27 interrupt-controller;
28 #interrupt-cells = <2>;
29 };
30
31 gpa1: gpa1 {
32 gpio-controller;
33 #gpio-cells = <2>;
34
35 interrupt-controller;
36 #interrupt-cells = <2>;
37 };
38
39 gpb: gpb {
40 gpio-controller;
41 #gpio-cells = <2>;
42
43 interrupt-controller;
44 #interrupt-cells = <2>;
45 };
46
47 gpc0: gpc0 {
48 gpio-controller;
49 #gpio-cells = <2>;
50
51 interrupt-controller;
52 #interrupt-cells = <2>;
53 };
54
55 gpc1: gpc1 {
56 gpio-controller;
57 #gpio-cells = <2>;
58
59 interrupt-controller;
60 #interrupt-cells = <2>;
61 };
62
63 gpd0: gpd0 {
64 gpio-controller;
65 #gpio-cells = <2>;
66
67 interrupt-controller;
68 #interrupt-cells = <2>;
69 };
70
71 gpd1: gpd1 {
72 gpio-controller;
73 #gpio-cells = <2>;
74
75 interrupt-controller;
76 #interrupt-cells = <2>;
77 };
78
79 gpe0: gpe0 {
80 gpio-controller;
81 #gpio-cells = <2>;
82
83 interrupt-controller;
84 #interrupt-cells = <2>;
85 };
86
87 gpe1: gpe1 {
88 gpio-controller;
89 #gpio-cells = <2>;
90
91 interrupt-controller;
92 #interrupt-cells = <2>;
93 };
94
95 gpf0: gpf0 {
96 gpio-controller;
97 #gpio-cells = <2>;
98
99 interrupt-controller;
100 #interrupt-cells = <2>;
101 };
102
103 gpf1: gpf1 {
104 gpio-controller;
105 #gpio-cells = <2>;
106
107 interrupt-controller;
108 #interrupt-cells = <2>;
109 };
110
111 gpf2: gpf2 {
112 gpio-controller;
113 #gpio-cells = <2>;
114
115 interrupt-controller;
116 #interrupt-cells = <2>;
117 };
118
119 gpf3: gpf3 {
120 gpio-controller;
121 #gpio-cells = <2>;
122
123 interrupt-controller;
124 #interrupt-cells = <2>;
125 };
126
127 gpg0: gpg0 {
128 gpio-controller;
129 #gpio-cells = <2>;
130
131 interrupt-controller;
132 #interrupt-cells = <2>;
133 };
134
135 gpg1: gpg1 {
136 gpio-controller;
137 #gpio-cells = <2>;
138
139 interrupt-controller;
140 #interrupt-cells = <2>;
141 };
142
143 gpg2: gpg2 {
144 gpio-controller;
145 #gpio-cells = <2>;
146
147 interrupt-controller;
148 #interrupt-cells = <2>;
149 };
150
151 gpg3: gpg3 {
152 gpio-controller;
153 #gpio-cells = <2>;
154
155 interrupt-controller;
156 #interrupt-cells = <2>;
157 };
158
159 gpj0: gpj0 {
160 gpio-controller;
161 #gpio-cells = <2>;
162
163 interrupt-controller;
164 #interrupt-cells = <2>;
165 };
166
167 gpj1: gpj1 {
168 gpio-controller;
169 #gpio-cells = <2>;
170
171 interrupt-controller;
172 #interrupt-cells = <2>;
173 };
174
175 gpj2: gpj2 {
176 gpio-controller;
177 #gpio-cells = <2>;
178
179 interrupt-controller;
180 #interrupt-cells = <2>;
181 };
182
183 gpj3: gpj3 {
184 gpio-controller;
185 #gpio-cells = <2>;
186
187 interrupt-controller;
188 #interrupt-cells = <2>;
189 };
190
191 gpj4: gpj4 {
192 gpio-controller;
193 #gpio-cells = <2>;
194
195 interrupt-controller;
196 #interrupt-cells = <2>;
197 };
198
199 gpgi: gpgi {
200 gpio-controller;
201 #gpio-cells = <2>;
202 };
203
204 mp01: mp01 {
205 gpio-controller;
206 #gpio-cells = <2>;
207 };
208
209 mp02: mp02 {
210 gpio-controller;
211 #gpio-cells = <2>;
212 };
213
214 mp03: mp03 {
215 gpio-controller;
216 #gpio-cells = <2>;
217 };
218
219 mp04: mp04 {
220 gpio-controller;
221 #gpio-cells = <2>;
222 };
223
224 mp05: mp05 {
225 gpio-controller;
226 #gpio-cells = <2>;
227 };
228
229 mp06: mp06 {
230 gpio-controller;
231 #gpio-cells = <2>;
232 };
233
234 mp07: mp07 {
235 gpio-controller;
236 #gpio-cells = <2>;
237 };
238
239 gph0: gph0 {
240 gpio-controller;
241 interrupt-controller;
242 interrupt-parent = <&vic0>;
243 interrupts = <0>, <1>, <2>, <3>,
244 <4>, <5>, <6>, <7>;
245 #gpio-cells = <2>;
246 #interrupt-cells = <2>;
247 };
248
249 gph1: gph1 {
250 gpio-controller;
251 interrupt-controller;
252 interrupt-parent = <&vic0>;
253 interrupts = <8>, <9>, <10>, <11>,
254 <12>, <13>, <14>, <15>;
255 #gpio-cells = <2>;
256 #interrupt-cells = <2>;
257 };
258
259 gph2: gph2 {
260 gpio-controller;
261 #gpio-cells = <2>;
262 #interrupt-cells = <2>;
263 };
264
265 gph3: gph3 {
266 gpio-controller;
267 #gpio-cells = <2>;
268 #interrupt-cells = <2>;
269 };
270
271 uart0_data: uart0-data {
272 samsung,pins = "gpa0-0", "gpa0-1";
273 samsung,pin-function = <2>;
274 samsung,pin-pud = <0>;
275 samsung,pin-drv = <0>;
276 };
277
278 uart0_fctl: uart0-fctl {
279 samsung,pins = "gpa0-2", "gpa0-3";
280 samsung,pin-function = <2>;
281 samsung,pin-pud = <0>;
282 samsung,pin-drv = <0>;
283 };
284
285 uart1_data: uart1-data {
286 samsung,pins = "gpa0-4", "gpa0-5";
287 samsung,pin-function = <2>;
288 samsung,pin-pud = <0>;
289 samsung,pin-drv = <0>;
290 };
291
292 uart1_fctl: uart1-fctl {
293 samsung,pins = "gpa0-6", "gpa0-7";
294 samsung,pin-function = <2>;
295 samsung,pin-pud = <0>;
296 samsung,pin-drv = <0>;
297 };
298
299 uart2_data: uart2-data {
300 samsung,pins = "gpa1-0", "gpa1-1";
301 samsung,pin-function = <2>;
302 samsung,pin-pud = <0>;
303 samsung,pin-drv = <0>;
304 };
305
306 uart2_fctl: uart2-fctl {
307 samsung,pins = "gpa1-2", "gpa1-3";
308 samsung,pin-function = <3>;
309 samsung,pin-pud = <0>;
310 samsung,pin-drv = <0>;
311 };
312
313 uart3_data: uart3-data {
314 samsung,pins = "gpa1-2", "gpa1-3";
315 samsung,pin-function = <2>;
316 samsung,pin-pud = <0>;
317 samsung,pin-drv = <0>;
318 };
319
320 uart_audio: uart-audio {
321 samsung,pins = "gpa1-2", "gpa1-3";
322 samsung,pin-function = <4>;
323 samsung,pin-pud = <0>;
324 samsung,pin-drv = <0>;
325 };
326
327 spi0_bus: spi0-bus {
328 samsung,pins = "gpb-0", "gpb-2", "gpb-3";
329 samsung,pin-function = <2>;
330 samsung,pin-pud = <2>;
331 samsung,pin-drv = <0>;
332 };
333
334 spi1_bus: spi1-bus {
335 samsung,pins = "gpb-4", "gpb-6", "gpb-7";
336 samsung,pin-function = <2>;
337 samsung,pin-pud = <2>;
338 samsung,pin-drv = <0>;
339 };
340
341 i2s0_bus: i2s0-bus {
342 samsung,pins = "gpi-0", "gpi-1", "gpi-2", "gpi-3",
343 "gpi-4", "gpi-5", "gpi-6";
344 samsung,pin-function = <2>;
345 samsung,pin-pud = <0>;
346 samsung,pin-drv = <0>;
347 };
348
349 i2s1_bus: i2s1-bus {
350 samsung,pins = "gpc0-0", "gpc0-1", "gpc0-2", "gpc0-3",
351 "gpc0-4";
352 samsung,pin-function = <2>;
353 samsung,pin-pud = <0>;
354 samsung,pin-drv = <0>;
355 };
356
357 i2s2_bus: i2s2-bus {
358 samsung,pins = "gpc1-0", "gpc1-1", "gpc1-2", "gpc1-3",
359 "gpc1-4";
360 samsung,pin-function = <4>;
361 samsung,pin-pud = <0>;
362 samsung,pin-drv = <0>;
363 };
364
365 pcm1_bus: pcm1-bus {
366 samsung,pins = "gpc0-0", "gpc0-1", "gpc0-2", "gpc0-3",
367 "gpc0-4";
368 samsung,pin-function = <3>;
369 samsung,pin-pud = <0>;
370 samsung,pin-drv = <0>;
371 };
372
373 ac97_bus: ac97-bus {
374 samsung,pins = "gpc0-0", "gpc0-1", "gpc0-2", "gpc0-3",
375 "gpc0-4";
376 samsung,pin-function = <4>;
377 samsung,pin-pud = <0>;
378 samsung,pin-drv = <0>;
379 };
380
381 i2s2_bus: i2s2-bus {
382 samsung,pins = "gpc1-0", "gpc1-1", "gpc1-2", "gpc1-3",
383 "gpc1-4";
384 samsung,pin-function = <2>;
385 samsung,pin-pud = <0>;
386 samsung,pin-drv = <0>;
387 };
388
389 pcm2_bus: pcm2-bus {
390 samsung,pins = "gpc1-0", "gpc1-1", "gpc1-2", "gpc1-3",
391 "gpc1-4";
392 samsung,pin-function = <3>;
393 samsung,pin-pud = <0>;
394 samsung,pin-drv = <0>;
395 };
396
397 spdif_bus: spdif-bus {
398 samsung,pins = "gpc1-0", "gpc1-1";
399 samsung,pin-function = <4>;
400 samsung,pin-pud = <0>;
401 samsung,pin-drv = <0>;
402 };
403
404 spi2_bus: spi2-bus {
405 samsung,pins = "gpc1-1", "gpc1-2", "gpc1-3", "gpc1-4";
406 samsung,pin-function = <5>;
407 samsung,pin-pud = <2>;
408 samsung,pin-drv = <0>;
409 };
410
411 i2c0_bus: i2c0-bus {
412 samsung,pins = "gpd1-0", "gpd1-1";
413 samsung,pin-function = <2>;
414 samsung,pin-pud = <2>;
415 samsung,pin-drv = <0>;
416 };
417
418 i2c1_bus: i2c1-bus {
419 samsung,pins = "gpd1-2", "gpd1-3";
420 samsung,pin-function = <2>;
421 samsung,pin-pud = <2>;
422 samsung,pin-drv = <0>;
423 };
424
425 i2c2_bus: i2c2-bus {
426 samsung,pins = "gpd1-4", "gpd1-5";
427 samsung,pin-function = <2>;
428 samsung,pin-pud = <2>;
429 samsung,pin-drv = <0>;
430 };
431
432 pwm0_out: pwm0-out {
433 samsung,pins = "gpd0-0";
434 samsung,pin-function = <2>;
435 samsung,pin-pud = <0>;
436 samsung,pin-drv = <0>;
437 };
438
439 pwm1_out: pwm1-out {
440 samsung,pins = "gpd0-1";
441 samsung,pin-function = <2>;
442 samsung,pin-pud = <0>;
443 samsung,pin-drv = <0>;
444 };
445
446 pwm2_out: pwm2-out {
447 samsung,pins = "gpd0-2";
448 samsung,pin-function = <2>;
449 samsung,pin-pud = <0>;
450 samsung,pin-drv = <0>;
451 };
452
453 pwm3_out: pwm3-out {
454 samsung,pins = "gpd0-3";
455 samsung,pin-function = <2>;
456 samsung,pin-pud = <0>;
457 samsung,pin-drv = <0>;
458 };
459
460 keypad_row0: keypad-row-0 {
461 samsung,pins = "gph3-0";
462 samsung,pin-function = <3>;
463 samsung,pin-pud = <0>;
464 samsung,pin-drv = <0>;
465 };
466
467 keypad_row1: keypad-row-1 {
468 samsung,pins = "gph3-1";
469 samsung,pin-function = <3>;
470 samsung,pin-pud = <0>;
471 samsung,pin-drv = <0>;
472 };
473
474 keypad_row2: keypad-row-2 {
475 samsung,pins = "gph3-2";
476 samsung,pin-function = <3>;
477 samsung,pin-pud = <0>;
478 samsung,pin-drv = <0>;
479 };
480
481 keypad_row3: keypad-row-3 {
482 samsung,pins = "gph3-3";
483 samsung,pin-function = <3>;
484 samsung,pin-pud = <0>;
485 samsung,pin-drv = <0>;
486 };
487
488 keypad_row4: keypad-row-4 {
489 samsung,pins = "gph3-4";
490 samsung,pin-function = <3>;
491 samsung,pin-pud = <0>;
492 samsung,pin-drv = <0>;
493 };
494
495 keypad_row5: keypad-row-5 {
496 samsung,pins = "gph3-5";
497 samsung,pin-function = <3>;
498 samsung,pin-pud = <0>;
499 samsung,pin-drv = <0>;
500 };
501
502 keypad_row6: keypad-row-6 {
503 samsung,pins = "gph3-6";
504 samsung,pin-function = <3>;
505 samsung,pin-pud = <0>;
506 samsung,pin-drv = <0>;
507 };
508
509 keypad_row7: keypad-row-7 {
510 samsung,pins = "gph3-7";
511 samsung,pin-function = <3>;
512 samsung,pin-pud = <0>;
513 samsung,pin-drv = <0>;
514 };
515
516 keypad_col0: keypad-col-0 {
517 samsung,pins = "gph2-0";
518 samsung,pin-function = <3>;
519 samsung,pin-pud = <0>;
520 samsung,pin-drv = <0>;
521 };
522
523 keypad_col1: keypad-col-1 {
524 samsung,pins = "gph2-1";
525 samsung,pin-function = <3>;
526 samsung,pin-pud = <0>;
527 samsung,pin-drv = <0>;
528 };
529
530 keypad_col2: keypad-col-2 {
531 samsung,pins = "gph2-2";
532 samsung,pin-function = <3>;
533 samsung,pin-pud = <0>;
534 samsung,pin-drv = <0>;
535 };
536
537 keypad_col3: keypad-col-3 {
538 samsung,pins = "gph2-3";
539 samsung,pin-function = <3>;
540 samsung,pin-pud = <0>;
541 samsung,pin-drv = <0>;
542 };
543
544 keypad_col4: keypad-col-4 {
545 samsung,pins = "gph2-4";
546 samsung,pin-function = <3>;
547 samsung,pin-pud = <0>;
548 samsung,pin-drv = <0>;
549 };
550
551 keypad_col5: keypad-col-5 {
552 samsung,pins = "gph2-5";
553 samsung,pin-function = <3>;
554 samsung,pin-pud = <0>;
555 samsung,pin-drv = <0>;
556 };
557
558 keypad_col6: keypad-col-6 {
559 samsung,pins = "gph2-6";
560 samsung,pin-function = <3>;
561 samsung,pin-pud = <0>;
562 samsung,pin-drv = <0>;
563 };
564
565 keypad_col7: keypad-col-7 {
566 samsung,pins = "gph2-7";
567 samsung,pin-function = <3>;
568 samsung,pin-pud = <0>;
569 samsung,pin-drv = <0>;
570 };
571
572 sd0_clk: sd0-clk {
573 samsung,pins = "gpg0-0";
574 samsung,pin-function = <2>;
575 samsung,pin-pud = <0>;
576 samsung,pin-drv = <3>;
577 };
578
579 sd0_cmd: sd0-cmd {
580 samsung,pins = "gpg0-1";
581 samsung,pin-function = <2>;
582 samsung,pin-pud = <0>;
583 samsung,pin-drv = <3>;
584 };
585
586 sd0_cd: sd0-cd {
587 samsung,pins = "gpg0-2";
588 samsung,pin-function = <2>;
589 samsung,pin-pud = <2>;
590 samsung,pin-drv = <3>;
591 };
592
593 sd0_bus1: sd0-bus-width1 {
594 samsung,pins = "gpg0-3";
595 samsung,pin-function = <2>;
596 samsung,pin-pud = <2>;
597 samsung,pin-drv = <3>;
598 };
599
600 sd0_bus4: sd0-bus-width4 {
601 samsung,pins = "gpg0-3", "gpg0-4", "gpg0-5", "gpg0-6";
602 samsung,pin-function = <2>;
603 samsung,pin-pud = <2>;
604 samsung,pin-drv = <3>;
605 };
606
607 sd0_bus8: sd0-bus-width8 {
608 samsung,pins = "gpg1-3", "gpg1-4", "gpg1-5", "gpg1-6";
609 samsung,pin-function = <3>;
610 samsung,pin-pud = <2>;
611 samsung,pin-drv = <3>;
612 };
613
614 sd1_clk: sd1-clk {
615 samsung,pins = "gpg1-0";
616 samsung,pin-function = <2>;
617 samsung,pin-pud = <0>;
618 samsung,pin-drv = <3>;
619 };
620
621 sd1_cmd: sd1-cmd {
622 samsung,pins = "gpg1-1";
623 samsung,pin-function = <2>;
624 samsung,pin-pud = <0>;
625 samsung,pin-drv = <3>;
626 };
627
628 sd1_cd: sd1-cd {
629 samsung,pins = "gpg1-2";
630 samsung,pin-function = <2>;
631 samsung,pin-pud = <2>;
632 samsung,pin-drv = <3>;
633 };
634
635 sd1_bus1: sd1-bus-width1 {
636 samsung,pins = "gpg1-3";
637 samsung,pin-function = <2>;
638 samsung,pin-pud = <2>;
639 samsung,pin-drv = <3>;
640 };
641
642 sd1_bus4: sd1-bus-width4 {
643 samsung,pins = "gpg1-3", "gpg1-4", "gpg1-5", "gpg1-6";
644 samsung,pin-function = <2>;
645 samsung,pin-pud = <2>;
646 samsung,pin-drv = <3>;
647 };
648
649 sd2_clk: sd2-clk {
650 samsung,pins = "gpg2-0";
651 samsung,pin-function = <2>;
652 samsung,pin-pud = <0>;
653 samsung,pin-drv = <3>;
654 };
655
656 sd2_cmd: sd2-cmd {
657 samsung,pins = "gpg2-1";
658 samsung,pin-function = <2>;
659 samsung,pin-pud = <0>;
660 samsung,pin-drv = <3>;
661 };
662
663 sd2_cd: sd2-cd {
664 samsung,pins = "gpg2-2";
665 samsung,pin-function = <2>;
666 samsung,pin-pud = <2>;
667 samsung,pin-drv = <3>;
668 };
669
670 sd2_bus1: sd2-bus-width1 {
671 samsung,pins = "gpg2-3";
672 samsung,pin-function = <2>;
673 samsung,pin-pud = <2>;
674 samsung,pin-drv = <3>;
675 };
676
677 sd2_bus4: sd2-bus-width4 {
678 samsung,pins = "gpg2-3", "gpg2-4", "gpg2-5", "gpg2-6";
679 samsung,pin-function = <2>;
680 samsung,pin-pud = <2>;
681 samsung,pin-drv = <3>;
682 };
683
684 sd2_bus8: sd2-bus-width8 {
685 samsung,pins = "gpg3-3", "gpg3-4", "gpg3-5", "gpg3-6";
686 samsung,pin-function = <3>;
687 samsung,pin-pud = <2>;
688 samsung,pin-drv = <3>;
689 };
690
691 sd3_clk: sd3-clk {
692 samsung,pins = "gpg3-0";
693 samsung,pin-function = <2>;
694 samsung,pin-pud = <0>;
695 samsung,pin-drv = <3>;
696 };
697
698 sd3_cmd: sd3-cmd {
699 samsung,pins = "gpg3-1";
700 samsung,pin-function = <2>;
701 samsung,pin-pud = <0>;
702 samsung,pin-drv = <3>;
703 };
704
705 sd3_cd: sd3-cd {
706 samsung,pins = "gpg3-2";
707 samsung,pin-function = <2>;
708 samsung,pin-pud = <2>;
709 samsung,pin-drv = <3>;
710 };
711
712 sd3_bus1: sd3-bus-width1 {
713 samsung,pins = "gpg3-3";
714 samsung,pin-function = <2>;
715 samsung,pin-pud = <2>;
716 samsung,pin-drv = <3>;
717 };
718
719 sd3_bus4: sd3-bus-width4 {
720 samsung,pins = "gpg3-3", "gpg3-4", "gpg3-5", "gpg3-6";
721 samsung,pin-function = <2>;
722 samsung,pin-pud = <2>;
723 samsung,pin-drv = <3>;
724 };
725
726 eint0: ext-int0 {
727 samsung,pins = "gph0-0";
728 samsung,pin-function = <0xf>;
729 samsung,pin-pud = <0>;
730 samsung,pin-drv = <0>;
731 };
732
733 eint8: ext-int8 {
734 samsung,pins = "gph1-0";
735 samsung,pin-function = <0xf>;
736 samsung,pin-pud = <0>;
737 samsung,pin-drv = <0>;
738 };
739
740 eint15: ext-int15 {
741 samsung,pins = "gph1-7";
742 samsung,pin-function = <0xf>;
743 samsung,pin-pud = <0>;
744 samsung,pin-drv = <0>;
745 };
746
747 eint16: ext-int16 {
748 samsung,pins = "gph2-0";
749 samsung,pin-function = <0xf>;
750 samsung,pin-pud = <0>;
751 samsung,pin-drv = <0>;
752 };
753
754 eint31: ext-int31 {
755 samsung,pins = "gph3-7";
756 samsung,pin-function = <0xf>;
757 samsung,pin-pud = <0>;
758 samsung,pin-drv = <0>;
759 };
760
761 cam_port_a_io: cam-port-a-io {
762 samsung,pins = "gpe0-0", "gpe0-1", "gpe0-2", "gpe0-3",
763 "gpe0-4", "gpe0-5", "gpe0-6", "gpe0-7",
764 "gpe1-0", "gpe1-1", "gpe1-2", "gpe1-4";
765 samsung,pin-function = <2>;
766 samsung,pin-pud = <0>;
767 samsung,pin-drv = <0>;
768 };
769
770 cam_port_a_clk_active: cam-port-a-clk-active {
771 samsung,pins = "gpe1-3";
772 samsung,pin-function = <2>;
773 samsung,pin-pud = <0>;
774 samsung,pin-drv = <3>;
775 };
776
777 cam_port_a_clk_idle: cam-port-a-clk-idle {
778 samsung,pins = "gpe1-3";
779 samsung,pin-function = <0>;
780 samsung,pin-pud = <1>;
781 samsung,pin-drv = <0>;
782 };
783
784 cam_port_b_io: cam-port-b-io {
785 samsung,pins = "gpj0-0", "gpj0-1", "gpj0-2", "gpj0-3",
786 "gpj0-4", "gpj0-5", "gpj0-6", "gpj0-7",
787 "gpj1-0", "gpj1-1", "gpj1-2", "gpj1-4";
788 samsung,pin-function = <3>;
789 samsung,pin-pud = <0>;
790 samsung,pin-drv = <0>;
791 };
792
793 cam_port_b_clk_active: cam-port-b-clk-active {
794 samsung,pins = "gpj1-3";
795 samsung,pin-function = <3>;
796 samsung,pin-pud = <0>;
797 samsung,pin-drv = <3>;
798 };
799
800 cam_port_b_clk_idle: cam-port-b-clk-idle {
801 samsung,pins = "gpj1-3";
802 samsung,pin-function = <0>;
803 samsung,pin-pud = <1>;
804 samsung,pin-drv = <0>;
805 };
806
807 lcd_ctrl: lcd-ctrl {
808 samsung,pins = "gpd0-0", "gpd0-1";
809 samsung,pin-function = <3>;
810 samsung,pin-pud = <0>;
811 samsung,pin-drv = <0>;
812 };
813
814 lcd_sync: lcd-sync {
815 samsung,pins = "gpf0-0", "gpf0-1";
816 samsung,pin-function = <2>;
817 samsung,pin-pud = <0>;
818 samsung,pin-drv = <0>;
819 };
820
821 lcd_clk: lcd-clk {
822 samsung,pins = "gpf0-0", "gpf0-1", "gpf0-2", "gpf0-3";
823 samsung,pin-function = <2>;
824 samsung,pin-pud = <0>;
825 samsung,pin-drv = <0>;
826 };
827
828 lcd_data24: lcd-data-width24 {
829 samsung,pins = "gpf0-4", "gpf0-5", "gpf0-6", "gpf0-7",
830 "gpf1-0", "gpf1-1", "gpf1-2", "gpf1-3",
831 "gpf1-4", "gpf1-5", "gpf1-6", "gpf1-7",
832 "gpf2-0", "gpf2-1", "gpf2-2", "gpf2-3",
833 "gpf2-4", "gpf2-5", "gpf2-6", "gpf2-7",
834 "gpf3-0", "gpf3-1", "gpf3-2", "gpf3-3";
835 samsung,pin-function = <2>;
836 samsung,pin-pud = <0>;
837 samsung,pin-drv = <0>;
838 };
839};
diff --git a/arch/arm/boot/dts/s5pv210.dtsi b/arch/arm/boot/dts/s5pv210.dtsi
new file mode 100644
index 000000000000..8344a0ee2b86
--- /dev/null
+++ b/arch/arm/boot/dts/s5pv210.dtsi
@@ -0,0 +1,633 @@
1/*
2 * Samsung's S5PV210 SoC device tree source
3 *
4 * Copyright (c) 2013-2014 Samsung Electronics, Co. Ltd.
5 *
6 * Mateusz Krawczuk <m.krawczuk@partner.samsung.com>
7 * Tomasz Figa <t.figa@samsung.com>
8 *
9 * Samsung's S5PV210 SoC device nodes are listed in this file. S5PV210
10 * based board files can include this file and provide values for board specfic
11 * bindings.
12 *
13 * Note: This file does not include device nodes for all the controllers in
14 * S5PV210 SoC. As device tree coverage for S5PV210 increases, additional
15 * nodes can be added to this file.
16 *
17 * This program is free software; you can redistribute it and/or modify
18 * it under the terms of the GNU General Public License version 2 as
19 * published by the Free Software Foundation.
20*/
21
22#include "skeleton.dtsi"
23#include <dt-bindings/clock/s5pv210.h>
24#include <dt-bindings/clock/s5pv210-audss.h>
25
26/ {
27 aliases {
28 csis0 = &csis0;
29 fimc0 = &fimc0;
30 fimc1 = &fimc1;
31 fimc2 = &fimc2;
32 i2c0 = &i2c0;
33 i2c1 = &i2c1;
34 i2c2 = &i2c2;
35 i2s0 = &i2s0;
36 i2s1 = &i2s1;
37 i2s2 = &i2s2;
38 pinctrl0 = &pinctrl0;
39 spi0 = &spi0;
40 spi1 = &spi1;
41 };
42
43 cpus {
44 #address-cells = <1>;
45 #size-cells = <0>;
46
47 cpu@0 {
48 device_type = "cpu";
49 compatible = "arm,cortex-a8";
50 reg = <0>;
51 };
52 };
53
54 soc {
55 compatible = "simple-bus";
56 #address-cells = <1>;
57 #size-cells = <1>;
58 ranges;
59
60 external-clocks {
61 compatible = "simple-bus";
62 #address-cells = <1>;
63 #size-cells = <0>;
64
65 xxti: oscillator@0 {
66 compatible = "fixed-clock";
67 reg = <0>;
68 clock-frequency = <0>;
69 clock-output-names = "xxti";
70 #clock-cells = <0>;
71 };
72
73 xusbxti: oscillator@1 {
74 compatible = "fixed-clock";
75 reg = <1>;
76 clock-frequency = <0>;
77 clock-output-names = "xusbxti";
78 #clock-cells = <0>;
79 };
80 };
81
82 onenand: onenand@b0000000 {
83 compatible = "samsung,s5pv210-onenand";
84 reg = <0xb0600000 0x2000>,
85 <0xb0000000 0x20000>,
86 <0xb0040000 0x20000>;
87 interrupt-parent = <&vic1>;
88 interrupts = <31>;
89 clocks = <&clocks CLK_NANDXL>, <&clocks DOUT_FLASH>;
90 clock-names = "bus", "onenand";
91 #address-cells = <1>;
92 #size-cells = <1>;
93 status = "disabled";
94 };
95
96 chipid@e0000000 {
97 compatible = "samsung,s5pv210-chipid";
98 reg = <0xe0000000 0x1000>;
99 };
100
101 clocks: clock-controller@e0100000 {
102 compatible = "samsung,s5pv210-clock", "simple-bus";
103 reg = <0xe0100000 0x10000>;
104 clock-names = "xxti", "xusbxti";
105 clocks = <&xxti>, <&xusbxti>;
106 #clock-cells = <1>;
107 #address-cells = <1>;
108 #size-cells = <1>;
109 ranges;
110
111 pmu_syscon: syscon@e0108000 {
112 compatible = "samsung-s5pv210-pmu", "syscon";
113 reg = <0xe0108000 0x8000>;
114 };
115 };
116
117 pinctrl0: pinctrl@e0200000 {
118 compatible = "samsung,s5pv210-pinctrl";
119 reg = <0xe0200000 0x1000>;
120 interrupt-parent = <&vic0>;
121 interrupts = <30>;
122
123 wakeup-interrupt-controller {
124 compatible = "samsung,exynos4210-wakeup-eint";
125 interrupts = <16>;
126 interrupt-parent = <&vic0>;
127 };
128 };
129
130 amba {
131 #address-cells = <1>;
132 #size-cells = <1>;
133 compatible = "arm,amba-bus";
134 ranges;
135
136 pdma0: dma@e0900000 {
137 compatible = "arm,pl330", "arm,primecell";
138 reg = <0xe0900000 0x1000>;
139 interrupt-parent = <&vic0>;
140 interrupts = <19>;
141 clocks = <&clocks CLK_PDMA0>;
142 clock-names = "apb_pclk";
143 #dma-cells = <1>;
144 #dma-channels = <8>;
145 #dma-requests = <32>;
146 };
147
148 pdma1: dma@e0a00000 {
149 compatible = "arm,pl330", "arm,primecell";
150 reg = <0xe0a00000 0x1000>;
151 interrupt-parent = <&vic0>;
152 interrupts = <20>;
153 clocks = <&clocks CLK_PDMA1>;
154 clock-names = "apb_pclk";
155 #dma-cells = <1>;
156 #dma-channels = <8>;
157 #dma-requests = <32>;
158 };
159 };
160
161 spi0: spi@e1300000 {
162 compatible = "samsung,s5pv210-spi";
163 reg = <0xe1300000 0x1000>;
164 interrupt-parent = <&vic1>;
165 interrupts = <15>;
166 dmas = <&pdma0 7>, <&pdma0 6>;
167 dma-names = "tx", "rx";
168 clocks = <&clocks SCLK_SPI0>, <&clocks CLK_SPI0>;
169 clock-names = "spi", "spi_busclk0";
170 pinctrl-names = "default";
171 pinctrl-0 = <&spi0_bus>;
172 #address-cells = <1>;
173 #size-cells = <0>;
174 status = "disabled";
175 };
176
177 spi1: spi@e1400000 {
178 compatible = "samsung,s5pv210-spi";
179 reg = <0xe1400000 0x1000>;
180 interrupt-parent = <&vic1>;
181 interrupts = <16>;
182 dmas = <&pdma1 7>, <&pdma1 6>;
183 dma-names = "tx", "rx";
184 clocks = <&clocks SCLK_SPI1>, <&clocks CLK_SPI1>;
185 clock-names = "spi", "spi_busclk0";
186 pinctrl-names = "default";
187 pinctrl-0 = <&spi1_bus>;
188 #address-cells = <1>;
189 #size-cells = <0>;
190 status = "disabled";
191 };
192
193 keypad: keypad@e1600000 {
194 compatible = "samsung,s5pv210-keypad";
195 reg = <0xe1600000 0x1000>;
196 interrupt-parent = <&vic2>;
197 interrupts = <25>;
198 clocks = <&clocks CLK_KEYIF>;
199 clock-names = "keypad";
200 status = "disabled";
201 };
202
203 i2c0: i2c@e1800000 {
204 compatible = "samsung,s3c2440-i2c";
205 reg = <0xe1800000 0x1000>;
206 interrupt-parent = <&vic1>;
207 interrupts = <14>;
208 clocks = <&clocks CLK_I2C0>;
209 clock-names = "i2c";
210 pinctrl-names = "default";
211 pinctrl-0 = <&i2c0_bus>;
212 #address-cells = <1>;
213 #size-cells = <0>;
214 status = "disabled";
215 };
216
217 i2c2: i2c@e1a00000 {
218 compatible = "samsung,s3c2440-i2c";
219 reg = <0xe1a00000 0x1000>;
220 interrupt-parent = <&vic1>;
221 interrupts = <19>;
222 clocks = <&clocks CLK_I2C2>;
223 clock-names = "i2c";
224 pinctrl-0 = <&i2c2_bus>;
225 pinctrl-names = "default";
226 #address-cells = <1>;
227 #size-cells = <0>;
228 status = "disabled";
229 };
230
231 audio-subsystem {
232 compatible = "samsung,s5pv210-audss", "simple-bus";
233 #address-cells = <1>;
234 #size-cells = <1>;
235 ranges;
236
237 clk_audss: clock-controller@eee10000 {
238 compatible = "samsung,s5pv210-audss-clock";
239 reg = <0xeee10000 0x1000>;
240 clock-names = "hclk", "xxti",
241 "fout_epll",
242 "sclk_audio0";
243 clocks = <&clocks DOUT_HCLKP>, <&xxti>,
244 <&clocks FOUT_EPLL>,
245 <&clocks SCLK_AUDIO0>;
246 #clock-cells = <1>;
247 };
248
249 i2s0: i2s@eee30000 {
250 compatible = "samsung,s5pv210-i2s";
251 reg = <0xeee30000 0x1000>;
252 interrupt-parent = <&vic2>;
253 interrupts = <16>;
254 dma-names = "rx", "tx", "tx-sec";
255 dmas = <&pdma1 9>, <&pdma1 10>, <&pdma1 11>;
256 clock-names = "iis",
257 "i2s_opclk0",
258 "i2s_opclk1";
259 clocks = <&clk_audss CLK_I2S>,
260 <&clk_audss CLK_I2S>,
261 <&clk_audss CLK_DOUT_AUD_BUS>;
262 samsung,idma-addr = <0xc0010000>;
263 pinctrl-names = "default";
264 pinctrl-0 = <&i2s0_bus>;
265 #sound-dai-cells = <0>;
266 status = "disabled";
267 };
268 };
269
270 i2s1: i2s@e2100000 {
271 compatible = "samsung,s3c6410-i2s";
272 reg = <0xe2100000 0x1000>;
273 interrupt-parent = <&vic2>;
274 interrupts = <17>;
275 dma-names = "rx", "tx";
276 dmas = <&pdma1 12>, <&pdma1 13>;
277 clock-names = "iis", "i2s_opclk0";
278 clocks = <&clocks CLK_I2S1>, <&clocks SCLK_AUDIO1>;
279 pinctrl-names = "default";
280 pinctrl-0 = <&i2s1_bus>;
281 #sound-dai-cells = <0>;
282 status = "disabled";
283 };
284
285 i2s2: i2s@e2a00000 {
286 compatible = "samsung,s3c6410-i2s";
287 reg = <0xe2a00000 0x1000>;
288 interrupt-parent = <&vic2>;
289 interrupts = <18>;
290 dma-names = "rx", "tx";
291 dmas = <&pdma1 14>, <&pdma1 15>;
292 clock-names = "iis", "i2s_opclk0";
293 clocks = <&clocks CLK_I2S2>, <&clocks SCLK_AUDIO2>;
294 pinctrl-names = "default";
295 pinctrl-0 = <&i2s2_bus>;
296 #sound-dai-cells = <0>;
297 status = "disabled";
298 };
299
300 pwm: pwm@e2500000 {
301 compatible = "samsung,s5pc100-pwm";
302 reg = <0xe2500000 0x1000>;
303 interrupt-parent = <&vic0>;
304 interrupts = <21>, <22>, <23>, <24>, <25>;
305 clock-names = "timers";
306 clocks = <&clocks CLK_PWM>;
307 #pwm-cells = <3>;
308 };
309
310 watchdog: watchdog@e2700000 {
311 compatible = "samsung,s3c2410-wdt";
312 reg = <0xe2700000 0x1000>;
313 interrupt-parent = <&vic0>;
314 interrupts = <26>;
315 clock-names = "watchdog";
316 clocks = <&clocks CLK_WDT>;
317 };
318
319 rtc: rtc@e2800000 {
320 compatible = "samsung,s3c6410-rtc";
321 reg = <0xe2800000 0x100>;
322 interrupt-parent = <&vic0>;
323 interrupts = <28>, <29>;
324 clocks = <&clocks CLK_RTC>;
325 clock-names = "rtc";
326 status = "disabled";
327 };
328
329 uart0: serial@e2900000 {
330 compatible = "samsung,s5pv210-uart";
331 reg = <0xe2900000 0x400>;
332 interrupt-parent = <&vic1>;
333 interrupts = <10>;
334 clock-names = "uart", "clk_uart_baud0",
335 "clk_uart_baud1";
336 clocks = <&clocks CLK_UART0>, <&clocks CLK_UART0>,
337 <&clocks SCLK_UART0>;
338 status = "disabled";
339 };
340
341 uart1: serial@e2900400 {
342 compatible = "samsung,s5pv210-uart";
343 reg = <0xe2900400 0x400>;
344 interrupt-parent = <&vic1>;
345 interrupts = <11>;
346 clock-names = "uart", "clk_uart_baud0",
347 "clk_uart_baud1";
348 clocks = <&clocks CLK_UART1>, <&clocks CLK_UART1>,
349 <&clocks SCLK_UART1>;
350 status = "disabled";
351 };
352
353 uart2: serial@e2900800 {
354 compatible = "samsung,s5pv210-uart";
355 reg = <0xe2900800 0x400>;
356 interrupt-parent = <&vic1>;
357 interrupts = <12>;
358 clock-names = "uart", "clk_uart_baud0",
359 "clk_uart_baud1";
360 clocks = <&clocks CLK_UART2>, <&clocks CLK_UART2>,
361 <&clocks SCLK_UART2>;
362 status = "disabled";
363 };
364
365 uart3: serial@e2900c00 {
366 compatible = "samsung,s5pv210-uart";
367 reg = <0xe2900c00 0x400>;
368 interrupt-parent = <&vic1>;
369 interrupts = <13>;
370 clock-names = "uart", "clk_uart_baud0",
371 "clk_uart_baud1";
372 clocks = <&clocks CLK_UART3>, <&clocks CLK_UART3>,
373 <&clocks SCLK_UART3>;
374 status = "disabled";
375 };
376
377 sdhci0: sdhci@eb000000 {
378 compatible = "samsung,s3c6410-sdhci";
379 reg = <0xeb000000 0x100000>;
380 interrupt-parent = <&vic1>;
381 interrupts = <26>;
382 clock-names = "hsmmc", "mmc_busclk.0", "mmc_busclk.2";
383 clocks = <&clocks CLK_HSMMC0>, <&clocks CLK_HSMMC0>,
384 <&clocks SCLK_MMC0>;
385 status = "disabled";
386 };
387
388 sdhci1: sdhci@eb100000 {
389 compatible = "samsung,s3c6410-sdhci";
390 reg = <0xeb100000 0x100000>;
391 interrupt-parent = <&vic1>;
392 interrupts = <27>;
393 clock-names = "hsmmc", "mmc_busclk.0", "mmc_busclk.2";
394 clocks = <&clocks CLK_HSMMC1>, <&clocks CLK_HSMMC1>,
395 <&clocks SCLK_MMC1>;
396 status = "disabled";
397 };
398
399 sdhci2: sdhci@eb200000 {
400 compatible = "samsung,s3c6410-sdhci";
401 reg = <0xeb200000 0x100000>;
402 interrupt-parent = <&vic1>;
403 interrupts = <28>;
404 clock-names = "hsmmc", "mmc_busclk.0", "mmc_busclk.2";
405 clocks = <&clocks CLK_HSMMC2>, <&clocks CLK_HSMMC2>,
406 <&clocks SCLK_MMC2>;
407 status = "disabled";
408 };
409
410 sdhci3: sdhci@eb300000 {
411 compatible = "samsung,s3c6410-sdhci";
412 reg = <0xeb300000 0x100000>;
413 interrupt-parent = <&vic3>;
414 interrupts = <2>;
415 clock-names = "hsmmc", "mmc_busclk.0", "mmc_busclk.3";
416 clocks = <&clocks CLK_HSMMC3>, <&clocks CLK_HSMMC3>,
417 <&clocks SCLK_MMC3>;
418 status = "disabled";
419 };
420
421 hsotg: hsotg@ec000000 {
422 compatible = "samsung,s3c6400-hsotg";
423 reg = <0xec000000 0x20000>;
424 interrupt-parent = <&vic1>;
425 interrupts = <24>;
426 clocks = <&clocks CLK_USB_OTG>;
427 clock-names = "otg";
428 phy-names = "usb2-phy";
429 phys = <&usbphy 0>;
430 status = "disabled";
431 };
432
433 usbphy: usbphy@ec100000 {
434 compatible = "samsung,s5pv210-usb2-phy";
435 reg = <0xec100000 0x100>;
436 samsung,pmureg-phandle = <&pmu_syscon>;
437 clocks = <&clocks CLK_USB_OTG>, <&xusbxti>;
438 clock-names = "phy", "ref";
439 #phy-cells = <1>;
440 status = "disabled";
441 };
442
443 ehci: ehci@ec200000 {
444 compatible = "samsung,exynos4210-ehci";
445 reg = <0xec200000 0x100>;
446 interrupts = <23>;
447 interrupt-parent = <&vic1>;
448 clocks = <&clocks CLK_USB_HOST>;
449 clock-names = "usbhost";
450 #address-cells = <1>;
451 #size-cells = <0>;
452 status = "disabled";
453
454 port@0 {
455 reg = <0>;
456 phys = <&usbphy 1>;
457 };
458 };
459
460 ohci: ohci@ec300000 {
461 compatible = "samsung,exynos4210-ohci";
462 reg = <0xec300000 0x100>;
463 interrupts = <23>;
464 clocks = <&clocks CLK_USB_HOST>;
465 clock-names = "usbhost";
466 #address-cells = <1>;
467 #size-cells = <0>;
468 status = "disabled";
469
470 port@0 {
471 reg = <0>;
472 phys = <&usbphy 1>;
473 };
474 };
475
476 mfc: codec@f1700000 {
477 compatible = "samsung,mfc-v5";
478 reg = <0xf1700000 0x10000>;
479 interrupt-parent = <&vic2>;
480 interrupts = <14>;
481 clocks = <&clocks DOUT_MFC>, <&clocks CLK_MFC>;
482 clock-names = "sclk_mfc", "mfc";
483 };
484
485 vic0: interrupt-controller@f2000000 {
486 compatible = "arm,pl192-vic";
487 interrupt-controller;
488 reg = <0xf2000000 0x1000>;
489 #interrupt-cells = <1>;
490 };
491
492 vic1: interrupt-controller@f2100000 {
493 compatible = "arm,pl192-vic";
494 interrupt-controller;
495 reg = <0xf2100000 0x1000>;
496 #interrupt-cells = <1>;
497 };
498
499 vic2: interrupt-controller@f2200000 {
500 compatible = "arm,pl192-vic";
501 interrupt-controller;
502 reg = <0xf2200000 0x1000>;
503 #interrupt-cells = <1>;
504 };
505
506 vic3: interrupt-controller@f2300000 {
507 compatible = "arm,pl192-vic";
508 interrupt-controller;
509 reg = <0xf2300000 0x1000>;
510 #interrupt-cells = <1>;
511 };
512
513 fimd: fimd@f8000000 {
514 compatible = "samsung,exynos4210-fimd";
515 interrupt-parent = <&vic2>;
516 reg = <0xf8000000 0x20000>;
517 interrupt-names = "fifo", "vsync", "lcd_sys";
518 interrupts = <0>, <1>, <2>;
519 clocks = <&clocks SCLK_FIMD>, <&clocks CLK_FIMD>;
520 clock-names = "sclk_fimd", "fimd";
521 status = "disabled";
522 };
523
524 g2d: g2d@fa000000 {
525 compatible = "samsung,s5pv210-g2d";
526 reg = <0xfa000000 0x1000>;
527 interrupt-parent = <&vic2>;
528 interrupts = <9>;
529 clocks = <&clocks DOUT_G2D>, <&clocks CLK_G2D>;
530 clock-names = "sclk_fimg2d", "fimg2d";
531 };
532
533 mdma1: mdma@fa200000 {
534 compatible = "arm,pl330", "arm,primecell";
535 reg = <0xfa200000 0x1000>;
536 interrupt-parent = <&vic0>;
537 interrupts = <18>;
538 clocks = <&clocks CLK_MDMA>;
539 clock-names = "apb_pclk";
540 #dma-cells = <1>;
541 #dma-channels = <8>;
542 #dma-requests = <1>;
543 };
544
545 i2c1: i2c@fab00000 {
546 compatible = "samsung,s3c2440-i2c";
547 reg = <0xfab00000 0x1000>;
548 interrupt-parent = <&vic2>;
549 interrupts = <13>;
550 clocks = <&clocks CLK_I2C1>;
551 clock-names = "i2c";
552 pinctrl-names = "default";
553 pinctrl-0 = <&i2c1_bus>;
554 #address-cells = <1>;
555 #size-cells = <0>;
556 status = "disabled";
557 };
558
559 camera: camera {
560 compatible = "samsung,fimc", "simple-bus";
561 pinctrl-names = "default";
562 pinctrl-0 = <>;
563 clocks = <&clocks SCLK_CAM0>, <&clocks SCLK_CAM1>;
564 clock-names = "sclk_cam0", "sclk_cam1";
565 #address-cells = <1>;
566 #size-cells = <1>;
567 ranges;
568
569 clock_cam: clock-controller {
570 #clock-cells = <1>;
571 };
572
573 csis0: csis@fa600000 {
574 compatible = "samsung,s5pv210-csis";
575 reg = <0xfa600000 0x4000>;
576 interrupt-parent = <&vic2>;
577 interrupts = <29>;
578 clocks = <&clocks CLK_CSIS>,
579 <&clocks SCLK_CSIS>;
580 clock-names = "clk_csis",
581 "sclk_csis";
582 bus-width = <4>;
583 status = "disabled";
584 #address-cells = <1>;
585 #size-cells = <0>;
586 };
587
588 fimc0: fimc@fb200000 {
589 compatible = "samsung,s5pv210-fimc";
590 reg = <0xfb200000 0x1000>;
591 interrupts = <5>;
592 interrupt-parent = <&vic2>;
593 clocks = <&clocks CLK_FIMC0>,
594 <&clocks SCLK_FIMC0>;
595 clock-names = "fimc",
596 "sclk_fimc";
597 samsung,pix-limits = <4224 8192 1920 4224>;
598 samsung,mainscaler-ext;
599 samsung,cam-if;
600 };
601
602 fimc1: fimc@fb300000 {
603 compatible = "samsung,s5pv210-fimc";
604 reg = <0xfb300000 0x1000>;
605 interrupt-parent = <&vic2>;
606 interrupts = <6>;
607 clocks = <&clocks CLK_FIMC1>,
608 <&clocks SCLK_FIMC1>;
609 clock-names = "fimc",
610 "sclk_fimc";
611 samsung,pix-limits = <4224 8192 1920 4224>;
612 samsung,mainscaler-ext;
613 samsung,cam-if;
614 };
615
616 fimc2: fimc@fb400000 {
617 compatible = "samsung,s5pv210-fimc";
618 reg = <0xfb400000 0x1000>;
619 interrupt-parent = <&vic2>;
620 interrupts = <7>;
621 clocks = <&clocks CLK_FIMC2>,
622 <&clocks SCLK_FIMC2>;
623 clock-names = "fimc",
624 "sclk_fimc";
625 samsung,pix-limits = <4224 8192 1920 4224>;
626 samsung,mainscaler-ext;
627 samsung,lcd-wb;
628 };
629 };
630 };
631};
632
633#include "s5pv210-pinctrl.dtsi"
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-22 08:40:28 -0500